Haikun Jia

102 papers C 5Journal 40Unranked 57
YearRankTypeTitle / Venue / Authors
2026 — conf
8.10 A 180-to-240Gb/s Analog-Intensive PAM-4 Transmitter with 0.70pJ/b Analog Power Efficiency in 65nm CMOS.
ISSCC
Ziyi Lin, Haikun Jia, Wei Deng, Shitu He, Chang Liu, Zhihua Wang, Baoyong Chi
2026 — conf
A [email protected]@0.9V Deeply Power-Scalable Reconfigurable Series-Resonance/Class-F VCO with Mutual-Inductance Self-Cancellation and Hybrid 8-Shaped Coupling Techniques.
ISSCC
Juntao Lan, Wei Deng, Haikun Jia, Shiwei Zhang, Zhihua Wang, Baoyong Chi
2026 — conf
A 7.15-to-7.95GHz Magnetically Enhanced Feedforward Waveform-Shaping CMOS Oscillator with Implicit Common-Mode Noise Cancellation Achieving -146.72 dBc/Hz PN@1MHz and 190.6dBc/Hz FoM.
ISSCC
Rui Ma, Wei Deng, Haikun Jia, Juntao Lan, Zhihua Wang, Baoyong Chi
2026 J jnl
A Cycle-Slip Compensated FMCW Digital PLL With Background Back-Tracking DPD.
IEEE J. Solid State Circuits
Angxiao Yan, Wei Deng, Haikun Jia, Shiyan Sun, Chao Tang, Bufan Zhu, Yu Fu, Hongzhuo Liu, Zhihua Wang, Baoyong Chi
2026 J jnl
A D-Band Distributed MIMO FMCW Radar CMOS Transceiver.
IEEE J. Solid State Circuits
Ruichen Wan, Wei Deng, Qixiu Wu, Haikun Jia, Rui Wu, Angxiao Yan, Haowen Cai, Sanming Hu, Zhihua Wang, Baoyong Chi
2025 — conf
19.9 An 11-to-16.4GHz, 3.4GHz/µs-Slope, 5.32GHz-Chirp-Bandwidth, 0.043%-RMS-Frequency-Error FMCW Digital PLL with Posterior-Segment DPD Featuring 5-Chirp-Cycle Convergence Time.
ISSCC
Angxiao Yan, Wei Deng, Haikun Jia, Yumeng Yang, Chao Tang, Shiyan Sun, Zhihua Wang, Baoyong Chi
2025 — conf
A 0.18-µs-Locking-Time Fractional-N PLL with Stochastic Gradient Descent Tuning Curve Fitting, Initial Phase Error Zeroing, and Random DSM Achieving 44.4-fs Jitter at Near-Integer Channel.
CICC
Hongzhuo Liu, Wei Deng, Haikun Jia, Baoyong Chi
2025 — conf
A 104-to-132 GHz 16-way Power Amplifier Using Enhanced Magnetic Coupling Cavity Achieving 21.2 dBm Output Power in 28nm Bulk CMOS.
CICC
Ziyuan Guo, Wei Deng, Weiqi Zheng, Haikun Jia, Hongliang Wu, Qiuyu Peng, Fuyuan Zhao, Junyang Yin, Dongze Li, Baoyong Chi
2025 C conf
A 112Gb/s Analog-MUX-based PAM-4 Transmitter with Inherent 2-tap FFE in 65nm CMOS.
ISCAS
Ziyi Lin, Haikun Jia, Shitu He, Wei Deng, Chang Liu, Ruiheng Qiu, Chen Wang, Baoyong Chi
2025 — conf
A 22-to-32 GHz 4-Beam 32-Element Polarization Reconfigurable Fully-Connected Fully-Bidirectional MIMO Transceiver for Emerging Space-Air-Ground-Sea Integrated Network.
CICC
Junlong Gong, Wei Deng, Shulin Yao, Haikun Jia, Xinyu Jiang, Xiangyu Nie, Dongfang Li, Hongliang Wu, ChuanMing Zhu, Xiangrong Huang, Baoyong Chi
2025 — conf
A 22.0-to-28.4GHz 192.2dBc/Hz FoM and 206.2dBc/Hz FoMA Dual-Core VCO Using Circular-Inverse-Class-F Topology Under Standard Supply Voltage in 65nm CMOS Process.
CICC
Huanyu Ge, Haikun Jia, Wei Deng, Baoyong Chi
2025 J jnl
A 26-Gb/s 140-GHz OOK CMOS Transmitter and Receiver Chipset for High-Speed Wireless and Dielectric Waveguide Communication.
IEEE J. Solid State Circuits
Qiuyu Peng, Haikun Jia, Ran Fang, Pingda Guan, Mingxing Deng, Jiamin Xue, Wei Deng, Xin Liang, Baoyong Chi
2025 J jnl
A Digital-Intensive 1TX/2RX IEEE 802.15.4/4z-Compliant Joint-Radar-Communication-Location Transceiver SoC.
IEEE J. Solid State Circuits
Bufan Zhu, Wei Deng, Ziying Huang, Haikun Jia, Haiyang Jia, Angxiao Yan, Yumeng Yang, Junfeng Liu, Yu Fu, Shiyan Sun, Chao Tang, Lixue Kuang, Lilan Yu, Yue Liu, Xin Liang, Zhihua Wang, Baoyong Chi
2025 J jnl
A Ka-Band Multi-Beam Phased-Array Transmitter With Time-Modulation for PAPR Reduction and Physical Layer Security.
IEEE J. Solid State Circuits
Ruiyang Jiang, Haikun Jia, Xiangrong Huang, Wei Deng, ChuanMing Zhu, Xintao Li, Zhihua Wang, Baoyong Chi
2025 J jnl
A Low-Spur and Low-Jitter Fractional Output Divider With Self-Adaption Frequency Filtering Technique.
IEEE J. Solid State Circuits
Yumeng Yang, Wei Deng, Angxiao Yan, Haikun Jia, Junlong Gong, Zhihua Wang, Baoyong Chi
2025 J jnl
A Multi-Core Series-Resonance CMOS Oscillator.
IEEE J. Solid State Circuits
Shiwei Zhang, Wei Deng, Haikun Jia, Zhihua Wang, Baoyong Chi
2025 J jnl
A Series-Parallel-Resonance Oscillator With a 191.5 dBc/Hz FoM.
IEEE Solid State Circuits Lett.
Shiwei Zhang, Wei Deng, Haikun Jia, Hongzhuo Liu, Junlong Gong, Qiuyu Peng, Baoyong Chi
2025 J jnl
A Time-Domain Accuracy-Boosted Temperature Compensated Crystal Oscillator.
IEEE J. Solid State Circuits
Junyang Yin, Wei Deng, Haikun Jia, Sining Pan, Minshuo Wang, Tianyu Chen, Hongdong Zhong, Ziyuan Guo, Zhihua Wang, Baoyong Chi
2025 C conf
A Total Noise Power Based Digital Calibration Method for Continuous-Time Delta-Sigma Modulators.
ISCAS
Zhuojian Yao, Haikun Jia, Lilan Yu, Junfeng Liu, Yu Fu, Wei Deng, Baoyong Chi
2025 J jnl
A Transformer-Based Series-Resonance CMOS VCO.
IEEE J. Solid State Circuits
Shiwei Zhang, Wei Deng, Haikun Jia, Hongzhuo Liu, Shiyan Sun, Pingda Guan, Zhihua Wang, Baoyong Chi
2025 J jnl
An Ultra-Low-Jitter Fast-Hopping Fractional-N PLL With LC DTC and Hybrid-Proportional Paths.
IEEE J. Solid State Circuits
Hongzhuo Liu, Wei Deng, Haikun Jia, Zhihua Wang, Baoyong Chi
2025 J jnl
Decomposition LSTM with dual multi-head self-attention for wind turbine drivetrain state forecasting.
Turkish J. Electr. Eng. Comput. Sci.
Haikun Jia, Huini Sun, Shuang Bai
2024 — conf
19.5 A 13.7-to-41.5GHz 214.1dBc/Hz FoMT Quad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting Technique.
ISSCC
Huanyu Ge, Haikun Jia, Wei Deng, Ruichang Ma, Zhihua Wang, Baoyong Chi
2024 J jnl
28 GHz Compact LNAs With 1.9 dB Minimum NF Using Folded Three-Coil Transformer and Dual-Feedforward Techniques for Phased Array Systems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiangrong Huang, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi, Ziqiang Wang
2024 — conf
A 130-to-170 GHz Reconfigurable Heterodyne/Homodyne Transceiver Achieving 20.5-dBm Psat for Emerging Integrated Wireless Access and Backhaul Networks.
A-SSCC
Qixiu Wu, Wei Deng, Ziyuan Guo, Haikun Jia, Taikun Ma, Qiuyu Peng, Chang Liu, Baoyong Chi
2024 — conf
A 132-to-163 GHz 4TX/4RX Distributed MIMO FMCW Radar Transceiver with Real-Time Reference-Clock Synchronization Enabling Cooperative Coherent Multistatic Imaging System.
VLSI Technology and Circuits
Ruichen Wan, Wei Deng, Qixiu Wu, Haikun Jia, W. Rui, Angxiao Yan, Haowen Cai, Sanming Hu, Zhihua Wang, Baoyong Chi
2024 — conf
A 194.9dBc/Hz FoM and 6.8-to-11.6GHz Quad-Core Dual-Mode Class-F VCO Featuring Wideband Flicker Noise Suppression.
CICC
Huanyu Ge, Haikun Jia, Wei Deng, Ruichang Ma, Baoyong Chi
2024 C conf
A 24.3-to-44.8 GHz Reconfigurable Dual-Band T/R Front-End with An Implicit Switch-based Antenna Interface Supporting 600MSym/s 64QAM.
ISCAS
Junlong Gong, Wei Deng, Fuyuan Zhao, Haikun Jia, Wenjing Ye, Ruichen Wan, Baoyong Chi
2024 — conf
A 3-to-40 GHz 64QAM/256QAM/4096QAM Zero-IF CMOS Transceiver Chipset for Millimeter-wave Software-defined Radios.
A-SSCC
Wenjing Ye, Wei Deng, Haikun Jia, Jingling Zhang, Linjun Gu, Fuyuan Zhao, Ruichen Wan, Baoyong Chi
2024 — conf
A 48MHz Temperature Compensated Crystal Oscillator Utilizing Time-Domain Accuracy Boosting Techniques Achieving ±1.4ppm Frequency Stability from -55°C to 115°C.
A-SSCC
Junyang Yin, Wei Deng, Haikun Jia, Minshuo Wang, Baoyong Chi
2024 J jnl
A Band-Shifting Millimeter-Wave T/R Front-End Using Inductance-Mutation Transformer Technique for Multiband Phased-Array Transceivers.
IEEE J. Solid State Circuits
Fuyuan Zhao, Wei Deng, Haikun Jia, Wenjing Ye, Ruichen Wan, Zhihua Wang, Baoyong Chi
2024 J jnl
A Compact E-Band Load-Modulation Balanced Power Amplifier in 65-nm CMOS.
IEEE J. Solid State Circuits
Xiangrong Huang, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi
2024 J jnl
A Fully Integrated QPSK/16-QAM D-Band CMOS Transceiver With Mixed-Signal Baseband Circuitry Realizing Digital Interfaces.
IEEE J. Solid State Circuits
Pingda Guan, Ruichang Ma, Haikun Jia, Wei Deng, Mingxing Deng, Jiamin Xue, Angxiao Yan, Shiyan Sun, Qiuyu Peng, Teerachot Siriburanon, Robert Bogdan Staszewski, Zhihua Wang, Baoyong Chi
2024 — conf
A Fully-Connected Time-Modulated Phased-Array Transmitter Featuring Physical Security Directional Link and Multi-Beam PAPR Reduction.
A-SSCC
Xiangrong Huang, Haikun Jia, Wei Deng, ChuanMing Zhu, Ruiyang Jiang, Xintao Li, Zhihua Wang, Baoyong Chi
2024 J jnl
A Low-Phase-Noise VCO With Common-Mode Resonance Expansion and Intrinsic Differential 2nd-Harmonic Output Based on a Single Three-Coil Transformer.
IEEE J. Solid State Circuits
Ziyi Lin, Haikun Jia, Ruichang Ma, Wei Deng, Zhihua Wang, Baoyong Chi
2024 J jnl
A Multireference PLL: Theory and Implementation.
IEEE J. Solid State Circuits
Hongzhuo Liu, Wei Deng, Haikun Jia, Shiwei Zhang, Shiyan Sun, Zhihua Wang, Baoyong Chi
2024 — conf
An 11.1-to-14.9GHz Digital-Integral Hybrid-Proportional Fractional-N PLL with an LC DTC Achieving 0.52μs Locking Time and 41.3f5 Jitter.
CICC
Hongzhuo Liu, Wei Deng, Haikun Jia, Baoyong Chi
2024 J jnl
An Enhanced Class-F Dual-Core VCO With Common-Mode-Noise Self-Cancellation and Isolation Technique.
IEEE J. Solid State Circuits
Qixiu Wu, Wei Deng, Yaqian Sun, Haikun Jia, Hongzhuo Liu, Shiwei Zhang, Zhihua Wang, Baoyong Chi
2024 J jnl
Correction to "A 4.4-GHz 193.2-dB FoM 8-Shaped-Inductor-Based LC-VCO Using Orthogonal-Coupled Triple-Coil Transformer".
IEEE Trans. Circuits Syst. II Express Briefs
Yaqian Sun, Wei Deng, Haikun Jia, Zhihua Wang, Baoyong Chi
2024 — conf
INVITED PAPER: A 21.5-to-37 GHz Series Doherty CMOS Power Amplifier with Distributed Multi-step Impedance Inverting Network Achieving 28.2%/23.2%/13.2% Peak/OP1dB/6dBPBO PAEs.
ICTA
Xinyu Jiang, Wei Deng, Junlong Gong, Haikun Jia, Baoyong Chi
2023 — conf
A 10-to-300MHz Fractional Output Divider with -80dBc Worst-Case Fractional Spurs Using Auxiliary-PLL-Based Background 0th/1
ISSCC
Yumeng Yang, Wei Deng, Angxiao Yan, Haikun Jia, Junlong Gong, Zhihua Wang, Baoyong Chi
2023 — conf
A 100 MHz-Reference, 10.3-to-11.1 GHz Quadrature PLL with 33.7-fsrms Jitter and -83.9 dBc Reference Spur Level using a -130.8 dBc/Hz Phase Noise at 1MHz offset Folded Series-Resonance VCO in 65nm CMOS.
CICC
Shiwei Zhang, Wei Deng, Haikun Jia, Hongzhuo Liu, Shiyan Sun, Pingda Guan, Baoyong Chi
2023 J jnl
A 128 Gbps PAM-4 feed forward equaliser with optimized 1UI pulse generator in 65 nm CMOS.
IET Circuits Devices Syst.
Jiawei Wang, Hao Xu, Ziqiang Wang, Haikun Jia, Hanjun Jiang, Chun Zhang, Zhihua Wang
2023 J jnl
A 24-30-GHz Four-Element Phased Array Transceiver With Low Insertion Loss Compact T/R Switch and Bidirectional Phase Shifter for 5G Communication.
IEEE Trans. Very Large Scale Integr. Syst.
Xiangrong Huang, Haikun Jia, Shengnan Dong, Wei Deng, Zhihua Wang, Baoyong Chi
2023 — conf
A 25.0-to-35.9GHz Dual-Layer Quad-Core Dual-Mode VCO with 189.1dBc/Hz FoM and 200.2dBc/Hz FoMT at 1MHz Offset in 65nm CMOS.
CICC
Pingda Guan, Haikun Jia, Wei Deng, Ruichang Ma, Huabing Liao, Zhihua Wang, Baoyong Chi
2023 — conf
A 26.9-GHz 4-Element Code-Domain Hybrid Beamforming Phased-Array Receiver.
A-SSCC
Ziyi Lin, Haikun Jia, ChuanMing Zhu, Wei Deng, Huabing Liao, Bao Shi, Lujie Hao, Xiangrong Huang, Baoyong Chi
2023 — conf
A 27-to-31.6 GHz 8-Element Phased-Array Transmitter Front-End with Inter-Element-Interference Cancellation Scheme in 65 nm CMOS.
A-SSCC
Dongze Li, Wei Deng, Xintao Li, Ruiheng Qiu, Haikun Jia, Xiangrong Huang, Ziyuan Guo, Baoyong Chi
2023 — conf
A 37-to-41.8 GHz Double-Gm-Boosting LNA with 2.9-dB NFmin Using Quadruple-Coupling Transformer for Phased-Array Transceivers.
ESSCIRC
Dongze Li, Wei Deng, Haikun Jia, Ruiheng Qiu, Xintao Li, Ziyuan Guo, Baoyong Chi
2023 — conf
A 4-Element 4-Beam Ka-Band Phased-Array Receiver Using Mesh Topology in 65 nm CMOS.
A-SSCC
Xiangrong Huang, Haikun Jia, Wei Deng, ChuanMing Zhu, Zhihua Wang, Xuzhi Liu, Zhiming Chen, Baoyong Chi
2023 — conf
A 4.8-GHz Time-Interleaved Multi-Reference PLL with 16.1-fs Jitter.
ESSCIRC
Hongzhuo Liu, Wei Deng, Haikun Jia, Shiwei Zhang, Shiyan Sun, Baoyong Chi
2023 C conf
A 6.5-to-8GHz IEEE 802.15.4z-compliant All-Digital UWB Transmitter with Integrated Fast-Settling Master-Slave Regulator.
ISCAS
Ziying Huang, Wei Deng, Haikun Jia, Bufan Zhu, Angxiao Yan, Baoyong Chi
2023 — conf
A Compact E-Band Load-Modulation Balanced Power Amplifier Using Coupled Transmission-Line Output Network Achieving 22.1-dBm Psat and 34.9%/12.2% Efficiency at Psat/6-dB PBO.
A-SSCC
Xiangrong Huang, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi
2023 J jnl
A Compact and Low Phase Noise Square-Geometry Quad-Core Class-F VCO Using Parallel Inductor-Sharing Technique.
IEEE J. Solid State Circuits
Yaqian Sun, Wei Deng, Haikun Jia, Yejun He, Zhihua Wang, Baoyong Chi
2023 J jnl
A D-Band Joint Radar-Communication CMOS Transceiver.
IEEE J. Solid State Circuits
Wei Deng, Zipeng Chen, Haikun Jia, Pingda Guan, Taikun Ma, Angxiao Yan, Shiyan Sun, Xiangrong Huang, Guopei Chen, Ruichang Ma, Shengnan Dong, Luqiang Duan, Zhihua Wang, Baoyong Chi
2023 — conf
A Fully Integrated Bit-to-Bit 24/48Gb/s QPSK/16-QAM D-Band Transceiver with Mixed-Signal Baseband in 28nm CMOS Technology.
A-SSCC
Pingda Guan, Haikun Jia, Wei Deng, Ruichang Ma, Mingxing Deng, Jiamin Xue, Angxiao Yan, Shiyan Sun, Zhihua Wang, Baoyong Chi
2023 J jnl
A Low-Phase-Noise Quad-Core Millimeter-Wave Fundamental VCO Using Circular Triple-Coupled Transformer in 65-nm CMOS.
IEEE J. Solid State Circuits
Haikun Jia, Pingda Guan, Wei Deng, Zhihua Wang, Baoyong Chi
2023 — conf
A Transient Enhancement Digital LDO with Adaptive Ripple Cancelation Based on Optimal Compensation Period Approximation.
A-SSCC
Angxiao Yan, Wei Deng, Haikun Jia, Shiwei Zhang, Baoyong Chi
2023 — conf
An 11.4-to-16.4GHz FMCW Digital PLL with Cycle-slipping Compensation and Back-tracking DPD Achieving 0.034% RMS Frequency Error under 3.4-GHz Chirp Bandwidth and 960-MHz/μs Chirp Slope.
VLSI Technology and Circuits
Angxiao Yan, Wei Deng, Haikun Jia, Shiyan Sun, Chao Tang, Bufan Zhu, Yu Fu, Hongzhuo Liu, Baoyong Chi
2023 — conf
An 11.5-to-14.3GHz 192.8dBc/Hz FoM at 1MHz Offset Dual-Core Enhanced Class-F VCO with Common-Mode-Noise Self-Cancellation and Isolation Technique.
ISSCC
Qixiu Wu, Wei Deng, Haikun Jia, Hongzhuo Liu, Shiwei Zhang, Zhihua Wang, Baoyong Chi
2023 — conf
IEEE ASSCC 2023/ Session 10/ Paper 10.5.
A-SSCC
Ruichang Ma, Haikun Jia, Hongzhuo Liu, Wei Deng, Zhihua Wang, Baoyong Chi
2023 — conf
INVITED PAPER: A 312.5Mbps-32Gbps JESD204C Wireline Transceiver Back-Compatible with JESD204B in 28nm CMOS.
ICTA
Shijie Li, Ruichang Ma, Mingxing Deng, Jiamin Xue, Wei Deng, Baoyong Chi, Haikun Jia
2023 — conf
Transceiver SoC for Wireless Indoor Sensing Data-fusion.
CICC
Bufan Zhu, Wei Deng, Ziying Huang, Haikun Jia, Haiyang Jia, Angxiao Yan, Yumeng Yang, Junfeng Liu, Yu Fu, Shiyan Sun, Chao Tang, Taikun Ma, Jiajie Tang, Baoyong Chi
2022 — conf
A 12.5-to-15.4GHz, -118.9dBc/Hz PN at 1MHz offset, and 191.0dBc/Hz FoM VCO with Common-Mode Resonance Expansion and Simultaneous Differential 2ND-Harmonic Output using a Single Three-Coil Transformer in 65nm CMOS.
CICC
Ruichang Ma, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi
2022 — conf
A 22.8 GHz to 32.8 GHz Compact Power Amplifier with a 15 dBm Output P1dB and 36.5% Peak PAE in 65-nm CMOS.
ICTA
Huabing Liao, Haikun Jia, Xiangrong Huang, Bao Shi, Wei Deng, Baoyong Chi, Zhihua Wang
2022 J jnl
A 4.4-GHz 193.2-dB FoM 8-Shaped-Inductor Based LC-VCO Using Orthogonal-Coupled Triple-Coil Transformer.
IEEE Trans. Circuits Syst. II Express Briefs
Yaqian Sun, Wei Deng, Haikun Jia, Zhihua Wang, Baoyong Chi
2022 — conf
A 4.7GHz Synchronized-Multi-Reference PLL with In-Band Phase Noise Lower than Reference Phase Noise +20logN
ESSCIRC
Hongzhuo Liu, Wei Deng, Haikun Jia, Shiyan Sun, Qixiu Wu, Jiajie Tang, Zhihua Wang, Baoyong Chi
2022 — conf
A 53.6-to-60.2GHz Many-Core Fundamental Oscillator With Scalable Mesh Topology Achieving -136.0dBc/Hz Phase Noise at 10MHz Offset and 190.3dBc/Hz Peak FoM in 65nm CMOS.
ISSCC
Haikun Jia, Ruichang Ma, Wei Deng, Zhihua Wang, Baoyong Chi
2022 — conf
A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O.
ICTA
Yunqi Yang, Ming Zhong, Qianli Ma, Ziyi Lin, Leliang Li, Guike Li, Liyuan Liu, Jian Liu, Nanjian Wu, Haikun Jia, Xinghui Liu, Nan Qi
2022 — conf
A 76-81 GHz FMCW 2TX/3RX Radar Transceiver with Integrated Mixed-Mode PLL and Series-Fed Patch Antenna Array.
ASP-DAC
Taikun Ma, Wei Deng, Haikun Jia, Yejun He, Baoyong Chi
2022 C conf
A Highly Linearized Ka-band Heterodyne Receiver using a Folded Class-AB Inductive Peaking Mixer and Magnetic-Self-Cancellation-Transformer-Based IF Amplifiers.
ISCAS
Qixiu Wu, Wei Deng, Haikun Jia, Rui Wu, Fuyuan Zhao, Baoyong Chi
2022 J jnl
A Self-Adapted Two-Point Modulation Type-II Digital PLL for Fast Chirp Rate and Wide Chirp-Bandwidth FMCW Signal Generation.
IEEE J. Solid State Circuits
Wei Deng, Zipeng Chen, Haikun Jia, Angxiao Yan, Shiyan Sun, Guopei Chen, Zhihua Wang, Baoyong Chi
2021 — conf
8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm.
ISSCC
Danfeng Xu, Yu Kou, Paul Lai, Zichuan Cheng, Tze Yin Cheung, Larry Moser, Yang Zhang, Xiaolong Liu, Man Pio Lam, Haikun Jia, Quan Pan, Wing Hong Szeto, Chi Fai Tang, Ka Fai Mak, Khawar Sarfraz, Tairan Zhu, Ming Kwan, Emily Yim Lee Au, Cormac Conroy, Kai-Keung Chan
2021 — conf
A 11.1-to-14.2 GHz Self-adapted Two-point Modulation Dual-path Type-II Digital PLL Concurrently Achieving 124.7-MHz/μs Chirp Rate and 2.27-GHz Bandwidth.
VLSI Circuits
Wei Deng, Zipeng Chen, Haikun Jia, Shiyan Sun, Guopei Chen, Zhihua Wang, Baoyong Chi
2021 — conf
A 122-168GHz Radar/Communication Fusion-Mode Transceiver with 30GHz Chirp Bandwidth, 13dBm Psat, and 8.3dBm OP1dB in 28nm CMOS.
VLSI Circuits
Zipeng Chen, Wei Deng, Haikun Jia, Pingda Guan, Taikun Ma, Shiyan Sun, Xiangrong Huang, Guopei Chen, Ruichang Ma, Shengnan Dong, Luqiang Duan, Zhihua Wang, Baoyong Chi
2021 — conf
A 24-30GHz 4-Element Phased Array Transceiver with Low Insertion Loss Compact T/R Switch and Bidirectional Phase Shifter in 65 nm CMOS Technology.
A-SSCC
Xiangrong Huang, Haikun Jia, Shengnan Dong, Wei Deng, Zhihua Wang, Baoyong Chi
2021 — conf
A 33.5-37.5 GHz 4-Element Phased-Array Transceiver Front-End with High-Accuracy Low-Variation 6-bit Resolution 360° Phase Shift and 0~31.5 dB Gain Control in 65 nm CMOS.
A-SSCC
Pingda Guan, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi
2021 — conf
A 60GHz 186.5dBc/Hz FoM Quad-Core Fundamental VCO Using Circular Triple-Coupled Transformer with No Mode Ambiguity in 65nm CMOS.
ISSCC
Haikun Jia, Wei Deng, Pingda Guan, Zhihua Wang, Baoyong Chi
2021 — conf
A C-band FMCW Radar Transmitter with a 22 dBm Output Power Series-stacking CMCD PA for Long-distance Detection in 180-nm CMOS Technology.
ICTA
Xiangrong Huang, Wei Deng, Haikun Jia, Yuhui Wei, Zhihua Wang, Baoyong Chi
2021 — conf
A Highly Integrated Energy-efficient CMOS Millimeter-wave Transceiver with Direct-modulation Digital Transmitter, Quadrature Phased-coupled Frequency Synthesizer and Substrate-Integrated Waveguide E-shaped Patch Antenna.
ASP-DAC
Wei Deng, Zheng Song, Ruichang Ma, Haikun Jia, Baoyong Chi
2021 — conf
An 8.2-to-21.5 GHz Dual-Core Quad-Mode Orthogonal-Coupled VCO with Concurrently Dual-Output using Parallel 8-Shaped Resonator.
CICC
Wei Deng, Haikun Jia, Rui Wu, Shiyan Sun, Chenggang Li, Zhihua Wang, Baoyong Chi
2021 — conf
An Ultra-Compact 16-to-45 GHz Power Amplifier within A Single Inductor Footprint Using Folded Transformer Technique.
CICC
Pingda Guan, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi
2021 — conf
Optimization methods for high inductance-density inductors for high speed integrated circuits.
ICTA
Ziyue Dang, Haikun Jia, Wei Deng, Zhihua Wang, Baoyong Chi
2020 J jnl
A 27-31 ​GHz 6-bit phase shifter with low phase error/gain variation in 65 ​nm CMOS.
Microelectron. J.
Zipeng Chen, An'an Li, Haikun Jia, Baoyong Chi
2020 J jnl
A 35-GHz TX and RX Front End With High TX Output Power for Ka-Band FMCW Phased-Array Radar Transceivers in CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst.
Wei Deng, Rui Wu, Zhijie Chen, Manlai Ding, Haikun Jia, Baoyong Chi
2020 — conf
A 44-52 GHz Reflection-type Phase Shifter with 1.4° Phase Resolution in 28nm CMOS Process.
ICTA
Shengnan Dong, Zipeng Chen, Haikun Jia, Wei Deng, Baoyong Chi
2020 — conf
A 53.1-to-64.5 GHz In-Phase Coupled Quadrature Injection-Locked Oscillator with Transformer-Based I/Q-Phase Differential Injection Scheme.
ICTA
Chenggang Li, Rui Wu, Haikun Jia, Wei Deng, Baoyong Chi
2020 J jnl
A U-Band PLL Using Implicit Distributed Resonators for Sub-THz Wireless Transceivers in 40 nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Zipeng Chen, Wei Deng, Haikun Jia, Yibo Liu, Jianxi Wu, Pingda Guan, Jinyu Zhu, Luhong Mao, Zhihua Wang, Baoyong Chi
2020 J jnl
An Energy-Efficient 10-Gb/s CMOS Millimeter-Wave Transceiver With Direct-Modulation Digital Transmitter and I/Q Phase-Coupled Frequency Synthesizer.
IEEE J. Solid State Circuits
Wei Deng, Zheng Song, Ruichang Ma, Jianfu Lin, Yutian Li, Jialiang Ye, Shangcheng Kong, Sanming Hu, Haikun Jia, Baoyong Chi
2019 J jnl
International Solid-State Circuits Conference 2019 aims at "envisioning the future".
Sci. China Inf. Sci.
Haikun Jia, Baoyong Chi
2018 J jnl
A Full Ka-Band Power Amplifier With 32.9% PAE and 15.3-dBm Power in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Haikun Jia, Clarissa C. Prawoto, Baoyong Chi, Zhihua Wang, C. Patrick Yue
2017 J jnl
An 80-83 GHz CMOS DCO based on DiCAD technique for size, linearity and noise optimization.
Sci. China Inf. Sci.
Zhiping Wang, Haikun Jia, Lixue Kuang, Baoyong Chi
2016 — conf
A 32.9% PAE, 15.3 dBm, 21.6-41.6 GHz power amplifier in 65nm CMOS using coupled resonators.
A-SSCC
Haikun Jia, Clarissa C. Prawoto, Baoyong Chi, Zhihua Wang, C. Patrick Yue
2016 J jnl
A 77 GHz Frequency Doubling Two-Path Phased-Array FMCW Transceiver for Automotive Radar.
IEEE J. Solid State Circuits
Haikun Jia, Lixue Kuang, Wei Zhu, Zhiping Wang, Feng Ma, Zhihua Wang, Baoyong Chi
2016 J jnl
Simple and robust self-healing technique for millimetre-wave amplifiers.
IET Circuits Devices Syst.
Haikun Jia, Baoyong Chi, Lixue Kuang, Zhihua Wang
2015 — conf
25.6 A 70.5-to-85.5GHz 65nm phase-locked loop with passive scaling of loop filter.
ISSCC
Zhiqiang Huang, Howard Cam Luong, Baoyong Chi, Zhihua Wang, Haikun Jia
2015 J jnl
A 60-GHz CMOS Dual-Mode Power Amplifier With Efficiency Enhancement at Low Output Power.
IEEE Trans. Circuits Syst. II Express Briefs
Lixue Kuang, Baoyong Chi, Haikun Jia, Wen Jia, Zhihua Wang
2015 — conf
A 60-GHz wireless transceiver with dual-mode power amplifier for IEEE 802.11ad in 65nm CMOS.
ASICON
Baoyong Chi, Lixue Kuang, Haikun Jia, Zhiping Wang, Zhihua Wang
2015 — conf
A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS.
A-SSCC
Haikun Jia, Baoyong Chi, Lixue Kuang, Wei Zhu, Zhiping Wang, Feng Ma, Zhihua Wang
2015 — conf
An 8.2 GHz triple coupling low-phase-noise class-F QVCO in 65nm CMOS.
ESSCIRC
Haikun Jia, Baoyong Chi, Zhihua Wang
2014 J jnl
A 38- to 40-GHz Current-Reused Active Phase Shifter Based on the Coupled Resonator.
IEEE Trans. Circuits Syst. II Express Briefs
Haikun Jia, Baoyong Chi, Lixue Kuang, Zhihua Wang
2014 J jnl
A 77 GHz FMCW radar transmitter with reconfigurable power amplifier in 65 nm CMOS.
Microelectron. J.
Haikun Jia, Baoyong Chi, Lixue Kuang, Zhihua Wang
2012 J jnl
A 1 V, 69-73 GHz CMOS power amplifier based on improved Wilkinson power combiner.
Microelectron. J.
Haikun Jia, Baoyong Chi, Lixue Kuang, Zhihua Wang