Haijiang Wang

20 papers Journal 15Unranked 5
YearRankTypeTitle / Venue / Authors
2024 J jnl
Appl. Soft Comput.
Zhihua Deng, Ming Chen, Qihong Chen, Haijiang Wang
2022 J jnl
Comput. Secur.
Yaguan Qian, Jiamin Wang, Haijiang Wang, Zhaoquan Gu, Bin Wang, Shaoning Zeng, Wassim Swaileh
2020 J jnl
Future Gener. Comput. Syst.
Xing Chen, Haijiang Wang, Yun Ma, Xianghan Zheng, Longkun Guo
2019 J jnl
Int. J. Robotics Autom.
Jinghong Han, Haijiang Wang, Mengqing Gao, Min Sun
2019 J jnl
IEEE Access
Haijiang Wang, Nan Shao, Yuanbo Ran
2019 J jnl
Entropy
Qiuwei Xing, Haijiang Wang, Mingbiao Chen, Zhaoyun Chen, Rongbin Li, Peipeng Jin, Yong Zhang
2019 J jnl
J. Inf. Secur. Appl.
Dongmei Li, Xiaolei Dong, Zhenfu Cao, Haijiang Wang
2019 conf
ISPA/BDCloud/SocialCom/SustainCom
Haijiang Wang, Yun Ma, Xianghan Zheng, Xing Chen, Longkun Guo
2019 J jnl
Sci. China Inf. Sci.
Xing Chen, Junxin Lin, Yun Ma, Bing Lin, Haijiang Wang, Gang Huang
2018 conf
IEEE CLOUD
Zhanghui Liu, Tao Xiang, Bing Lin, Xinshu Ye, Haijiang Wang, Ying Zhang, Xing Chen
2018 J jnl
Sci. China Inf. Sci.
Dongmei Li, Xiaolei Dong, Zhenfu Cao, Haijiang Wang
2018 conf
CSPS (2)
Haijiang Wang, Yuanbo Ran, Shuo Liu, Yangyang Deng, Debin Su
2017 conf
CSPS
Fugui Zhang, Yang Qi, Haijiang Wang
2016 J jnl
EURASIP J. Wirel. Commun. Netw.
Haijiang Wang, Yangyang Deng, Bao Dong, Ling Yang, Zhendong Yao, Debin Su
2016 J jnl
Signal Process.
Yong Zhang, Peiyu He, Haijiang Wang
2016 J jnl
Signal Process.
Yong Zhang, Peiyu He, Haijiang Wang
2015 conf
FSKD
Haijiang Wang, Wenhong Liu, Fugui Zhang, Simon X. Yang, Lin Zhang
2015 J jnl
EURASIP J. Wirel. Commun. Netw.
Haijiang Wang, Yangyang Deng, Bao Dong, Debin Su
2014 J jnl
EURASIP J. Adv. Signal Process.
Haijiang Wang, Ling Yang
2013 J jnl
EURASIP J. Wirel. Commun. Netw.
Haijiang Wang, Zhao Shi, Jianxin He
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False