Hafizur Rahaman

305 papers A 1B 2C 18Misc 21Journal 89Unranked 173
YearRankTypeTitle / Venue / Authors
2026 J jnl
A New Hardware Trojan Detection Approach Using Skip Connection Based Multilayer Perceptron Network.
SN Comput. Sci.
Banalata Bhunia, Malay Kule, Hafizur Rahaman
2026 J jnl
ASIC Design and Implementation of Fast 2D Gaussian Filter Chip Using Approximate Computing.
Circuits Syst. Signal Process.
Utsab Dhara, Subhrajyoti Choudhury, Sudip Ghosh, Hafizur Rahaman
2026 J jnl
Architectural Design and Performance Analysis of FPGA based AI Accelerators: A Comprehensive Review.
CoRR
Soumita Chatterjee, Sudip Ghosh, Tamal Ghosh, Hafizur Rahaman
2026 J jnl
Fault-Tolerant Quantum Realization of Nikhilam Multiplier with Clifford+T-group.
SN Comput. Sci.
Laxmidhar Biswal, Anirban Bhattacharjee, Chandan Bandyopadhyay, Hafizur Rahaman
2026 J jnl
LUT-Based Mapping of Logic Functions to Partitioned Memristive Crossbar Using MAGIC for High-Throughput Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pooja Joshi, Anindita Chakraborty, Hafizur Rahaman
2026 J jnl
Thermal and Congestion-aware Deadlock-free Application-specific Novel Halted Routing Strategy in 3D NoCs.
Integr.
Priyajit Mukherjee, Sayani Ghosh, Hafizur Rahaman, Santanu Chattopadhyay
2025 — conf
Optimization and Security of AI Models for Deployment at Edge: A Comprehensive Review.
ISVLSI
Hafizur Rahaman, Chandan Giri, Surajit Kumar Roy, Amlan Chakrabarti
2024 — conf
A Logic Testing Approach for Hardware Trojan Detection Using Nature Inspired Algorithms.
ISED
Banalata Bhunia, Debarshi Dey, Malay Kule, Hafizur Rahaman
2024 — conf
An Improved Circuit Transformation Technique for Nearest Neighbor Implementation of Quantum Circuits.
VDAT
Sourodeep Kundu, Subham Kumar, Laxmidhar Biswal, Chandan Bandyopadhyay, Anirban Bhattacharjee, Hafizur Rahaman
2024 — conf
Droplet Routing in Digital Microfluidic Biochip using Agglomerative Hierarchical Clustering.
DoSIER
Jayanti Das, Indrajit Pan, Hafizur Rahaman
2024 — conf
Fault Testing in AI-Accelerators: A Review.
ATS
Bhargab B. Bhattacharya, Debesh K. Das, Subhajit Chatterjee, Hafizur Rahaman
2024 — conf
Parametric Fault Diagnosis of Analog Circuits using Adaptive Boosting.
ISVLSI
Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman
2023 — conf
A comprehensive review on ReRAM-based accelerators for deep learning.
ISDCS
Pooja Joshi, Hafizur Rahaman
2023 — conf
Electrothermal modeling of Multilayer Graphene Nanoribbon (MLGNR) Interconnect considering Energy-per-Layer Screening.
ISDCS
Santasri Giri Tunga, Subhajit Das, Sandip Bhattacharya, Hafizur Rahaman
2023 — conf
Hardware Performance Analysis of N-bit CLA on FPGA and Programmable SoC.
IAIT
Piyali Saha, Sudip Ghosh, Debajyoti Pal, Hafizur Rahaman
2023 — conf
Implementation of Area Efficient Adders for Inexact Computing.
ISDCS
Rounak Roy, Sudip Ghosh, Hafizur Rahaman
2023 — conf
Memristor based In-Memory Computing for Edge AI Applications.
ISDCS
Pooja Joshi, Hafizur Rahaman
2023 — conf
Power and Delay Efficient Hardware Implementation with ATPG for Vedic Multiplier Using Urdhva Tiryagbhyam Sutra.
IAIT
Anchit Arun, Ananya Chakraborty, Priyanka Dutta, Debajyoti Pal, Tridibesh Nag, Debashis De, Sudip Ghosh, Hafizur Rahaman
2022 — conf
An Online Testing Technique for the Detection of Control Nodes Displacement Faults (CNDF) in Reversible Circuits.
VDAT
Bappaditya Mondal, Udit Narayana Kar, Chandan Bandyopadhyay, Debashri Roy, Hafizur Rahaman
2022 J jnl
An improved synthesis technique for optical circuits using MIG and XMG.
Microelectron. J.
Rakesh Das, Chandan Bandyopadhyay, Hafizur Rahaman
2022 J jnl
DFT with Universal Test Set for All Missing Gate Faults in Reversible Circuits.
J. Circuits Syst. Comput.
Joyati Mondal, Dipak Kumar Kole, Hafizur Rahaman, Debesh Kumar Das, Bhargab B. Bhattacharya
2022 J jnl
Frequency-scaled thermal-aware test scheduling for 3D ICs using machine learning based temperature estimation.
Microelectron. J.
Subhajit Chatterjee, Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman
2022 J jnl
Hardware Design with Real-Time Implementation for Security of Medical Images and EPMR.
Circuits Syst. Signal Process.
Sudip Ghosh, Yuvam Bhateja, Joshua Roy Palathinkal, Hafizur Rahaman
2022 J jnl
MEDA Based Biochips: Detection, Prevention and Rectification Techniques for Cyberphysical Attacks.
IEEE ACM Trans. Comput. Biol. Bioinform.
Pampa Howladar, Pranab Roy, Hafizur Rahaman
2022 J jnl
Multi-source data fusion technique for parametric fault diagnosis in analog circuits.
Integr.
Manas Parai, Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman
2022 A conf
Testing of Analog Circuits using Statistical and Machine Learning Techniques.
ITC
Supriyo Srimani, Hafizur Rahaman
2021 — conf
A Brief Review of Recent Studies on Performance Improvement of Graphene Nanoribbon Interconnect.
ISDCS
Santasri Giri Tunga, Subhajit Das, Hafizur Rahaman
2021 J jnl
A Statistical Approach of Analog Circuit Fault Detection Utilizing Kolmogorov-Smirnov Test Method.
Circuits Syst. Signal Process.
Supriyo Srimani, Manas Parai, Kasturi Ghosh, Hafizur Rahaman
2021 — conf
An Efficient 2D Mapping of Quantum Circuits to Nearest Neighbor Designs.
iSES
Anirban Bhattacharjee, Hafizur Rahaman
2021 J jnl
An ant colony based mapping of quantum circuits to nearest neighbor architectures.
Integr.
Anirban Bhattacharjee, Chandan Bandyopadhyay, Angshu Mukherjee, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2021 J jnl
An improved heuristic technique for nearest neighbor realization of quantum circuits in 2D architecture.
Integr.
Anirban Bhattacharjee, Chandan Bandyopadhyay, Philipp Niemann, Bappaditya Mondal, Rolf Drechsler, Hafizur Rahaman
2021 J jnl
BDD-based synthesis approach for in-memory logic realization utilizing Memristor Aided loGIC (MAGIC).
Integr.
Anindita Chakraborty, Partha Sarathi Gupta, Ritika Singh, Rakesh Das, Hafizur Rahaman
2021 J jnl
Binary decision diagram-based synthesis technique for improved mapping of Boolean functions inside memristive crossbar-slices.
IET Comput. Digit. Tech.
Anindita Chakraborty, Vivek Maurya, Sneha Prasad, Suryansh Gupta, Rajat Subhra Chakraborty, Hafizur Rahaman
2021 — conf
Design of Two-Stage Fully-Differential Driver in SAR ADC with Indirect Feedback Compensation Technique.
ISDCS
Urbashi Basumata, Annapurna Mondal, Subhajit Das, Hafizur Rahaman
2021 — conf
Detection of Hardware Trojan in Presence of Sneak Path in Memristive Nanocrossbar Circuits.
ISDCS
Subhashree Basu, Malay Kule, Hafizur Rahaman
2021 J jnl
Droplet Transportation in MEDA-Based Biochips: An Enhanced Technique for Intelligent Cross-Contamination Avoidance.
IEEE Trans. Very Large Scale Integr. Syst.
Pampa Howladar, Pranab Roy, Hafizur Rahaman
2021 J jnl
Fault-tolerant quantum implementation of conventional decoder logic with enable input.
IET Circuits Devices Syst.
Laxmidhar Biswal, Bappaditya Mondal, Hafizur Rahaman
2021 J jnl
High Performance Kernel Architecture for Convolutional Neural Network Acceleration.
J. Circuits Syst. Comput.
Anakhi Hazarika, Soumyajit Poddar, Hafizur Rahaman
2021 J jnl
Implementation of Symmetric Functions Using Memristive Nanocrossbar Arrays and their Application in Cryptography.
J. Circuits Syst. Comput.
Subhashree Basu, Malay Kule, Hafizur Rahaman
2021 — conf
Modelling, Analysis and Optimization of a 4
ISDCS
Bramh Dev Singh, Sourav Naskar, Subhajit Das, Hafizur Rahaman
2021 Misc conf
Neural Network based Indirect Estimation of Functional Parameters of Amplifier by extracting features from Wavelet Transform.
VLSID
Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman
2021 — conf
PUF Based Hardware Security: A Review.
ISDCS
Koustav Dey, Malay Kule, Hafizur Rahaman
2021 J jnl
Simulation-Based Power-Loss Optimization of General-Purpose High-Voltage SiC MOSFET Circuit Under High-Frequency Operation.
IEEE Access
Abhishek Kar, Mitiko Miura-Mattausch, Mainak Sengupta, Dondee Navarro, Hideyuki Kikuchihara, Takahiro Iizuka, Hafizur Rahaman, Hans Jürgen Mattausch
2020 — conf
A New Blind Invisible and Semi-Fragile Colour Image Watermarking Scheme in Spatial Domain.
ISDCS
Joshua Roy Palathinkal, Yuvam Bhateja, Sudip Ghosh, Hafizur Rahaman
2020 — conf
A New Digital Color Image Watermarking Algorithm with its FPGA and ASIC Implementation.
ISDCS
Shivdeep, Sudip Ghosh, Hafizur Rahaman
2020 — conf
A Short Review on Graphene Nanoribbon Interconnect.
ISDCS
Subhajit Das, Sandip Bhattacharya, Debaprasad Das, Hafizur Rahaman
2020 — conf
An Accelerated Prototype with Movidius Neural Compute Stick for Real-Time Object Detection.
ISDCS
S. P. Kaarmukilan, Anakhi Hazarika, Amal Thomas K., Soumyajit Poddar, Hafizur Rahaman
2020 — conf
An Efficient Test Scheduling to Co-optimize Test Time and Peak Power for 3D ICs.
ISDCS
Subhajit Chatterjee, Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman
2020 J jnl
Analog Circuit Fault Detection by Impulse Response-Based Signature Analysis.
Circuits Syst. Signal Process.
Manas Kumar Parai, Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman
2020 — conf
DFT Based Simulation for Predicting Alcohol Adsorption on Oxygenated Functional Group Containing GO and rGO Based Gas Sensor Devices.
ISDCS
Indranil Maity, Hafizur Rahaman, Partha Bhattacharyya
2020 — conf
Design of a low power, high speed self calibrated dynamic latched comparator.
ISDCS
Sumit Kumar Jaiswal, Annapurna Mondal, Supriyo Srimani, Subhajit Das, Kasturi Ghosh, Hafizur Rahaman
2020 — conf
Efficient Implementation of Nearest Neighbor Quantum Circuits Using Clustering with Genetic Algorithm.
ISMVL
Anirban Bhattacharjee, Chandan Bandyopadhyay, Angshu Mukherjee, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2020 — conf
Fault-tolerant Quantum Implementation of Priority Encoder Circuit using Clifford+T-group.
ISDCS
Laxmidhar Biswal, Khokan Mondal, Anirban Bhattacharjee, Hafizur Rahaman
2020 — conf
Heat Mitigation in 3D ICs by Improvised TTSV Structure.
ISDCS
Debika Chaudhuri, Dalia Nandi Das, Hafizur Rahaman, Tamal Ghosh
2020 — conf
History Effect on Circuit Performance of SOI-MOSFETs.
ISDCS
Soumajit Ghosh, Mitiko Miura-Mattausch, Takahiro Iizuka, Hideyuki Kikuchihara, Hafizur Rahaman, Hans Jürgen Mattausch
2020 — conf
Image Classification Based on Approximate Wavelet Transform and Transfer Learning on Deep Convolutional Neural Networks.
ISDCS
Moumita Acharya, Soumyajit Poddar, Amlan Chakrabarti, Hafizur Rahaman
2020 J jnl
Linear Nearest Neighbor Realization of Quantum Circuits Using Clustering and Look-ahead Policy.
J. Circuits Syst. Comput.
Anirban Bhattacharjee, Chandan Bandyopadhyay, Bappaditya Mondal, Hafizur Rahaman
2020 — conf
Microfluidic Cyberphysical Diagnostic System: An ANN Based Application.
ISDCS
Pranab Roy, Amiya Sahoo, Mriganka Chakrabarty, Hafizur Rahaman
2020 — conf
Modeling and Analysis of 3D IC Structures for Heat Mitigation by Thermal Through Silicon Vias.
ICIIS
Debika Chaudhuri, Dalia Nandi Das, Hafizur Rahaman, Tamal Ghosh
2020 — conf
Post Synthesis-Optimization of Reversible Circuit using Template Matching.
VDAT
Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2020 — conf
Potentiality of Data Fusion in Analog Circuit Fault Diagnosis.
ATS
Manas Kumar Parai, Kasturi Ghosh, Hafizur Rahaman
2020 J jnl
Survey on memory management techniques in heterogeneous computing systems.
IET Comput. Digit. Tech.
Anakhi Hazarika, Soumyajit Poddar, Hafizur Rahaman
2020 — conf
Symmetric Function Based Memristive Polimino PUF with Enhanced Security.
iSES
Subhashree Basu, Malay Kule, Hafizur Rahaman
2020 — conf
Valley Resolved Current Components Analysis of Monolayer TMDFETs.
ISDCS
Uttam Kumar Sahu, Ajoy Kumar Saha, Partha Sarathi Gupta, Hafizur Rahaman
2019 J jnl
A Complete Routing Simulator for Digital Microfluidic Biochip.
Int. J. Inf. Syst. Model. Des.
Rupam Bhattacharya, Pranab Roy, Hafizur Rahaman
2019 J jnl
A High-performance Homogeneous Droplet Routing Technique for MEDA-based Biochips.
ACM J. Emerg. Technol. Comput. Syst.
Pampa Howladar, Pranab Roy, Hafizur Rahaman
2019 J jnl
A Surface Potential-Based Model for Dual Gate Bilayer Graphene Field Effect Transistor Including the Capacitive Effects.
J. Circuits Syst. Comput.
Sudipta Bardhan, Manodipan Sahoo, Hafizur Rahaman
2019 — conf
A low power driver amplifier for Fully Differential ADC.
ISDCS
Sagnik Bhar, Annapurna Mondal, Supriyo Srimani, Indranil Hatai, Subhajit Das, Kasturi Ghosh, Hafizur Rahaman
2019 — conf
An Approach for Detection of Node Displacement Fault (NDF) in Reversible Circuit.
VDAT
Bappaditya Mondal, Anirban Bhattacharjee, Subham Saha, Shalini Parekh, Chandan Bandyopadhyay, Hafizur Rahaman
2019 J jnl
Approach of genetic algorithm for power-aware testing of 3D IC.
IET Comput. Digit. Tech.
Tanusree Kaibartta, Chandan Giri, Hafizur Rahaman, Debesh Kumar Das
2019 J jnl
Boltzmann transport equation-based semi-classical drain current model for bilayer GFET including scattering effects.
IET Circuits Devices Syst.
Sudipta Bardhan, Manodipan Sahoo, Hafizur Rahaman
2019 J jnl
Boolean Difference Technique for Detecting All Missing Gate and Stuck-at Faults in Reversible Circuits.
J. Circuits Syst. Comput.
Joyati Mondal, Bappaditya Mondal, Dipak Kumar Kole, Hafizur Rahaman, Debesh Kumar Das
2019 — conf
Comparative Stability Analysis of Pristine and AsF5 Intercalation Doped Top Contact Graphene Nano Ribbon Interconnects.
ISDCS
Subhajit Das, Sandip Bhattacharya, Debaprasad Das, Hafizur Rahaman
2019 J jnl
Design and synthesis of improved reversible circuits using AIG- and MIG-based graph data structures.
IET Comput. Digit. Tech.
Chandan Bandyopadhyay, Rakesh Das, Anupam Chattopadhyay, Hafizur Rahaman
2019 J jnl
Dilution with Digital Microfluidic Biochips: How Unbalanced Splits Corrupt Target-Concentration.
CoRR
Sudip Poddar, Robert Wille, Hafizur Rahaman, Bhargab B. Bhattacharya
2019 — conf
Distortion Analysis Using Volterra Kernel for Amplifier Circuits.
iSES
Supriyo Srimani, Ravi Singh, Manas Kumar Parai, Kasturi Ghosh, Hafizur Rahaman
2019 — conf
Effect of Volumetric Split-Errors on Reactant-Concentration During Sample Preparation with Microfluidic Biochips.
ACSS (2)
Sudip Poddar, Robert Wille, Hafizur Rahaman, Bhargab B. Bhattacharya
2019 — conf
Efficient Implementation of Fault-Tolerant 4: 1 Quantum Multiplexer (QMUX) Using Clifford+T-Group.
iSES
Laxmidhar Biswal, Chandan Bandyopadhyay, Hafizur Rahaman
2019 J jnl
Error-Oblivious Sample Preparation With Digital Microfluidic Lab-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sudip Poddar, Robert Wille, Hafizur Rahaman, Bhargab B. Bhattacharya
2019 — conf
Estimation of non-linear effects for Capacitive DAC in SAR ADC: An Analytical Model.
ISDCS
Ajay Kumar Chowdhary, Supriyo Srimani, Subhajit Das, Kasturi Ghosh, Hafizur Rahaman
2019 J jnl
Fast locking, startup-circuit free, low area, 32-phase analog DLL.
Integr.
Sabir Ali Mondal, Pradip Mandal, Hafizur Rahaman
2019 — conf
Fault-tolerant Quantum Implementation of 1-bit and 4-bit Comparator Circuit using Clifford+T-group.
ISED
Laxmidhar Biswal, Chandan Bandyopadhyay, Hafizur Rahaman
2019 — conf
Hardware Efficient Convolution Processing Unit for Deep Neural Networks.
ISDCS
Anakhi Hazarika, Soumyajit Poddar, Hafizur Rahaman
2019 Misc conf
Improved Look-Ahead Approaches for Nearest Neighbor Synthesis of 1D Quantum Circuits.
VLSID
Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2019 J jnl
Maximal Defect-Free Component in Nanoscale Crossbar Circuits Amidst Stuck-Open and Stuck-Closed Faults.
J. Circuits Syst. Comput.
Malay Kule, Hafizur Rahaman, Bhargab B. Bhattacharya
2019 — conf
Micro-electrode-dot Array Based Biochips : Advantages of Using Different Shaped CMAs.
ISVLSI
Pampa Howladar, Pranab Roy, Hafizur Rahaman
2019 J jnl
New techniques for fault-tolerant decomposition of Multi-Controlled Toffoli gate.
CoRR
Laxmidhar Biswal, Debjyoti Bhattacharjee, Anupam Chattopadhyay, Hafizur Rahaman
2019 — conf
Optimization of DC-DC Power Converter Design with Second Generation HiSIM_HV Model.
ISDCS
Soumajit Ghosh, Vishal Roshan, Avishek Dutta, Subhajit Das, Tapas Kumar Maiti, Mitiko Miura-Mattausch, Hafizur Rahaman
2019 Misc conf
Optimizing Quantum Circuits for Modular Exponentiation.
VLSID
Rakesh Das, Anupam Chattopadhyay, Hafizur Rahaman
2019 J jnl
Prevention of Highly Power-Efficient Circuits due to Short-Channel Effects in MOSFETs.
IEICE Trans. Electron.
Arnab Mukhopadhyay, Tapas Kumar Maiti, Sandip Bhattacharya, Takahiro Iizuka, Hideyuki Kikuchihara, Mitiko Miura-Mattausch, Hafizur Rahaman, Sadayuki Yoshitomi, Dondee Navarro, Hans Jürgen Mattausch
2019 C conf
Shift and Accumulate Convolution Processing Unit.
TENCON
Anakhi Hazarika, Avinash Jain, Soumyajit Poddar, Hafizur Rahaman
2018 — conf
A Heuristic Qubit Placement Strategy for Nearest Neighbor Realization in 2D Architecture.
VDAT
Anirban Bhattacharjee, Chandan Bandyopadhyay, Laxmidhar Biswal, Hafizur Rahaman
2018 — conf
A Novel Approach for Nearest Neighbor Realization of 2D Quantum Circuits.
ISVLSI
Anirban Bhattacharjee, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2018 J jnl
A template-based technique for efficient Clifford+T-based quantum circuit implementation.
Microelectron. J.
Laxmidhar Biswal, Rakesh Das, Chandan Bandyopadhyay, Anupam Chattopadhyay, Hafizur Rahaman
2018 — conf
An Angular Steiner Tree Based Global Routing Algorithm for Graphene Nanoribbon Circuit.
VDAT
Arindam Sinharay, Subrata Das, Pranab Roy, Hafizur Rahaman
2018 J jnl
Analysis of Simultaneous Switching Noise and IR-Drop in Side-Contact Multilayer Graphene Nanoribbon Power Distribution Network.
J. Circuits Syst. Comput.
Sandip Bhattacharya, Debaprasad Das, Hafizur Rahaman
2018 Misc conf
Computing Fréchet Distance Metric Based L-Shape Tile Decomposition for E-Beam Lithography.
VLSID
Arindam Sinharay, Pranab Roy, Hafizur Rahaman
2018 J jnl
Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach.
Circuits Syst. Signal Process.
Subhajit Das, Sudip Ghosh, Nachiketa Das, Santi P. Maity, Hafizur Rahaman, Reshmi Maity, Niladri Maity
2018 J jnl
FPGA implementation of semi-fragile reversible watermarking by histogram bin shifting in real time.
J. Real Time Image Process.
Sambaran Hazra, Sudip Ghosh, Sayandip De, Hafizur Rahaman
2018 J jnl
Homogeneous droplet routing in DMFB: An enhanced technique for high performance bioassay implementation.
Integr.
Rupam Bhattacharya, Pranab Roy, Hafizur Rahaman
2018 — conf
Identification of Faulty TSV with a Built-In Self-Test Mechanism.
ATS
Dilip Kumar Maity, Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman
2018 J jnl
Improved circuit synthesis approach for exclusive-sum-of-product-based reversible circuits.
IET Comput. Digit. Tech.
Chandan Bandyopadhyay, Shalini Parekh, Hafizur Rahaman
2018 Misc conf
Optimized Concurrent Testing of Digital Microfluidic Biochips.
VLSID
Sourav Ghosh, Hafizur Rahaman, Chandan Giri
2018 — conf
Quantum Domain Design of Clifford+T-Based Bidirectional Barrel Shifter.
VDAT
Laxmidhar Biswal, Anirban Bhattacharjee, Rakesh Das, Gopinath Thirunavukarasu, Hafizur Rahaman
2018 J jnl
Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision Diagrams.
Microelectron. J.
Chandan Bandyopadhyay, Rakesh Das, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2018 — conf
Test Diagnosis of Digital Microfluidic Biochips Using Image Segmentation.
ATS
Sourav Ghosh, Hafizur Rahaman, Chandan Giri
2017 — conf
Adaptive medical detection system: An iterative averaging method for automated detection analysis using DMFBs.
ISED
Pranab Roy, Amiya Sahoo, Hafizur Rahaman
2017 — conf
All optical design of cost efficient multiplier circuit using terahertz optical asymmetric demultiplexer.
ISED
Arpan Manna, Subham Saha, Rakesh Das, Chandan Bandyopadhyay, Hafizur Rahaman
2017 J jnl
Analysis of Crosstalk-Induced Effects in Multilayer Graphene Nanoribbon Interconnects.
J. Circuits Syst. Comput.
Manodipan Sahoo, Hafizur Rahaman
2017 — conf
Detection and localization of appearance faults in reversible circuits.
ISED
Bappaditya Mondal, Chandan Bandyopadhyay, Hafizur Rahaman
2017 — conf
Hausdorff Distance Driven L-Shape Matching Based Layout Decomposition for E-Beam Lithography.
VDAT
Arindam Sinharay, Pranab Roy, Hafizur Rahaman
2017 — conf
Improving the Design of Nearest Neighbor Quantum Circuits in 2D Space.
VDAT
Neha Chaudhuri, Chandan Bandyopadhyay, Hafizur Rahaman
2017 — conf
Modeling and Analysis of Transient Heat for 3D IC.
VDAT
Subhajit Chatterjee, Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman
2017 — conf
OTORNoC: Optical tree of rings network on chip for 1000 core systems.
ISED
Soumyajit Poddar, Suraj, Amit Kumar Yadav, Hafizur Rahaman
2017 C ed.
Reversible Computation - 9th International Conference, RC 2017, Kolkata, India, July 6-7, 2017, Proceedings
RC
Iain Phillips, Hafizur Rahaman
2017 J jnl
Selected Articles from the IEEE ISED 2016 Conference.
J. Low Power Electron.
Jimson Mathew, Hafizur Rahaman, Priyadarsan Patra, Dhiraj K. Pradhan
2017 — conf
TSV repairing for 3D ICs using redundant TSV.
ISED
Sudeep Ghosh, Surajit Kumar Roy, Hafizur Rahaman, Chandan Giri
2016 — conf
A synthesis approach for ESOP-based reversible circuit.
ICACCI
Chandan Bandyopadhyay, Shalini Parekh, Hafizur Rahaman
2016 — conf
A testing scheme for mixed-control based reversible circuits.
ISED
Bappaditya Mondal, Chandan Bandyopadhyay, Hafizur Rahaman
2016 — conf
An automated design of pin-constrained digital microfluidic biochip on MEDA architecture.
ICACCI
Pampa Howladar, Pranab Roy, Hafizur Rahaman
2016 — conf
BDD based synthesis technique for design of high-speed memristor based circuits.
VDAT
Anindita Chakraborty, Rakesh Das, Chandan Bandyopadhyay, Hafizur Rahaman
2016 — conf
Cross-reference EWOD driving scheme and cross-contamination aware net placement technique for MEDA based DMFBs.
ICACCI
Pampa Howladar, Debashri Roy, Pranab Roy, Hafizur Rahaman
2016 J jnl
Design of a High-Performance CDMA-Based Broadcast-Free Photonic Multi-Core Network on Chip.
ACM Trans. Embed. Comput. Syst.
Soumyajit Poddar, Prasun Ghosal, Hafizur Rahaman
2016 — conf
Design of memristor-based up-down counter using material implication logic.
ICACCI
Anindita Chakraborty, Aparna Dhara, Hafizur Rahaman
2016 — conf
High-speed decoder design using memristor-based nano-crossbar architecture.
ISED
Malay Kule, Avik Dutta, Hafizur Rahaman, Bhargab B. Bhattacharya
2016 Misc conf
Improving the Realization of Multiple-Control Toffoli Gates Using the NCVW Quantum Gate Library.
VLSID
Laxmidhar Biswal, Chandan Bandyopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2016 J jnl
Investigating the Applicability of Graphene Nanoribbon as Signal and Power Interconnects for Nanometer Designs.
J. Circuits Syst. Comput.
Debaprasad Das, Hafizur Rahaman
2016 J jnl
Modeling and analysis of crosstalk induced overshoot/undershoot effects in multilayer graphene nanoribbon interconnects and its impact on gate oxide reliability.
Microelectron. Reliab.
Manodipan Sahoo, Hafizur Rahaman
2016 — conf
Nearest-Neighbor and Fault-Tolerant Quantum Circuit Implementation.
ISMVL
Laxmidhar Biswal, Chandan Bandyopadhyay, Anupam Chattopadhyay, Robert Wille, Rolf Drechsler, Hafizur Rahaman
2016 J jnl
Novel Wire Planning Schemes for Pin Minimization in Digital Microfluidic Biochips.
IEEE Trans. Very Large Scale Integr. Syst.
Pranab Roy, Swati Saha, Hafizur Rahaman, Parthasarathi Dasgupta
2016 J jnl
Optimization of Test Wrapper for TSV Based 3D SOCs.
J. Electron. Test.
Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman
2016 — conf
Parametric Fault Detection in Analog Circuits: A Statistical Approach.
ATS
Supriyo Srimani, Kasturi Ghosh, Hafizur Rahaman
2016 J jnl
Reversible Synthesis of Symmetric Functions with a Simple Regular Structure and Easy Testability.
ACM J. Emerg. Technol. Comput. Syst.
Arighna Deb, Debesh K. Das, Hafizur Rahaman, Robert Wille, Rolf Drechsler, Bhargab B. Bhattacharya
2016 — conf
Synthesis aware sample preparation techniques using random sample sets in DMFB.
VDAT
Pranab Roy, Sudeshna Chakraborty, Hafizur Rahaman
2016 — conf
TSV-aware 3-D IC structural planning with irregular die-size.
APCCAS
Arko Dutt, Pranab Roy, Hafizur Rahaman
2016 — conf
Temperature dependent IR-drop and delay analysis in side-contact multilayer graphene nanoribbon based power interconnects.
VDAT
Sandip Bhattacharya, Debaprasad Das, Hafizur Rahaman
2016 — conf
VLSI thermal placement issues: A cooperative game theory based approach.
ISED
Arindam Sinharay, Pranab Roy, Hafizur Rahaman
2015 — conf
3D integration in biochips: New proposed architectures for 3D applications in ATDA based digital microfluidic biochips.
DTIS
Pranab Roy, Pampa Howladar, Raja Dastidar, Hafizur Rahaman, Parthasarathi Dasgupta
2015 J jnl
A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines.
IEEE Trans. Computers
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
2015 C conf
A thermal estimation model for 3D IC using liquid cooled microchannels and thermal TSVs.
VLSI-SoC
Surajit Kumar Roy, Supriyo Mandal, Chandan Giri, Hafizur Rahaman
2015 — conf
Adaptive CDMA based multicast method for photonic networks on chip.
SoCC
Soumyajit Poddar, Prasun Ghosal, Hafizur Rahaman
2015 Misc conf
All Optical Implementation of Mach-Zehnder Interferometer Based Reversible Sequential Counters.
VLSID
Pratik Dutta, Chandan Bandyopadhyay, Hafizur Rahaman
2015 — conf
An adaptive feedback based reversible watermarking algorithm using difference expansion.
ReTIS
Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi Prasad Maity, Hafizur Rahaman
2015 Misc conf
BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits.
VLSID
Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2015 C conf
Boolean Difference Technique for Detecting All Missing Gate Faults in Reversible Circuits.
DDECS
Joyati Mondal, Bappaditya Mondal, Dipak Kumar Kole, Hafizur Rahaman, Debesh K. Das
2015 J jnl
Field Programmable Gate Array and System-on-Chip Based Implementation of Discrete Fast Walsh-Hadamard Transform Domain Image Watermarking Architecture for Real-Time Applications.
J. Low Power Electron.
Sudip Ghosh, Arijit Biswas, Santi Prasad Maity, Hafizur Rahaman
2015 — conf
Improved supply regulation and temperature compensated current reference circuit with low process variations.
VDAT
Suraj Gupta, Sabir Ali Mondal, Hafizur Rahaman
2015 J jnl
Load management scheme for energy holes reduction in wireless sensor networks.
Comput. Electr. Eng.
Prasenjit Chanak, Indrajit Banerjee, Hafizur Rahaman
2015 J jnl
Modeling of Crosstalk Induced Effects in Copper-Based Nanointerconnects: An ABCD Parameter Matrix-Based Approach.
J. Circuits Syst. Comput.
Manodipan Sahoo, Hafizur Rahaman
2015 J jnl
Offline Washing Schemes for Residue Removal in Digital Microfluidic Biochips.
ACM Trans. Design Autom. Electr. Syst.
Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2015 J jnl
Optimisation of test architecture in three-dimensional stacked integrated circuits for partial stack/complete stack using hard system-on-chips.
IET Comput. Digit. Tech.
Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman
2015 — conf
Recovery of faulty TSVs in 3D ICs.
ISQED
Surajit Kumar Roy, Kaustav Roy, Chandan Giri, Hafizur Rahaman
2015 J jnl
Selected Articles from the IEEE ISED 2014 Conference.
J. Low Power Electron.
Jimson Mathew, Hafizur Rahaman, Priyadarsan Patra, Dhiraj K. Pradhan
2014 — conf
A 45 uW 13 pJ/conv-step 7.4-ENOB 40 kS/s SAR ADC for digital microfluidic biochip applications.
VDAT
Indrajit Das, Manodipan Sahoo, Pranab Roy, Hafizur Rahaman
2014 — conf
A Cube Pairing Approach for Synthesis of ESOP-Based Reversible Circuit.
ISMVL
Chandan Bandyopadhyay, Hafizur Rahaman, Rolf Drechsler
2014 — conf
A Novel GNR Interconnect Model to Reduce Crosstalk Delay.
ISED
Sandip Bhattacharya, Debaprasad Das, Hafizur Rahaman
2014 Misc conf
A Novel Wire Planning Technique for Optimum Pin Utilization in Digital Microfluidic Biochips.
VLSID
Pranab Roy, Samadrita Bhattacharya, Rupam Bhattacharyay, Firdousi Jamil Imam, Hafizur Rahaman, Parthasarathi Dasgupta
2014 C conf
A layout based customized testing technique for total microfluidic operations in digital microfluidic biochips.
DDECS
Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2014 — conf
A new technique for layout based functional testing of modules in Digital Microfluidic Biochips.
EWDTS
Pranab Roy, Samadrita Bhattacharya, Hafizur Rahaman, Parthasarathi Dasgupta
2014 — conf
All optical implementation of Mach-Zehnder interferometer based reversible sequential circuit.
VDAT
Pratik Dutta, Chandan Bandyopadhyay, Hafizur Rahaman
2014 Misc conf
An ABCD Parameter Based Modeling and Analysis of Crosstalk Induced Effects in Multiwalled Carbon Nanotube Bundle Interconnects.
VLSID
Manodipan Sahoo, Prasun Ghosal, Hafizur Rahaman
2014 C conf
An ABCD parameter based modeling and analysis of crosstalk induced effects in Multilayer Graphene Nano Ribbon interconnects.
ISCAS
Manodipan Sahoo, Hafizur Rahaman
2014 J jnl
An Approach to Reversible Logic Synthesis Using Input and Output Permutations.
Trans. Comput. Sci.
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2014 — conf
An ESOP-Based Reversible Circuit Synthesis Flow Using Simulated Annealing.
ACSS (2)
Kamalika Datta, Alhaad Gokhale, Indranil Sengupta, Hafizur Rahaman
2014 J jnl
An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes.
ACM J. Emerg. Technol. Comput. Syst.
Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman
2014 C conf
Automated two stage detection and analyzer system in multipartitioned Digital Microfluidic Biochips.
ISCAS
Pranab Roy, Aatreyi Bal, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2014 — conf
Design of a Low Complexity and Fast Hardware Architecture for Digital Image Watermarking in FWHT Domain on FPGA.
ISED
Sudip Ghosh, Arijit Biswas, Santi P. Maity, Hafizur Rahaman
2014 — conf
Diagnosis of SMGF in ESOP Based Reversible Logic Circuit.
ISED
Bappaditya Mondal, Chandan Bandyopadhyay, Dipak Kumar Kole, Jimson Mathew, Hafizur Rahaman
2014 — conf
Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion Using FPGA.
ICIT
Sudip Ghosh, Nachiketa Das, Subhajit Das, Santi P. Maity, Hafizur Rahaman
2014 J jnl
Effective fault detection and routing scheme for wireless sensor networks.
Comput. Electr. Eng.
Indrajit Banerjee, Prasenjit Chanak, Hafizur Rahaman, Tuhina Samanta
2014 — conf
Generator for Test Set Construction of SMGF in Reversible Circuit by Boolean Difference Method.
ATS
Bappaditya Mondal, Dipak Kumar Kole, Debesh Kumar Das, Hafizur Rahaman
2014 — conf
Impact of Line Resistance Variations on Crosstalk Delay and Noise in Multilayer Graphene Nano Ribbon Interconnects.
ISED
Manodipan Sahoo, Hafizur Rahaman
2014 J jnl
Improved Cube List Based Cube Pairing Approach for Synthesis of ESOP Based Reversible Logic.
Trans. Comput. Sci.
Chandan Bandyopadhyay, Hafizur Rahaman, Rolf Drechsler
2014 — conf
Mach-Zehnder Interferometer Based All Optical Reversible Carry-Lookahead Adder.
ISVLSI
Pratik Dutta, Chandan Bandyopadhyay, Chandan Giri, Hafizur Rahaman
2014 — conf
Multilevel Homogeneous Detection Analyzer for Medical Diagnostic Application in Digital Microfluidic Biochips.
ISED
Pranab Roy, Tamosa Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta
2014 J jnl
On the Suitability of Single-Walled Carbon Nanotube Bundle Interconnects for High-Speed and Power-Efficient Applications.
J. Low Power Electron.
Manodipan Sahoo, Hafizur Rahaman, Bhargab B. Bhattacharya
2014 C conf
Optimizing DD-based synthesis of reversible circuits using negative control lines.
DDECS
Eleonora Schönborn, Kamalika Datta, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2014 — conf
Optimizing test time for core-based 3-d integrated circuits by a technique of bi-partitioning.
EWDTS
Manjari Pradhan, Debesh K. Das, Chandan Giri, Hafizur Rahaman
2014 — conf
Session Based Core Test Scheduling for 3D SOCs.
ISVLSI
Surajit Kumar Roy, Payel Ghosh, Hafizur Rahaman, Chandan Giri
2013 — conf
A New Method for Route Based Synthesis and Placement in Digital Microfluidic Biochips.
VDAT
Pranab Roy, Samadrita Bhattacharya, Hafizur Rahaman, Parthasarathi Dasgupta
2013 — conf
A design for testability technique for quantum reversible circuits.
EWDTS
Joyati Mondal, Debesh K. Das, Dipak Kumar Kole, Hafizur Rahaman
2013 — conf
A new cross contamination aware routing method with intelligent path exploration in digital microfluidic biochips.
DTIS
Pranab Roy, Pampa Howladar, Rupam Bhattacharjee, Hafizur Rahaman, Parthasarathi Dasgupta
2013 — conf
A new customized testing technique using a novel design of droplet motion detector for digital microfluidic Biochip systems.
ICACCI
Pranab Roy, Hafizur Rahaman, Partha Sarathi Gupta, Parthasarathi Dasgupta
2013 — conf
An Area and Power Efficient Dynamic TDMA Based Photonic Network on Chip.
ISED
Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, Hafizur Rahaman
2013 — conf
An Intelligent Biochip System for Diagnostic Process Flow Based Integration of Combined Detection Analyzer.
ISED
Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2013 — conf
An evolutionary approach to reversible logic synthesis using output permutation.
IDT
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2013 J jnl
Bridging fault detection in cluster based FPGA by using Muller C element.
Comput. Electr. Eng.
Nachiketa Das, Pranab Roy, Hafizur Rahaman
2013 J jnl
Built-in-self-test technique for diagnosis of delay faults in cluster-based field programmable gate arrays.
IET Comput. Digit. Tech.
Nachiketa Das, Pranab Roy, Hafizur Rahaman
2013 J jnl
Derivation of test set for detecting multiple missing-gate faults in reversible circuits.
Comput. Electr. Eng.
Dipak Kumar Kole, Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2013 C conf
Digital microfluidic system: A new design for heterogeneous sample based integration of multiple DMFBs.
ISCAS
Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2013 — conf
ESOP-Based Synthesis of Reversible Circuit Using Improved Cube List.
ISED
Chandan Bandyopadhyay, Debashri Roy, Dipak Kumar Kole, Kamalika Datta, Hafizur Rahaman
2013 C conf
Exploiting Negative Control Lines in the Optimization of Reversible Circuits.
RC
Kamalika Datta, Gaurav Rathi, Robert Wille, Indranil Sengupta, Hafizur Rahaman, Rolf Drechsler
2013 — conf
Faulty TSVs identification and recovery in 3D stacked ICs during pre-bond testing.
3DIC
Surajit Kumar Roy, Sobitri Chatterjee, Chandan Giri, Hafizur Rahaman
2013 — conf
Impact of Inductance on the Performance of Single Walled Carbon Nanotube Bundle Interconnects.
ISED
Manodipan Sahoo, Hafizur Rahaman, Bhargab B. Bhattacharya
2013 — conf
Multi-objective optimization algorithm for efficient pin-constrained droplet routing technique in digital microfluidic biochip.
ISQED
Soumyajit Chatterjee, Hafizur Rahaman, Tuhina Samanta
2013 — conf
Novel designs of digital detection analyzer for intelligent detection and analysis in digital microfluidic biochips.
IDT
Pranab Roy, Mahua Raha Patra, Hafizur Rahaman, Parthasarathi Dasgupta
2013 — conf
On Designing Testable Reversible Circuits Using Gate Duplication.
VDAT
Joyati Mondal, Debesh Kumar Das, Dipak Kumar Kole, Hafizur Rahaman, Bhargab B. Bhattacharya
2013 — conf
Optimal stacking of SOCs in a 3D-SIC for post-bond testing.
3DIC
Manjari Pradhan, Chandan Giri, Hafizur Rahaman, Debesh K. Das
2013 J jnl
Optimization algorithms for the design of digital microfluidic biochips: A survey.
Comput. Electr. Eng.
Indrajit Pan, Ritwik Mukherjee, Hafizur Rahaman, Tuhina Samanta, Parthasarathi Dasgupta
2013 — conf
Optimizing test architecture of 3D stacked ICs for partial stack/complete stack using hard SoCs.
IDT
Surajit Kumar Roy, Chandan Giri, Hafizur Rahaman
2013 J jnl
Particle Swarm Optimization Based Reversible Circuit Synthesis Using Mixed Control Toffoli Gates.
J. Low Power Electron.
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
2013 — conf
Power constraints test scheduling of 3D stacked ICs.
IDT
Surajit Kumar Roy, Joy Sankar Sengupta, Chandan Giri, Hafizur Rahaman
2013 C conf
Reversible Circuit Synthesis of Symmetric Functions Using a Simple Regular Structure.
RC
Arighna Deb, Debesh K. Das, Hafizur Rahaman, Bhargab B. Bhattacharya, Robert Wille, Rolf Drechsler
2013 — conf
Reversible logic implementation of AES algorithm.
DTIS
Kamalika Datta, Vishal Shrivastav, Indranil Sengupta, Hafizur Rahaman
2013 — conf
Reversible synthesis of symmetric boolean functions based on unate decomposition.
ACM Great Lakes Symposium on VLSI
Arighna Deb, Debesh K. Das, Hafizur Rahaman, Bhargab B. Bhattacharya
2012 Misc conf
A Heuristic Method for Co-optimization of Pin Assignment and Droplet Routing in Digital Microfluidic Biochip.
VLSI Design
Ritwik Mukherjee, Hafizur Rahaman, Indrajit Banerjee, Tuhina Samanta, Parthasarathi Dasgupta
2012 — conf
A New Algorithm for Routing-Aware Net Placement in Cross-Referencing Digital Microfluidic Biochips.
ISVLSI
Pranab Roy, Rupam Bhattacharjee, Hafizur Rahaman, Parthasarathi Dasgupta
2012 — conf
A New Look Ahead Technique for Customized Testing in Digital Microfluidic Biochips.
Asian Test Symposium
Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta, Bhargab B. Bhattacharya
2012 — conf
A Photonic Network on Chip with CDMA Links.
VDAT
Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, Hafizur Rahaman
2012 — conf
A heuristic method for obstacle avoiding group Steiner tree construction.
SLIP
Tuhina Samanta, Raka Sardar, Hafizur Rahaman, Parthasarathi Dasgupta, Bhargab B. Bhattacharya
2012 — conf
A new digital analyzer for optically detected samples in Digital Microfluidic Biochips.
MWSCAS
Pranab Roy, Sudipta Chakraborty, Moudud Sohid, Hafizur Rahaman, Parthasarathi Dasgupta
2012 Misc conf
An intelligent compaction technique for pin constrained routing in cross referencing digital microfluidic biochips.
CODES+ISSS
Pranab Roy, Rupam Bhattacharjee, Modud Sohid, Sudipta Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta
2012 — conf
Automated path planning for washing in digital microfluidic biochips.
CASE
Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2012 — conf
Binary Difference Based Test Data Compression for NoC Based SoCs.
ISVLSI
Sanga Chaki, Chandan Giri, Hafizur Rahaman
2012 — conf
Delay Uncertainty in Single- and Multi-Wall Carbon Nanotube Interconnects.
VDAT
Debaprasad Das, Hafizur Rahaman
2012 — conf
Design of 4-Bit Array Multiplier Using Multi-wall Carbon Nanotube Interconnects.
ISED
Debaprasad Das, Sourav Das, Hafizur Rahaman
2012 — conf
Design of Content Addressable Memory Architecture Using Carbon Nanotube Field Effect Transistors.
VDAT
Debaprasad Das, Avishek Sinha Roy, Hafizur Rahaman
2012 — conf
Design of an NoC with on-chip photonic interconnects using adaptive CDMA links.
SoCC
Soumyajit Poddar, Prasun Ghosal, Priyajit Mukherjee, Suman Samui, Hafizur Rahaman
2012 — conf
Diametric Mesh of Tree (DiaMoT) Routing Framework for High Performance NoCs: A Hierarchical Approach.
HPCC-ICESS
Prasun Ghosal, Sunita Choudhuri, Hafizur Rahaman
2012 — conf
Efficient and Compact Electrical Modeling of Multi Walled Carbon Nanotube Interconnects.
ISED
Manodipan Sahoo, Prasun Ghosal, Hafizur Rahaman
2012 — conf
On-Line Error Detection in Digital Microfluidic Biochips.
Asian Test Symposium
Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2012 — conf
Particle Swarm Optimization Based Circuit Synthesis of Reversible Logic.
ISED
Kamalika Datta, Indranil Sengupta, Hafizur Rahaman
2012 — conf
Partitioning-based wirelength estimation technique for Y-routing.
SBCCI
Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2012 — conf
Post-bond Stack Testing for 3D Stacked IC.
VDAT
Surajit Kumar Roy, Dona Roy, Chandan Giri, Hafizur Rahaman
2012 — ed.
Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings
VDAT
Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay
2012 — conf
Reversible Logic Circuit Synthesis Using Genetic Algorithm and Particle Swarm Optimization.
ISED
Papia Manna, Dipak Kumar Kole, Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2012 — conf
Simulation Study of an Ultra Thin Body Silicon On Insulator Tunnel Field Effect Transistor.
VDAT
Partha Sarathi Gupta, Sayan Kanungo, Hafizur Rahaman, Parthasarathi Dasgupta
2012 Misc conf
Synthesis of Reversible Circuits Using Heuristic Search Method.
VLSI Design
Kamalika Datta, Gaurav Rathi, Indranil Sengupta, Hafizur Rahaman
2012 — conf
System on Biochips: A New Design for Integration of Multiple DMFBs.
ISED
Pranab Roy, Moudud Sohid, Sudipta Chakraborty, Hafizur Rahaman, Parthasarathi Dasgupta
2012 J jnl
Two-level clustering-based techniques for intelligent droplet routing in digital microfluidic biochips.
Integr.
Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2012 — conf
VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2 m )Using Dual Bases.
VDAT
Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2012 — conf
VLSI Architecture for Spatial Domain Spread Spectrum Image Watermarking Using Gray-Scale Watermark.
VDAT
Sudip Ghosh, Somsubhra Talapatra, Debasish Mondal, Navonil Chatterjee, Hafizur Rahaman, Santi P. Maity
2011 — conf
A Best Path Selection Based Parallel Router for DMFBs.
ISED
Pranab Roy, Hafizur Rahaman, Rupam Bhattacharya, Parthasarathi Dasgupta
2011 — conf
A Group-Preferential Parallel-Routing Algorithm for Cross-Referencing Digital Microfluidic Biochips.
ISVLSI
Pranab Roy, Rajesh Mandal, Hafizur Rahaman, Parthasarathi Dasgupta
2011 — conf
A Multi-pin Droplet Routing Algorithm for Digital Microfluidic Biochips.
BIODEVICES
Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2011 — conf
Ant Colony Optimization Based Droplet Routing Technique in Digital Microfluidic Biochip.
ISED
Indrajit Pan, Parthasarathi Dasgupta, Hafizur Rahaman, Tuhina Samanta
2011 J jnl
CCABC: Cyclic Cellular Automata Based Clustering For Energy Conservation in Sensor Networks
CoRR
Indrajit Banerjee, Prasenjit Chanak, Hafizur Rahaman
2011 — conf
Crosstalk and Gate Oxide Reliability Analysis in Graphene Nanoribbon Interconnects.
ISED
Debaprasad Das, Hafizur Rahaman
2011 — conf
Crosstalk aware coupled line delay tree construction for on-chip interconnects.
ISQED
Tuhina Samanta, Sanoara Khatun, Hafizur Rahaman, Parthasarathi Dasgupta
2011 — conf
DFDNM: A Distributed Fault Detection and Node Management Scheme for Wireless Sensor Network.
ACC (3)
Indrajit Banerjee, Prasenjit Chanak, Biplab Kumar Sikdar, Hafizur Rahaman
2011 — conf
DJSS: Distributed job scheduling scheme for WSN.
ReTIS
Indrajit Banerjee, Prasenjit Chanak, Anirban Datta, Hafizur Rahaman
2011 — conf
Derivation of Automatic Test Set for Detection of Missing Gate Faults in Reversible Circuits.
ISED
Dipak Kumar Kole, Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2011 — conf
Fast high-performance algorithms for multi-pin droplet routing in digital microfluidic biochips.
ACM Great Lakes Symposium on VLSI
Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2011 J jnl
Fault diagnosis in reversible circuits under missing-gate fault model.
Comput. Electr. Eng.
Hafizur Rahaman, Dipak Kumar Kole, Debesh K. Das, Bhargab B. Bhattacharya
2011 J jnl
Near-optimal Y-routed delay trees in nanometric interconnect design.
IET Comput. Digit. Tech.
Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2011 — conf
Obstacle Aware Routing in 3D Integrated Circuits.
ADCONS
Prasun Ghosal, Hafizur Rahaman, Satrajit Das, Arindam Das, Parthasarathi Dasgupta
2011 — conf
On residue removal in digital microfluidic biochips.
ACM Great Lakes Symposium on VLSI
Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2011 — conf
Optimization of Test Wrapper for TSV Based 3D SOCs.
ISED
Surajit Kumar Roy, Chandan Giri, Sourav Ghosh, Hafizur Rahaman
2011 — conf
Optimizing Test Architecture for TSV Based 3D Stacked ICs Using Hard SOCs.
ISED
Surajit Kumar Roy, Chandan Giri, Arnab Chakraborty, Subhro Mukherjee, Debesh K. Das, Hafizur Rahaman
2011 — conf
Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs.
ISVLSI
Surajit Kumar Roy, Chandan Giri, Sourav Ghosh, Hafizur Rahaman
2011 J jnl
Pseudo-Parallel Datapath Structure for Power Optimal Implementation of 128-pt FFT/IFFT for WPAN.
Circuits Syst. Signal Process.
Jimson Mathew, Koushik Maharatna, Babita R. Jose, Hafizur Rahaman, Dhiraj K. Pradhan
2011 — conf
Runtime Congestion and Crosstalk Aware Router for FPGA Using Jbits3.0 for Partial Reconfigurable Application.
ISED
Nachiketa Das, Pranab Roy, Hafizur Rahaman
2011 — conf
SBFDR: Sector Based Fault Detection and Recovery in Wireless Sensor Networks.
HPAGC
Indrajit Banerjee, Prasenjit Chanak, Hafizur Rahaman
2011 J jnl
Test Planning in Digital Microfluidic Biochips Using Efficient Eulerization Techniques.
J. Electron. Test.
Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2010 J jnl
A Galois field-based logic synthesis with testability.
IET Comput. Digit. Tech.
Jimson Mathew, Abusaleh M. Jabir, Ashutosh Kumar Singh, Hafizur Rahaman, Dhiraj K. Pradhan
2010 — conf
A novel droplet routing algorithm for digital microfluidic biochips.
ACM Great Lakes Symposium on VLSI
Pranab Roy, Hafizur Rahaman, Parthasarathi Dasgupta
2010 — conf
Derivation of Optimal Test Set for Detection of Multiple Missing-Gate Faults in Reversible Circuits.
Asian Test Symposium
Dipak Kumar Kole, Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2010 J jnl
Low Complexity Digit Serial Systolic Montgomery Multipliers for Special Class of GF(2
IEEE Trans. Very Large Scale Integr. Syst.
Somsubhra Talapatra, Hafizur Rahaman, Jimson Mathew
2010 C conf
Low complexity montgomery multiplication architecture for elliptic curve cryptography over GF(p
VLSI-SoC
Somsubhra Talapatra, Hafizur Rahaman
2010 — conf
Minimizing Thermal Disparities during Placement in 3D ICs.
CSE
Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2010 — conf
Non-preemptive test scheduling for Network-on-Chip(NoC) based systems by reusing NoC as TAM.
APCCAS
Goutam Mali, Suman Das, Hafizur Rahaman, Chandan Giri
2010 — conf
On the design of different concurrent EDC schemes for S-Box and GF(p).
ISQED
Jimson Mathew, Hafizur Rahaman, Abusaleh M. Jabir, Saraju P. Mohanty, Dhiraj K. Pradhan
2010 C conf
On the synthesis of attack tolerant cryptographic hardware.
VLSI-SoC
Jimson Mathew, Savita Banerjee, Hafizur Rahaman, Dhiraj K. Pradhan, Saraju P. Mohanty, Abusaleh M. Jabir
2010 B conf
SSMCA: CA based Segmented Sensor Network Management scheme.
SMC
Indrajit Banerjee, Sukanta Das, Hafizur Rahaman, Biplab K. Sikdar, Mamata Dalui
2010 J jnl
Secure Testable S-box Architecture for Cryptographic Hardware Implementation.
Comput. J.
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan
2010 J jnl
Simplified bit parallel systolic multipliers for special class of galois field (2
IET Comput. Digit. Tech.
Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2010 J jnl
Test Generation in Systolic Architecture for Multiplication Over GF(2
IEEE Trans. Very Large Scale Integr. Syst.
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan
2010 — conf
Testing of Digital Microfluidic Biochips Using Improved Eulerization Techniques and the Chinese Postman Problem.
Asian Test Symposium
Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Krishnendu Chakrabarty, Bhargab B. Bhattacharya
2010 C conf
Unified Digit Serial Systolic Montgomery Multiplication Architecture for Special Classes of Polynomials over GF(2m).
DSD
Somsubhra Talapatra, Hafizur Rahaman, Samir K. Saha
2009 Misc conf
A Method for the Multi-Net Multi-Pin Routing Problem with Layer Assignment.
VLSI Design
Tuhina Samanta, Hafizur Rahaman, Prasun Ghosal, Parthasarathi Dasgupta
2009 C conf
C-testable S-box implementation for secure advanced encryption standard.
IOLTS
Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2009 J jnl
Single error correctable bit parallel multipliers over GF(2
IET Comput. Digit. Tech.
Jimson Mathew, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan
2009 J jnl
Testable design of AND-EXOR logic networks with universal test sets.
Comput. Electr. Eng.
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2008 Misc conf
A Galois Field Based Logic Synthesis Approach with Testability.
VLSI Design
Jimson Mathew, Hafizur Rahaman, Ashutosh Kumar Singh, Abusaleh M. Jabir, Dhiraj K. Pradhan
2008 — conf
Accelerated Functional Testing of Digital Microfluidic Biochips.
ATS
Debasis Mitra, Sarmishtha Ghoshal, Hafizur Rahaman, Bhargab B. Bhattacharya, D. Dutta Majumder, Krishnendu Chakrabarty
2008 J jnl
An Adaptive BIST Design for Detecting Multiple Stuck-Open Faults in a CMOS Complex Cell.
IEEE Trans. Instrum. Meas.
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2008 J jnl
C-testable bit parallel multipliers over
ACM Trans. Design Autom. Electr. Syst.
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan, Abusaleh M. Jabir
2008 J jnl
Derivation of Reduced Test Vectors for Bit-Parallel Multipliers over GF(2^m).
IEEE Trans. Computers
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan, Abusaleh M. Jabir
2008 Misc conf
Design of Reversible Finite Field Arithmetic Circuits with Error Detection.
VLSI Design
Jimson Mathew, Hafizur Rahaman, Babita R. Jose, Dhiraj K. Pradhan
2008 C conf
On Line Testing of Single Feedback Bridging Fault in Cluster Based FPGA by Using Asynchronous Element.
IOLTS
Nachiketa Das, Pranab Roy, Hafizur Rahaman
2008 Misc conf
On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set.
VLSI Design
Hafizur Rahaman, Dipak Kumar Kole, Debesh Kumar Das, Bhargab B. Bhattacharya
2008 — conf
Revisiting fidelity: a case of elmore-based Y-routing trees.
SLIP
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2008 Misc conf
Single Error Correcting Finite Field Multipliers Over GF(2m).
VLSI Design
Jimson Mathew, Costas Argyrides, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan
2008 — conf
Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations.
ISVLSI
Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2008 — conf
UDDN: Unidirectional Data Dissemination via Negotiation.
ICOIN
Indrajit Banerjee, Hafizur Rahaman
2007 Misc conf
Constant Function Independent Test Set for Fault Detection in Bit Parallel Multipliers in GF(2^m).
VLSI Design
Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan
2007 C conf
Efficient Testable Bit Parallel Multipliers over GF(2^m) with Constant Test set.
IOLTS
Jimson Mathew, Hafizur Rahaman, Dhiraj K. Pradhan
2007 — conf
Minimum-Congestion Placement for Y-interconnects: Some studies and observations.
ISVLSI
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2007 — conf
Optimum Test Set for Bridging Fault Detection in Reversible Circuits.
ATS
Hafizur Rahaman, Dipak Kumar Kole, Debesh K. Das, Bhargab B. Bhattacharya
2007 Misc conf
Transition Fault Testability in Bit Parallel Multipliers over GF(2^{m}).
VTS
Hafizur Rahaman, Jimson Mathew, Biplab K. Sikdar, Dhiraj K. Pradhan
2006 C conf
A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI.
ISCAS
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Parthasarathi Dasgupta
2006 B conf
An Energy Effilcient Monitoring of Ad-Hoc Sensor Network with Cellular Automata.
SMC
Indrajit Banerjee, Sukanta Das, Hafizur Rahaman, Biplab K. Sikdar
2006 — conf
Easily Testable Implementation for Bit Parallel Multipliers in GF (2m).
HLDVT
Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2006 J jnl
Implementing Symmetric Functions with Hierarchical Modules for Stuck-At and Path-Delay Fault Testability.
J. Electron. Test.
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2006 J jnl
MDVM System Concept, Paging Latency and Round-2 Randomized Leader Election Algorithm in SG.
J. Adv. Comput. Intell. Intell. Informatics
Susmit Bagchi, Hafizur Rahaman, Purnendu Das
2005 — conf
Bridging fault detection in Double Fixed-Polarity Reed-Muller (DFPRM) PLA.
ASP-DAC
Hafizur Rahaman, Debesh K. Das
2005 — conf
Cost Optimal Design of Nonlinear CA based PRPG for Test Applications.
Asian Test Symposium
Sukanta Das, Hafizur Rahaman, Biplab K. Sikdar
2005 — conf
Recent Trends in the Application of Meta-Heuristics to VLSI Layout Design.
IICAI
Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
2004 — conf
A Simple Delay Testable Synthesis of Symmetric Functions.
AACC
Hafizur Rahaman, Debesh K. Das
2004 Misc conf
Easily Testable Realization of GRM and ESOP Networks for Detecting Stuck-at and Bridging Faults.
VLSI Design
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2004 — conf
Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faults.
ASP-DAC
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2003 — conf
Mapping Symmetric Functions to Hierarchical Modules for Path-Delay Fault Testability.
Asian Test Symposium
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2002 — conf
A New Synthesis of Symmetric Functions.
ASP-DAC/VLSI Design
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
2002 J jnl
BIST Design for Detecting Multiple Stuck-Open Faults in CMOS Circuits Using Transition Count.
J. Comput. Sci. Technol.
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya
1999 — conf
An Adaptive BIST to Detect Multiple Stuck-Open Faults in CMOS circuits.
ASP-DAC
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattacharya