Hadi Mardani Kamali

81 papers A* 4A 11B 1C 2Misc 2Journal 42Unranked 19

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Bench4HLS: End-to-End Evaluation of LLMs in High-Level Synthesis Code Generation. CoRR M. Zafir Sadik Khan, Kimia Zamiri Azar, Hadi Mardani Kamali
2026	J	`jnl`	MeltRTL: Multi-Expert LLMs with Inference-time Intervention for RTL Code Generation. CoRR Nowfel Mashnoor, Mohammad Akyash, Hadi Mardani Kamali, Kimia Zamiri Azar
2026	J	`jnl`	NuRedact: Non-Uniform eFPGA Architecture for Low-Overhead and Secure IP Redaction. CoRR Voktho Das, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	C	`conf`	CircuitGuard: Mitigating LLM Memorization in RTL Code Generation Against IP Leakage. ICCD Nowfel Mashnoor, Mohammad Akyash, Hadi Mardani Kamali, Kimia Zamiri Azar
2025	J	`jnl`	CircuitGuard: Mitigating LLM Memorization in RTL Code Generation Against IP Leakage. CoRR Nowfel Mashnoor, Mohammad Akyash, Hadi Mardani Kamali, Kimia Zamiri Azar
2025	A	`conf`	DecoRTL: A Run-Time Decoding Framework for RTL Code Generation with LLMs. ICCAD Mohammad Akyash, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	J	`jnl`	DecoRTL: A Run-time Decoding Framework for RTL Code Generation with LLMs. CoRR Mohammad Akyash, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	J	`jnl`	EvoLUTe+: Fine-Grained Look-Up-Table-based RTL IP Redaction. IACR Cryptol. ePrint Arch. Rui Guo, M. Sazadur Rahman, Jingbo Zhou, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2025	Misc	`conf`	LLM-IFT: LLM-Powered Information Flow Tracking for Secure Hardware. VTS Nowfel Mashnoor, Mohammad Akyash, Hadi Mardani Kamali, Kimia Zamiri Azar
2025	J	`jnl`	LLM-IFT: LLM-Powered Information Flow Tracking for Secure Hardware. CoRR Nowfel Mashnoor, Mohammad Akyash, Hadi Mardani Kamali, Kimia Zamiri Azar
2025	—	`conf`	NoXLock: SiP Activation and Licensing through Obfuscated on-Chip Network and Fuzzy Traffic. ASP-DAC Md. Saad Ul Haque, Azim Uddin, Jingbo Zhou, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2025	J	`jnl`	RTL++: Graph-enhanced LLM for RTL Code Generation. CoRR Mohammad Akyash, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	C	`conf`	SAGE-HLS: Syntax-Aware AST-Guided LLM for High-Level Synthesis Code Generation. ICCD M. Zafir Sadik Khan, Nowfel Mashnoor, Mohammad Akyash, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	J	`jnl`	SAGE-HLS: Syntax-Aware AST-Guided LLM for High-Level Synthesis Code Generation. CoRR M. Zafir Sadik Khan, Nowfel Mashnoor, Mohammad Akyash, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	J	`jnl`	SOAR: Secure Once, Adapt at Runtime With eFPGA-Based Redaction for IP Protection. IEEE Access Voktho Das, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	—	`conf`	SimEval: Investigating the Similarity Obstacle in LLM-based Hardware Code Generation. ASP-DAC Mohammad Akyash, Hadi Mardani Kamali
2025	J	`jnl`	StepGrade: Grading Programming Assignments with Context-Aware LLMs. CoRR Mohammad Akyash, Kimia Zamiri Azar, Hadi Mardani Kamali
2025	—	`conf`	TimelyHLS: LLM-Based Timing-Aware and Architecture-Specific FPGA HLS Optimization. COINS Nowfel Mashnoor, Mohammad Akyash, Hadi Mardani Kamali, Kimia Zamiri Azar
2025	J	`jnl`	TimelyHLS: LLM-Based Timing-Aware and Architecture-Specific FPGA HLS Optimization. CoRR Nowfel Mashnoor, Mohammad Akyash, Hadi Mardani Kamali, Kimia Zamiri Azar
2024	J	`jnl`	Advancing Trustworthiness in System-in-Package: A Novel Root-of-Trust Hardware Security Module for Heterogeneous Integration. IEEE Access Md Sami Ul Islam Sami, Tao Zhang, Amit Mazumder Shuvo, Md. Saad Ul Haque, Paul E. Calzada, Kimia Zamiri Azar, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark Mohammad Tehranipoor
2024	—	`conf`	Evolutionary Large Language Models for Hardware Security: A Comparative Survey. ACM Great Lakes Symposium on VLSI Mohammad Akyash, Hadi Mardani Kamali
2024	J	`jnl`	Evolutionary Large Language Models for Hardware Security: A Comparative Survey. CoRR Mohammad A. Makhzan, Hadi Mardani Kamali
2024	J	`jnl`	Exploring the Abyss? Unveiling Systems-on-Chip Hardware Vulnerabilities Beneath Software. IEEE Trans. Inf. Forensics Secur. Sree Ranjani Rajendran, Nusrat Farzana Dipu, Shams Tarek, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2024	A*	`conf`	GATE-SiP: Enabling Authenticated Encryption Testing in Systems-in-Package. DAC Galib Ibne Haidar, Kimia Zamiri Azar, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2024	J	`jnl`	Improving Bounded Model Checkers Scalability for Circuit De-Obfuscation: An Exploration. IEEE Trans. Inf. Forensics Secur. Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2024	—	`conf`	Self-HWDebug: Automation of LLM Self-Instructing for Hardware Security Verification. ISVLSI Mohammad Akyash, Hadi Mardani Kamali
2024	J	`jnl`	Self-HWDebug: Automation of LLM Self-Instructing for Hardware Security Verification. CoRR Mohammad Akyash, Hadi Mardani Kamali
2024	J	`jnl`	SiPGuard: Run-Time System-in-Package Security Monitoring via Power Noise Variation. IEEE Trans. Very Large Scale Integr. Syst. Tao Zhang, Md Latifur Rahman, Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi
2023	A*	`conf`	ActiWate: Adaptive and Design-agnostic Active Watermarking for IP Ownership in Modern SoCs. DAC Zahin Ibnat, M. Sazadur Rahman, Mridha Md Mashahedur Rahman, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2023	J	`jnl`	Enabling Security of Heterogeneous Integration: From Supply Chain to In-Field Operations. IEEE Des. Test Md Sami Ul Islam Sami, Hadi Mardani Kamali, Farimah Farahmandi, Fahim Rahman, Mark Tehranipoor
2023	A	`conf`	EvoLUTe: Evaluation of Look-Up-Table-based Fine-Grained IP Redaction. DATE Rui Guo, M. Sazadur Rahman, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2023	J	`jnl`	HLock+: A Robust and Low-Overhead Logic Locking at the High-Level Language. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Md Rafid Muttaki, Roshanak Mohammadivojdan, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2023	A	`conf`	HUnTer: Hardware Underneath Trigger for Exploiting SoC-level Vulnerabilities. DATE Sree Ranjani Rajendran, Shams Tarek, Benjamin M. Hicks, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2023	—	`conf`	Iterative Mitigation of Insecure Resource Sharing Produced by High-level Synthesis. DFT Zahin Ibnat, Hadi Mardani Kamali, Farimah Farahmandi
2023	—	`conf`	Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient Logic Locking. ACM Great Lakes Symposium on VLSI Mohammad Sazadur Rahman, Kimia Zamiri Azar, Farimah Farahmandi, Hadi Mardani Kamali
2023	A	`conf`	RTLock: IP Protection using Scan-Aware Logic Locking at RTL. DATE Md Rafid Muttaki, Shyvagata Saha, Hadi Mardani Kamali, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi
2023	J	`jnl`	ReTrustFSM: Toward RTL Hardware Obfuscation-A Hybrid FSM Approach. IEEE Access M. Sazadur Rahman, Rui Guo, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mark Tehranipoor
2023	—	`conf`	SecHLS: Enabling Security Awareness in High-Level Synthesis. ASP-DAC Shang Shi, Nitin Pundir, Hadi Mardani Kamali, Mark Tehranipoor, Farimah Farahmandi
2023	—	`conf`	Security of Hardware Generators: Enabling Assurance in High-Level Synthesis. MWSCAS Md Rafid Muttaki, Zahin Ibnat, Shang Shi, Hadi Mardani Kamali, Farimah Farahmandi
2023	A	`conf`	SheLL: Shrinking eFPGA Fabrics for Logic Locking. DATE Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2022	J	`jnl`	Advances in Logic Locking: Past, Present, and Prospects. IACR Cryptol. ePrint Arch. Hadi Mardani Kamali, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor
2022	A*	`conf`	O'clock: lock the clock via clock-gating for SoC IP protection. DAC M. Sazadur Rahman, Rui Guo, Hadi Mardani Kamali, Fahim Rahman, Farimah Farahmandi, Mohamed Abdel-Moneum, Mark Tehranipoor
2022	J	`jnl`	Secure and Robust Key-Trapped Design-for-Security Architecture for Protecting Obfuscated Logic. IACR Cryptol. ePrint Arch. Hadi Mardani Kamali
2022	—	`conf`	Warm Up before Circuit De-obfuscation? An Exploration through Bounded-Model-Checkers. HOST Kimia Zamiri Azar, Hadi Mardani Kamali, Farimah Farahmandi, Mark Tehranipoor
2021	—	`conf`	ChaoLock: Yet Another SAT-hard Logic Locking using Chaos Computing. ISQED Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2021	J	`jnl`	Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits. IEEE Trans. Very Large Scale Integr. Syst. Kimia Zamiri Azar, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, Christos P. Sotiriou, Avesta Sasan
2021	J	`jnl`	Deep Graph Learning for Circuit Deobfuscation. Frontiers Big Data Zhiqian Chen, Lei Zhang, Gaurav Kolhe, Hadi Mardani Kamali, Setareh Rafatirad, Sai Manoj Pudukotai Dinakarrao, Houman Homayoun, Chang-Tien Lu, Liang Zhao
2021	J	`jnl`	From Cryptography to Logic Locking: A Survey on the Architecture Evolution of Secure Scan Chains. IEEE Access Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2021	—	`conf`	RANE: An Open-Source Formal De-obfuscation Attack for Reverse Engineering of Logic Encrypted Circuits. ACM Great Lakes Symposium on VLSI Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	Misc	`conf`	DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. VTS Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain. CoRR Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	ExTru: A Lightweight, Fast, and Secure Expirable Trust for the Internet of Things. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Shervin Roshanisefat, Ashkan Vakil, Avesta Sasan
2020	A	`conf`	InterLock: An Intercorrelated Logic and Routing Locking. ICCAD Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	InterLock: An Intercorrelated Logic and Routing Locking. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	A	`conf`	NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. ICCAD Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	NNgSAT: Neural Network guided SAT Attack on Logic Locked Complex Structures. CoRR Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	—	`conf`	On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. ACM Great Lakes Symposium on VLSI Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	On Designing Secure and Robust Scan Chain for Protecting Obfuscated Logic. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	SAT-Hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain. IEEE Trans. Very Large Scale Integr. Syst. Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	SAT-hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain. CoRR Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2020	—	`conf`	SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. ISVLSI Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2020	J	`jnl`	SCRAMBLE: The State, Connectivity and Routing Augmentation Model for Building Logic Encryption. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2019	A	`conf`	COMA: Communication and Obfuscation Management Architecture. RAID Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
2019	J	`jnl`	COMA: Communication and Obfuscation Management Architecture. CoRR Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan
2019	A*	`conf`	Full-Lock: Hard Distributions of SAT instances for Obfuscating Circuits using Fully Configurable Logic and Routing Blocks. DAC Hadi Mardani Kamali, Kimia Zamiri Azar, Houman Homayoun, Avesta Sasan
2019	A	`conf`	Muffin: Minimally-Buffered Zero-Delay Power-Gating Technique in On-Chip Routers. ISLPED Hossein Farrokhbakht, Hadi Mardani Kamali, Natalie D. Enright Jerger
2019	J	`jnl`	SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks. IACR Trans. Cryptogr. Hardw. Embed. Syst. Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2019	A	`conf`	Security and Complexity Analysis of LUT-based Obfuscation: From Blueprint to Reality. ICCAD Gaurav Kolhe, Hadi Mardani Kamali, Miklesh Naicker, Tyler David Sheaves, Hamid Mahmoodi, Sai Manoj P. D., Houman Homayoun, Setareh Rafatirad, Avesta Sasan
2019	—	`conf`	Threats on Logic Locking: A Decade Later. ACM Great Lakes Symposium on VLSI Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2019	J	`jnl`	Threats on Logic Locking: A Decade Later. CoRR Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan
2018	J	`jnl`	DuCNoC: A High-Throughput FPGA-Based NoC Simulator Using Dual-Clock Lightweight Router Micro-Architecture. IEEE Trans. Computers Hadi Mardani Kamali, Kimia Zamiri Azar, Shaahin Hessabi
2018	—	`conf`	LUT-Lock: A Novel LUT-Based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. ISVLSI Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	J	`jnl`	LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection. CoRR Hadi Mardani Kamali, Kimia Zamiri Azar, Kris Gaj, Houman Homayoun, Avesta Sasan
2018	—	`conf`	MUCH-SWIFT: A High-Throughput Multi-Core HW/SW Co-design K-means Clustering Architecture. ACM Great Lakes Symposium on VLSI Hadi Mardani Kamali, Avesta Sasan
2018	A	`conf`	SPONGE: A Scalable Pivot-based On/Off Gating Engine for Reducing Static Power in NoC Routers. ISLPED Hossein Farrokhbakht, Hadi Mardani Kamali, Natalie D. Enright Jerger, Shaahin Hessabi
2018	—	`conf`	SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. ACM Great Lakes Symposium on VLSI Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan
2018	J	`jnl`	SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware. CoRR Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan
2018	J	`jnl`	Using Multi-Core HW/SW Co-design Architecture for Accelerating K-means Clustering Algorithm. CoRR Hadi Mardani Kamali
2017	—	`conf`	SMART: A Scalable Mapping And Routing Technique for Power-Gating in NoC Routers. NOCS Hossein Farrokhbakht, Hadi Mardani Kamali, Shaahin Hessabi
2016	J	`jnl`	A Fault Tolerant Parallelism Approach for Implementing High-Throughput Pipelined Advanced Encryption Standard. J. Circuits Syst. Comput. Hadi Mardani Kamali, Shaahin Hessabi
2016	B	`conf`	AdapNoC: A fast and flexible FPGA-based NoC simulator. FPL Hadi Mardani Kamali, Shaahin Hessabi