H. Narayanan - RankMe

44 papers A* 1B 2C 3Misc 13Journal 18Unranked 7

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	On composition and decomposition operations for vector spaces, graphs and matroids. CoRR H. Narayanan
2021	J	`jnl`	Implicit Linear Algebra and Basic Circuit Theory II: port behaviour of rigid multiports. CoRR H. Narayanan
2021	J	`jnl`	On Thevenin-Norton and Maximum power transfer theorems. CoRR H. Narayanan, Hariharan Narayanan
2020	J	`jnl`	Implicit Linear Algebra and Basic Circuit Theory. CoRR H. Narayanan, Hariharan Narayanan
2016	Misc	`conf`	Relaxation Based Circuit Simulation Acceleration over CPU-FPGA. VLSID Vinay B. Y. Kumar, Kulshreshth Dhiman, Mandar Datar, Akash Pacharne, H. Narayanan, Sachin B. Patkar
2013	—	`conf`	Hardware-software Scalable Architectures for Gaussian Elimination over GF(2) and Higher Galois Fields. PECCS Prateek Saxena, Vinay B. Y. Kumar, Dilawar Singh, H. Narayanan, Sachin B. Patkar
2013	Misc	`conf`	Memory Efficient Implementation of Two Graph Based Circuit Simulator for PDE-Electrical Analogy. VLSI Design Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
2013	J	`jnl`	Solution of PDEs-electrically coupled systems with electrical analogy. Integr. Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
2012	Misc	`conf`	Two Graph Based Circuit Simulator for PDE-Electrical Analogy. VLSI Design Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
2011	J	`jnl`	On the Use of Simple Electrical Circuit Techniques for Performance Modeling and Optimization in VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. Gautam Hazari, H. Narayanan
2011	J	`jnl`	Solution of Partial Differential Equations by electrical analogy. J. Comput. Sci. Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
2010	J	`jnl`	FPGA Based High Performance Double-Precision Matrix Multiplication. Int. J. Parallel Program. Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan
2010	—	`conf`	Large Scale VLSI Circuit Simulation Using Point Relaxation. CSC Subhendu Roy, Yogesh Dilip Save, H. Narayanan, Sachin B. Patkar
2009	Misc	`conf`	Exploiting Hybrid Analysis in Solving Electrical Networks. VLSI Design V. Siva Sankar, H. Narayanan, Sachin B. Patkar
2009	Misc	`conf`	FPGA Based High Performance Double-Precision Matrix Multiplication. VLSI Design Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan
2007	Misc	`conf`	Application of DC Analyzer to Combinatorial Optimization Problems. VLSI Design Gaurav Trivedi, Sumit Punglia, H. Narayanan
2007	C	`conf`	Application of Fast DC Analysis to Partitioning Hypergraphs. ISCAS Gaurav Trivedi, H. Narayanan
2007	Misc	`conf`	Parallelization of DC Analysis through Multiport Decomposition. VLSI Design Gaurav Trivedi, Madhav P. Desai, H. Narayanan
2006	Misc	`conf`	Fast DC Analysis and Its Application to Combinatorial Optimization Problems. VLSI Design Gaurav Trivedi, Madhav P. Desai, H. Narayanan
2004	—	`conf`	Mathematical programming and resistor transformer diode networks. ICECS H. Narayanan
2003	J	`jnl`	A note on the minimization of symmetric and general submodular functions. Discret. Appl. Math. H. Narayanan
2003	Misc	`conf`	An Efficient Practical Heuristic For Good Ratio-Cut Partitioning. VLSI Design Sachin B. Patkar, H. Narayanan
2003	J	`jnl`	Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and its Connections with Principal Partition. J. Comb. Optim. Sachin B. Patkar, H. Narayanan
2003	J	`jnl`	Improving graph partitions using submodular functions. Discret. Appl. Math. Sachin B. Patkar, H. Narayanan
2003	J	`jnl`	The realization of finite state machines by decomposition and the principal lattice of partitions of a submodular function. Discret. Appl. Math. Madhav P. Desai, H. Narayanan, Sachin B. Patkar
2002	—	`conf`	Mathematical Methods in VLSI (Tutorial Abstract). ASP-DAC/VLSI Design M. V. Atre, P. S. Subramanian, H. Narayanan
2002	J	`jnl`	On Duality of Behavioural Systems. Multidimens. Syst. Signal Process. Harish K. Pillai, H. Narayanan
2002	J	`jnl`	Some applications of an Implicit Duality Theorem to connections of structures of special types including Dirac and reciprocal structures. Syst. Control. Lett. H. Narayanan
2001	J	`jnl`	A note on optimal covering augmentation for graphic polymatroids. Inf. Process. Lett. Sachin B. Patkar, H. Narayanan
2001	Misc	`conf`	Spectral Algorithm To Compute And Synthesize Reduced Order Passive Models For Arbitrary Rc Multiports. VLSI Design Shabbir H. Batterywala, H. Narayanan
2000	—	`conf`	Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and Its Connections with Principal Partition. FSTTCS Sachin B. Patkar, H. Narayanan
1999	Misc	`conf`	A State Assignment Scheme Targeting Performance and Area. VLSI Design B. N. V. Malleswara Gupta, H. Narayanan, Madhav P. Desai
1999	C	`conf`	Decomposition of Finite State Machines for Area, Delay Minimization. ICCD Rupesh S. Shelar, Madhav P. Desai, H. Narayanan
1999	Misc	`conf`	Efficient DC Analysis of RVJ Circuits for Moment and Derivative Commutations of Interconnect Networks. VLSI Design Shabbir H. Batterywala, H. Narayanan
1997	Misc	`conf`	A New Partitioning Strategy Based on Supermodular Functions. VLSI Design Sachin B. Patkar, Shabbir H. Batterywala, M. Chandramouli, H. Narayanan
1996	J	`jnl`	Approximation Algorithms for Min-k-Overlap Problems Using the Principal Lattice of Partitions Approach. J. Algorithms H. Narayanan, Subir K. Roy, Sachin B. Patkar
1994	B	`conf`	Approximation Algorithms for Min-k-overlap Problems Using the Principal Lattice of Partitions Approach. MFCS H. Narayanan, Subir K. Roy, Sachin B. Patkar
1994	J	`jnl`	Randomized Parallel Algorithms for Matroid Union and Intersection, With Applications to Arboresences and Edge-Disjoint Spanning Trees. SIAM J. Comput. H. Narayanan, Huzur Saran, Vijay V. Vazirani
1993	C	`conf`	Application of the principal partition and principal lattice of partitions of a graph to the problem of decomposition of a finite state machine. ISCAS Subir K. Roy, H. Narayanan
1992	—	`conf`	Fast Sequential and Randomised Parallel Algorithms for Rigidity and approximate Min k-cut. FSTTCS Sachin B. Patkar, H. Narayanan
1992	B	`conf`	Principal Lattice of Partition of submodular functions on Graphs: Fast algorithms for Principal Partition and Generic Rigidity. ISAAC Sachin B. Patkar, H. Narayanan
1992	A*	`conf`	Randomized Parallel Algorithms for Matroid Union and Intersection, with Applications to Arboresences and Edge-Disjoint Spanning Trees. SODA H. Narayanan, Huzur Saran, Vijay V. Vazirani
1991	—	`conf`	A Fast Algorithm for the Principle Partition of a Graph. FSTTCS Sachin B. Patkar, H. Narayanan
1990	J	`jnl`	On the minimum hybrid rank of a graph relative to a partition of its edges and its application to electrical network analysis. Int. J. Circuit Theory Appl. H. Narayanan