Göran Jerke

15 papers A 3Misc 1Journal 1Unranked 10
YearRankTypeTitle / Venue / Authors
2026 — conf
Invited: Novel Concepts to Improve Custom Layout Automation Capabilities.
ISPD
Göran Jerke, Thomas Burdick, Vinko Marolt, Peter Herth, Andrew Beckett
2022 — conf
Mission Profile Clustering Using a Universal Quantile Criterion.
IRPS
Alexander Hirler, Ulrich Abelein, M. Büttner, Ricarda Fischbach, Göran Jerke, Andreas Krinke, S. Simon
2018 A conf
The need and opportunities of electromigration-aware integrated circuit design.
ICCAD
Steve Bigalke, Jens Lienig, Göran Jerke, Jürgen Scheible, Roland Jancke
2016 — conf
Analog layout automation via self-organization: Enhancing the novel SWARM approach.
LASCAS
Daniel Marolt, Jürgen Scheible, Göran Jerke, Vinko Marolt
2016 — conf
SWARM: A Multi-agent System for Layout Automation in Analog Integrated Circuit Design.
KES-AMSTA
Daniel Marolt, Jürgen Scheible, Göran Jerke, Vinko Marolt
2015 — conf
Physical verification flow for hierarchical analog ic design constraints.
ASP-DAC
Volker Meyer zu Bexten, Markus Tristl, Göran Jerke, Hartmut Marquardt, Dina Medhat
2013 — conf
Extended constraint management for analog and mixed-signal IC design.
ECCTD
Andreas Krinke, Maximilian Mittag, Göran Jerke, Jens Lienig
2012 A conf
Hierarchical propagation of geometric constraints for full-custom physical design of ICs.
DATE
Maximilian Mittag, Andreas Krinke, Göran Jerke, Wolfgang Rosenstiel
2010 — conf
Early-stage determination of current-density criticality in interconnects.
ISQED
Göran Jerke, Jens Lienig
2009 — conf
Constraint-driven design: the next step towards analog design automation.
ISPD
Göran Jerke, Jens Lienig
2008 — conf
A constraint-driven methodology for placement of analog and mixed-signal integrated circuits.
ICECS
Ammar Nassaj, Jens Lienig, Göran Jerke
2008 A conf
On the Verification of High-Order Constraint Compliance in IC Design.
DATE
Jan B. Freuer, Göran Jerke, Joachim Gerlach, Wolfgang Nebel
2005 Misc conf
Electromigration-Aware Physical Design of Integrated Circuits.
VLSI Design
Jens Lienig, Göran Jerke
2004 J jnl
Hierarchical current-density verification in arbitrarily shaped metallization patterns of analog circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Göran Jerke, Jens Lienig
2003 — conf
Current-driven wire planning for electromigration avoidance in analog circuits.
ASP-DAC
Jens Lienig, Göran Jerke