Gönenç Berkol

13 papers A 2C 1Journal 4Unranked 6
YearRankTypeTitle / Venue / Authors
2024 — conf
Circuit Design Techniques for High-Voltage Comparators and Amplifiers.
CICC
Gönenç Berkol, Matt Whitney
2021 J jnl
A 1.25 μJ per Measurement Ultrasound Rangefinder System in 65 nm CMOS for Explorations With a Swarm of Sensor Nodes.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gönenç Berkol, Peter G. M. Baltus, Pieter J. A. Harpe, Eugenio Cantatore
2019 — conf
A -81.6dBm Sensitivity Ultrasound Transceiver in 65nm CMOS for Symmetrical Data-Links.
ESSCIRC
Gönenç Berkol, Peter G. M. Baltus, Pieter J. A. Harpe, Eugenio Cantatore
2019 — conf
Post-Silicon Validation of Yield-Aware Analog Circuit Synthesis.
SMACD
Engin Afacan, Gönenç Berkol, Günhan Dündar
2018 — conf
Design of a Low-power Ultrasound Transceiver for Underwater Sensor Networks.
PRIME
Gönenç Berkol, Peter G. M. Baltus, Pieter J. A. Harpe, Eugenio Cantatore
2017 A conf
Exploring the unknown through successive generations of low power and low resource versatile agents.
DATE
Martin Andraud, Gönenç Berkol, Jaro De Roose, Santosh Gannavarapu, Haoming Xin, Eugenio Cantatore, Pieter J. A. Harpe, Marian Verhelst, Peter G. M. Baltus
2016 — conf
A hierarchical design automation concept for analog circuits.
ICECS
Gönenç Berkol, Engin Afacan, Günhan Dündar, E. V. Fernandez
2016 J jnl
A lifetime-aware analog circuit sizing tool.
Integr.
Engin Afacan, Gönenç Berkol, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya
2016 J jnl
An analog behavioral equivalence boundary search methodology for simulink models and circuit level designs utilizing evolutionary computation.
Integr.
Muharrem Orkun Saglamdemir, Gönenç Berkol, Günhan Dündar, Alper Sen
2016 J jnl
An analog circuit synthesis tool based on efficient and reliable yield estimation.
Microelectron. J.
Engin Afacan, Gönenç Berkol, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya
2015 A conf
A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool.
DATE
Engin Afacan, Gönenç Berkol, Ali Emre Pusane, Günhan Dündar, I. Faik Baskaya
2015 C conf
A novel yield aware multi-objective analog circuit optimization tool.
ISCAS
Gönenç Berkol, Engin Afacan, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya
2015 — conf
A two-step layout-in-the-loop design automation tool.
NEWCAS
Gönenç Berkol, Ahmet Unutulmaz, Engin Afacan, Günhan Dündar, Francisco V. Fernández, Ali Emre Pusane, I. Faik Baskaya