Gyung-Su Byun

21 papers Journal 9Unranked 12
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Dual-Channel Wearable Ring With MODWT-Based Signal Processing for Non-Invasive Blood Glucose Estimation: A Pilot Study.
IEEE Access
Quoc Cuong Bui, Areum Durey, Juyoung Lee, Gyung-Su Byun
2025 J jnl
Automated Internal Defect Identification and Localization Based on a Near-Field SAR Millimeter-Wave Imaging System.
IEEE Access
Quoc Cuong Bui, Weizhi Lin, Qiang Huang, Gyung-Su Byun
2024 — conf
A High-Speed HBM Receiver Design for High-Performance Computing Systems.
ISOCC
Thinh Nguyen-Viet, Gyung-Su Byun
2024 — conf
Analysis and Design of CRC-based SENT Interface for Future Automotive Applications.
ISOCC
Esha Muzammal, Saransh Rajjarwal, Min-Chae Kim, Gyung-Su Byun
2021 — conf
A High-speed Wireless Data Transfer for Non - Destructive Testing.
ISOCC
Hanh Dangba, Ngoc Thang Bui, Hae-Jin Kim, Jun-hee Song, Chaiyoon Chung, Gyung-Su Byun
2021 J jnl
The Comparison Features of ECG Signal with Different Sampling Frequencies and Filter Methods for Real-Time Measurement.
Symmetry
Ngoc Thang Bui, Gyung-Su Byun
2018 — conf
A 3D flash ADC structure for high-speed communication applications.
CCWC
Nahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Gyung-Su Byun
2018 J jnl
A Wide-Range Low-Power PLL-Based PI Multiphase Generator Using an Adaptive Frequency Tracking Technique.
IEEE Trans. Circuits Syst. II Express Briefs
Majid Jalalifar, Gyung-Su Byun
2018 — conf
Design of a Pre-Distortion Power Amplifier for Ku-Band/5G Applications.
EIT
Chung-Ching Lin, Ahmed Alzahmi, Nahid Mirzaie, Gyung-Su Byun
2018 J jnl
Three-Dimensional Pipeline ADC Utilizing TSV/ Design Optimization and Memristor Ratioed Logic.
IEEE Trans. Very Large Scale Integr. Syst.
Nahid Mirzaie, Ahmed Alzahmi, Hossein Shamsi, Gyung-Su Byun
2017 — conf
A low-power and performance-efficient SAR ADC design.
ISOCC
Nahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Insoo Kim, Gyung-Su Byun
2017 — conf
A performance-aware I/O interface for 3D stacked memory systems.
UEMCON
Nahid Mirzaie, Ahmed Alzahmi, Chung-Ching Lin, Gyung-Su Byun
2017 J jnl
An Energy-Efficient Mobile Memory I/O Interface Using Simultaneous Bidirectional Multilevel Dual-Band Signaling.
IEEE Trans. Circuits Syst. II Express Briefs
Majid Jalalifar, Gyung-Su Byun
2017 J jnl
Automatic Design and Yield Enhancement of Data Converters.
J. Circuits Syst. Comput.
Nahid Mirzaie, Hossein Shamsi, Gyung-Su Byun
2017 — conf
High-performance RF-interconnect for 3D stacked memory.
ISOCC
Ahmed Alzahmi, Nahid Mirzaie, Chung-Ching Lin, Insoo Kim, Gyung-Su Byun
2017 — conf
Low-power and high-performance 2.4 GHz RF transmitter for biomedical application.
UEMCON
Ahmed Alzahmi, Nahid Mirzaie, Chung-Ching Lin, Gyung-Su Byun
2017 J jnl
Yield-aware sizing of pipeline ADC using a multiple-objective evolutionary algorithm.
Int. J. Circuit Theory Appl.
Nahid Mirzaie, Hossein Shamsi, Gyung-Su Byun
2016 — conf
A 14.4Gb/s/pin 230fJ/b/pin/mm multi-level RF-interconnect for global network-on-chip communication.
A-SSCC
Majid Jalalifar, Gyung-Su Byun
2015 J jnl
A Low-Power 4-PAM Transceiver Using a Dual-Sampling Technique for Heterogeneous Latency-Sensitive Network-on-Chip.
IEEE Trans. Circuits Syst. II Express Briefs
Gyung-Su Byun, Mir Mohammad Navidi
2014 — conf
An energy-efficient mobile PAM memory interface for future 3D stacked mobile DRAMs.
ISQED
Majid Jalalifar, Gyung-Su Byun
2014 — conf
Comparative analysis of clock distribution networks for TSV-based 3D IC designs.
ISQED
Mir Mohammad Navidi, Gyung-Su Byun