Gwan S. Choi - RankMe

43 papers A 2B 1C 2Misc 7Journal 18Unranked 13

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	A high-throughput multimode low-density parity-check decoder for 5G New Radio. Int. J. Circuit Theory Appl. Sina Pourjabar, Gwan S. Choi
2021	J	`jnl`	CVR: A Continuously Variable Rate LDPC Decoder Using Parity Check Extension for Minimum Latency. J. Signal Process. Syst. Sina Pourjabar, Gwan S. Choi
2016	J	`jnl`	An Efficient Partial Sums Generator for Constituent Code based Successive Cancellation Decoding of Polar Codes. CoRR Tiben Che, Gwan S. Choi
2016	J	`jnl`	An Encoding Scheme with Constituent Codes Optimization for Polar Code-Aim to Reduce the Decoding Latency. CoRR Tiben Che, Gwan S. Choi
2016	J	`jnl`	Hardware Architecture of Complex K-best MIMO Decoder. CoRR Mehnaz Rahman, Gwan S. Choi
2016	C	`conf`	Overlapped list successive cancellation approach for hardware efficient polar code decoder. ISCAS Tiben Che, Jingwei Xu, Gwan S. Choi
2016	Misc	`conf`	TC: Throughput centric successive cancellation decoder hardware implementation for polar codes. ICASSP Tiben Che, Jingwei Xu, Gwan S. Choi
2015	Misc	`conf`	An iterative LR-aided MMSE extended soft MIMO decoding algorithm. ICNC Mehnaz Rahman, Ehsan Rohani, Gwan S. Choi
2015	Misc	`conf`	Compressive sensing and reception for MIMO-OFDM based cognitive radio. ICNC Jingwei Xu, Gwan S. Choi
2015	J	`jnl`	Fixed Point Realization of Iterative LR-Aided Soft MIMO Decoding Algorithm. CoRR Mehnaz Rahman, Gwan S. Choi
2015	J	`jnl`	Overlapped List Successive Cancellation Approach for Hardware Efficient Polar Code Decoder. CoRR Tiben Che, Jingwei Xu, Gwan S. Choi
2015	J	`jnl`	TC: Throughput Centric Successive Cancellation Decoder Hardware Implementation for Polar Codes. CoRR Tiben Che, Jingwei Xu, Gwan S. Choi
2015	B	`conf`	XJ-BP: Express Journey Belief Propagation Decoding for Polar Codes. GLOBECOM Jingwei Xu, Tiben Che, Gwan S. Choi
2015	J	`jnl`	XJ-BP: Express Journey Belief Propagation Decoding for Polar Codes. CoRR Jingwei Xu, Tiben Che, Gwan S. Choi
2014	Misc	`conf`	An iterative soft decision based adaptive K-best decoder without SNR estimation. ACSSC Mehnaz Rahman, Ehsan Rohani, Gwan S. Choi
2014	J	`jnl`	WaveSync: Low-Latency Source-Synchronous Bypass Network-on-Chip Architecture. ACM Trans. Design Autom. Electr. Syst. Yoon Seok Yang, Reeshav Kumar, Gwan S. Choi, Paul V. Gratz
2013	—	`conf`	Bidirectional interconnect design for low latency high bandwidth NoC. ICICDT Reeshav Kumar, Hrishikesh Deshpande, Gwan S. Choi, Alexander Sprintson, Paul Gratz
2012	C	`conf`	Exploiting path diversity for low-latency and high-bandwidth with the dual-path NoC router. ISCAS Yoon Seok Yang, Hrishikesh Deshpande, Gwan S. Choi, Paul Gratz
2011	J	`jnl`	Low-Power, Resilient Interconnection with Orthogonal Latin Squares. IEEE Des. Test Comput. Seung Eun Lee, Yoon Seok Yang, Gwan S. Choi, Wei Wu, Ravi R. Iyer
2009	—	`conf`	Array like runtime reconfigurable MIMO detectors for 802.11n WLAN: a design case study. ASP-DAC Pankaj Bhagawat, Rajballav Dash, Gwan S. Choi
2009	J	`jnl`	Circuit-Level Design Approaches for Radiation-Hard Digital Electronics. IEEE Trans. Very Large Scale Integr. Syst. Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan S. Choi
2009	J	`jnl`	Comments on "Techniques and Architectures for Hazard-Free Semi-Parallel Decoding of LDPC Codes". EURASIP J. Embed. Syst. Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary
2009	Misc	`conf`	Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels. VLSI Design Weihuang Wang, Gwan S. Choi, Kiran K. Gunnam
2009	J	`jnl`	Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels. J. Low Power Electron. Weihuang Wang, Euncheol Kim, Kiran K. Gunnam, Gwan S. Choi
2009	—	`conf`	SEU hardened clock regeneration circuits. ISQED Rajballav Dash, Rajesh Garg, Sunil P. Khatri, Gwan S. Choi
2008	—	`conf`	Next generation iterative LDPC solutions for magnetic recording storage. ACSCC Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Shaohua Yang, Yuanxing Lee
2007	Misc	`conf`	A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes. VLSI Design Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary
2007	—	`conf`	VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax. ICC Kiran K. Gunnam, Gwan S. Choi, Mark B. Yeary, Mohammed Atiquzzaman
2006	—	`conf`	Information Theoretic Capacity of Long On-chip Interconnects in the Presence of Crosstalk. ISQED Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
2006	A	`conf`	Information theoretic approach to address delay and reliability in long on-chip interconnects. ICCAD Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
2006	Misc	`conf`	Programmable LDPC Decoder Based on the Bubble-Sort Algorithm. VLSI Design Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
2005	—	`conf`	Quantized LDPC decoder design for binary symmetric channels. ISCAS (6) Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
2004	—	`conf`	Scaleable check node centric architecture for LDPC decoder. ISCAS (4) Rohit Singhal, Gwan S. Choi, Nathan Mickler, Prabhavati Koteeswaran
2000	J	`jnl`	A Reliability Testing Environment for Off-the-Shelf Memory Subsystems. IEEE Des. Test Comput. Seung H. Hwang, Gwan S. Choi
1999	J	`jnl`	Selective-set-invalidation (SSI) for soft-error-resilient cache architecture. SIGARCH Comput. Archit. News Seung H. Hwang, Gwan S. Choi
1998	—	`conf`	Error and Failure Analysis of a UNIX Server. HASE Ronjeet Lal, Gwan S. Choi
1998	—	`conf`	On-Chip Cache Memory Resilience. HASE Seung H. Hwang, Gwan S. Choi
1996	J	`jnl`	A Gate-Level Simulation Environment for Alpha-Particle-Induced Transient Faults. IEEE Trans. Computers Hungse Cha, Elizabeth M. Rudnick, Janak H. Patel, Ravishankar K. Iyer, Gwan S. Choi
1994	—	`conf`	Device-Level Transient Fault Modeling. FTCS Gregory L. Ries, Gwan S. Choi, Ravishankar K. Iyer
1993	—	`conf`	A Fast and Accurate Gate-Level Transient Fault Simulation Environment. FTCS Hungse Cha, Elizabeth M. Rudnick, Gwan S. Choi, Janak H. Patel, Ravishankar K. Iyer
1993	A	`conf`	Fault behavior dictionary for simulation of device-level transients. ICCAD Gwan S. Choi, Ravishankar K. Iyer, Daniel G. Saab
1993	—	`conf`	Wear-Out Simulation Environment for VLSI Designs. FTCS Gwan S. Choi, Ravishankar K. Iyer
1992	J	`jnl`	FOCUS: An Experimental Environment for Fault Sensitivity Analysis. IEEE Trans. Computers Gwan S. Choi, Ravishankar K. Iyer