Guy Lemieux

26 papers A* 1A 3B 1C 1Misc 1Journal 6Unranked 12
YearRankTypeTitle / Venue / Authors
2026 A conf
Gatling-V: An FPGA-based RISC-V Vector Core with Single-Issue, Multiple In-Flight Instruction Execution.
FPGA
Farid Chalabi, Guy Lemieux
2025 C conf
Range Extension with Supernormals for Mixed-Precision 8-bit DNN Training.
ARITH
Shing Wai Pun, Bozhang Bao, Silviu-Ioan Filip, Guy Lemieux, John V. Kim, Nazar Misyats, Nirvik Pande, Victor Ravain, Robert Sherrick
2025 B conf
Virtualization and Dynamic Reconfiguration of Custom Instruction Accelerators (CIA) in RISC-V Embedded Systems.
FPL
Bea Healy, Brandon Freiberger, Jonas Kuenstler, King Lok Chung, Emil Cozac, Meinhard Kissich, Gennadiy Knis, Ron Sass, Dirk Koch, Jan Gray, Guy Lemieux
2022 — conf
Mixing Low-Precision Formats in Multiply-Accumulate Units for DNN Training.
FPT
Mariko Tatsumi, Silviu-Ioan Filip, Caroline White, Olivier Sentieys, Guy Lemieux
2020 A* conf
Procrustes: a Dataflow and Accelerator for Sparse Deep Neural Network Training.
MICRO
Dingqing Yang, Amin Ghasemazar, Xiaowei Ren, Maximilian Golub, Guy Lemieux, Mieszko Lis
2020 J jnl
Procrustes: a Dataflow and Accelerator for Sparse Deep Neural Network Training.
CoRR
Dingqing Yang, Amin Ghasemazar, Xiaowei Ren, Maximilian Golub, Guy Lemieux, Mieszko Lis
2019 — conf
Full Deep Neural Network Training On A Pruned Weight Budget.
SysML
Maximilian Golub, Guy Lemieux, Mieszko Lis
2018 J jnl
DropBack: Continuous Pruning During Training.
CoRR
Maximilian Golub, Guy Lemieux, Mieszko Lis
2015 A conf
Area Optimization of Arithmetic Units by Component Sharing for FPGAs (Abstract Only).
FPGA
Shao Lin S. T. Tang, Guy Lemieux
2014 A conf
Soft vector processors with streaming pipelines.
FPGA
Aaron Severance, Joe Edwards, Hossein Omidian, Guy Lemieux
2012 Misc conf
VENICE: A Compact Vector Processor for FPGA Applications.
FCCM
Aaron Severance, Guy Lemieux
2012 — conf
VENICE: A compact vector processor for FPGA applications.
FPT
Aaron Severance, Guy Lemieux
2011 — conf
VENICE: A compact vector processor for FPGA applications.
Hot Chips Symposium
Aaron Severance, Guy Lemieux
2010 J jnl
A 4 GHz Non-Resonant Clock Driver With Inductor-Assisted Energy Return to Power Grid.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Shahriar Mirabbasi, William G. Dunford, Patrick R. Palmer
2009 — conf
Rapid synthesis and simulation of computational circuits in an MPPA.
FPT
David Grant, Graeme Smecher, Guy Lemieux, Rosemary Francis
2008 — conf
Energy Recovery from High-Frequency Clocks Using DC-DC Converters.
ISVLSI
Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Shahriar Mirabbasi, William G. Dunford, Patrick R. Palmer
2008 J jnl
Interconnect Driver Design for Long Wires in Field-Programmable Gate Arrays.
J. Signal Process. Syst.
Edmund Lee, Guy Lemieux, Shahriar Mirabbasi
2007 — conf
A 3GHz Switching DC-DC Converter Using Clock-Tree Charge-Recycling in 90nm CMOS with Integrated Output Filter.
ISSCC
Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Shahriar Mirabbasi, Patrick R. Palmer
2007 — conf
A Case for Soft Vector Processors in FPGAs.
FPT
Jason Yu, Guy Lemieux
2006 — conf
Interconnect driver design for long wires in field-programmable gate arrays.
FPT
Edmund Lee, Guy Lemieux, Shahriar Mirabbasi
2006 — conf
Perturber: semi-synthetic circuit generation using ancestor control for testing incremental place and route.
FPT
David Grant, Guy Lemieux
2006 J jnl
System-on-Chip: Reuse and Integration.
Proc. IEEE
Resve A. Saleh, Steven J. E. Wilton, Shahriar Mirabbasi, Alan J. Hu, Mark R. Greenstreet, Guy Lemieux, Partha Pratim Pande, Cristian Grecu, André Ivanov
2005 — conf
An improved "soft" eFPGA design and implementation strategy.
CICC
Victor O. Aken'Ova, Guy Lemieux, Resve A. Saleh
2004 — book
Design of interconnection networks for programmable logic.
Guy Lemieux, David A. Lewis
2004 — conf
Directional and single-driver wires in FPGA interconnect.
FPT
Guy Lemieux, Edmund Lee, Marvin Tom, Anthony J. Yu
1996 J jnl
Segmented Routing for Speed-Performance and Routability in Field-Programmable Gate Arrays.
VLSI Design
Stephen Brown, Muhammad M. Khellah, Guy Lemieux