Guojie Luo - RankMe

148 papers A* 12A 30B 4C 10Misc 10Journal 52Unranked 29

Year	Rank	Type	Title / Venue / Authors
2026	A*	`conf`	DynamicRTL: RTL Representation Learning for Dynamic Circuit Behavior. AAAI Ruiyang Ma, Yunhao Zhou, Yipeng Wang, Yi Liu, Zhengyuan Shi, Ziyang Zheng, Kexin Chen, Zhiqiang He, Lingwei Yan, Gang Chen, Qiang Xu, Guojie Luo
2026	J	`jnl`	HeRo: Adaptive Orchestration of Agentic RAG on Heterogeneous Mobile SoC. CoRR Maoliang Li, Jiayu Chen, Zihao Zheng, Ziqian Li, Xinhao Sun, Guojie Luo, Chenchen Liu, Xiang Chen
2026	—	`conf`	Pooling Engram Conditional Memory in Large Language Models using CXL. EuroMLSys@EuroSys Ruiyang Ma, Teng Ma, Zhiyuan Su, Hantian Zha, Xinpeng Zhao, Xuchun Shang, Xingrui Yi, Zheng Liu, Zhu Cao, An Wu, Zhichong Dou, Ziqian Liu, Daikang Kuang, Guojie Luo
2026	J	`jnl`	Pooling Engram Conditional Memory in Large Language Models using CXL. CoRR Ruiyang Ma, Teng Ma, Zhiyuan Su, Hantian Zha, Xinpeng Zhao, Xuchun Shang, Xingrui Yi, Zheng Liu, Zhu Cao, An Wu, Zhichong Dou, Ziqian Liu, Daikang Kuang, Guojie Luo
2026	J	`jnl`	RAPID: Redundancy-Aware and Compatibility-Optimal Edge-Cloud Partitioned Inference for Diverse VLA Models. CoRR Zihao Zheng, Sicheng Tian, Hangyu Cao, Chenyue Li, Jiayu Chen, Maoliang Li, Xinhao Sun, Hailong Zou, Guojie Luo, Xiang Chen
2026	J	`jnl`	RoboECC: Multi-Factor-Aware Edge-Cloud Collaborative Deployment for VLA Models. CoRR Zihao Zheng, Hangyu Cao, Jiayu Chen, Sicheng Tian, Chenyue Li, Maoliang Li, Xinhao Sun, Guojie Luo, Xiang Chen
2026	J	`jnl`	ToProVAR: Efficient Visual Autoregressive Modeling via Tri-Dimensional Entropy-Aware Semantic Analysis and Sparsity Optimization. CoRR Jiayu Chen, Ruoyu Lin, Zihao Zheng, Jingxin Li, Maoliang Li, Guojie Luo, Xiang Chen
2025	J	`jnl`	Agent.xpu: Efficient Scheduling of Agentic LLM Workloads on Heterogeneous SoC. CoRR Xinming Wei, Jiahao Zhang, Haoran Li, Jiayu Chen, Rui Qu, Maoliang Li, Xiang Chen, Guojie Luo
2025	—	`conf`	Bridging the Gap between Hardware Fuzzing and Industrial Verification. ACM Great Lakes Symposium on VLSI Ruiyang Ma, Tianhao Wei, Jiaxi Zhang, Chun Yang, Jiangfang Yi, Guojie Luo
2025	J	`jnl`	Bridging the Gap between Hardware Fuzzing and Industrial Verification. CoRR Ruiyang Ma, Tianhao Wei, Jiaxi Zhang, Chun Yang, Jiangfang Yi, Guojie Luo
2025	B	`conf`	Dispenser: Hierarchical KV Cache Management for Efficient LLM Generative Inference. ICPADS Beiquan Cao, Kaigui Bian, Guojie Luo, Joongheon Kim
2025	J	`jnl`	DynamicRTL: RTL Representation Learning for Dynamic Circuit Behavior. CoRR Ruiyang Ma, Yunhao Zhou, Yipeng Wang, Yi Liu, Zhengyuan Shi, Ziyang Zheng, Kexin Chen, Zhiqiang He, Lingwei Yan, Gang Chen, Qiang Xu, Guojie Luo
2025	J	`jnl`	Floorplanning With I/O Assignment via Feasibility-Seeking and Superiorization Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Shan Yu, Yair Censor, Guojie Luo
2025	J	`jnl`	NoCFuzzer: Automating NoC Verification in UVM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ruiyang Ma, Jiayi Huang, Shijian Zhang, Yuan Xie, Guojie Luo
2025	J	`jnl`	OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine-Learning Tasks in Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Liwei Ni, Rui Wang, Miao Liu, Xingyu Meng, Xiaoze Lin, Junfeng Liu, Guojie Luo, Zhufei Chu, Weikang Qian, Xiaoyan Yang, Biwei Xie, Xingquan Li, Huawei Li
2025	J	`jnl`	Pseudo-Knowledge Graph: Meta-Path Guided Retrieval and In-Graph Text for RAG-Equipped LLM. CoRR Yuxin Yang, Haoyang Wu, Tao Wang, Jia Yang, Hao Ma, Guojie Luo
2025	—	`conf`	TACPlace: Ultrafast Thermal-Aware Chiplet Placement with Feasibility Seeking. ACM Great Lakes Symposium on VLSI Shan Yu, Haiyang Liu, Xinming Wei, Bizhao Shi, Guojie Luo
2025	C	`conf`	TensTFM: Efficient Total Focusing Method for Ultrasonic Array Imaging on Dataflow Accelerators. ICCD Jieran Zhang, Bizhao Shi, Guojie Luo
2025	J	`jnl`	UltraSketchLLM: Saliency-Driven Sketching for Ultra-Low Bit LLM Compression. CoRR Sunan Zou, Ziyun Zhang, Xueting Sun, Guojie Luo
2025	A	`conf`	Wit-HW: Bug Localization in Hardware Design Code via Witness Test Case Generation. ICCAD Ruiyang Ma, Daikang Kuang, Ziqian Liu, Jiaxi Zhang, Ping Fan, Guojie Luo
2025	J	`jnl`	Wit-HW: Bug Localization in Hardware Design Code via Witness Test Case Generation. CoRR Ruiyang Ma, Daikang Kuang, Ziqian Liu, Jiaxi Zhang, Ping Fan, Guojie Luo
2024	A	`conf`	AceRoute: Adaptive Compute-Efficient FPGA Routing with Pluggable Intra-Connection Bidirectional Exploration. ICCAD Xinming Wei, Ziyun Zhang, Sunan Zou, Kaiwen Sun, Jiahao Zhang, Jiaxi Zhang, Ping Fan, Guojie Luo
2024	A	`conf`	An Endeavor to Industrialize Hardware Fuzzing: Automating NoC Verification in UVM. DATE Ruiyang Ma, Huatao Zhao, Jiayi Huang, Shijian Zhang, Guojie Luo
2024	A	`conf`	BESWAC: Boosting Exact Synthesis via Wiser SAT Solver Call. DATE Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo
2024	J	`jnl`	Erratum to: Large circuit models: opportunities and challenges. Sci. China Inf. Sci. Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Ru Huang, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yu Li, Yun Liang, Jinwei Liu, Yi Liu, Yibo Lin, Guojie Luo, Hongyang Pan, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Junchi Yan, Jun Yang, Bei Yu, Mingxuan Yuan, Evangeline F. Y. Young, Xuan Zeng, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024	J	`jnl`	Floorplanning with I/O assignment via feasibility-seeking and superiorization methods. CoRR Shan Yu, Yair Censor, Guojie Luo
2024	A*	`conf`	G2PM: Performance Modeling for ACAP Architecture with Dual-Tiered Graph Representation Learning. DAC Tuo Dai, Bizhao Shi, Guojie Luo
2024	—	`conf`	ImageMap: Enabling Efficient Mapping from Image Processing DSL to CGRA. Euro-Par (1) Bizhao Shi, Tuo Dai, Sunan Zou, Xinming Wei, Guojie Luo
2024	—	`conf`	Incremental SAT-based Exact Synthesis. ACM Great Lakes Symposium on VLSI Sunan Zou, Jiaxi Zhang, Guojie Luo
2024	J	`jnl`	Large circuit models: opportunities and challenges. Sci. China Inf. Sci. Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Ru Huang, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yu Li, Yun Liang, Jinwei Liu, Yi Liu, Yibo Lin, Guojie Luo, Hongyang Pan, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Junchi Yan, Jun Yang, Bei Yu, Mingxuan Yuan, Evangeline F. Y. Young, Xuan Zeng, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024	C	`conf`	MuSA: Multi-Sketch Accelerator with Hybrid Parallelism and Coalesced Memory Organization. ICCD Sunan Zou, Bizhao Shi, Ziyun Zhang, Guojie Luo
2024	J	`jnl`	OpenLS-DGF: An Adaptive Open-Source Dataset Generation Framework for Machine Learning Tasks in Logic Synthesis. CoRR Liwei Ni, Rui Wang, Miao Liu, Xingyu Meng, Xiaoze Lin, Junfeng Liu, Guojie Luo, Zhufei Chu, Weikang Qian, Xiaoyan Yang, Biwei Xie, Xingquan Li, Huawei Li
2024	A*	`conf`	PONO: Power Optimization with Near Optimal SMT-based Sub-circuit Generation. DAC Sunan Zou, Guojie Luo
2024	A*	`conf`	PT-Map: Efficient Program Transformation Optimization for CGRA Mapping. DAC Bizhao Shi, Tuo Dai, Jiaxi Zhang, Xuechao Wei, Guojie Luo
2024	J	`jnl`	PowerSyn: A Logic Synthesis Framework With Early Power Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sunan Zou, Jiaxi Zhang, Bizhao Shi, Guojie Luo
2024	A*	`conf`	Rethinking IC Layout Vulnerability: Simulation-Based Hardware Trojan Threat Assessment with High Fidelity. SP Xinming Wei, Jiaxi Zhang, Guojie Luo
2024	A	`conf`	SCGen: A Versatile Generator Framework for Agile Design of Stochastic Circuits. DATE Zexi Li, Haoran Jin, Kuncai Zhong, Guojie Luo, Runsheng Wang, Weikang Qian
2024	J	`jnl`	The Dawn of AI-Native EDA: Promises and Challenges of Large Circuit Models. CoRR Lei Chen, Yiqi Chen, Zhufei Chu, Wenji Fang, Tsung-Yi Ho, Yu Huang, Sadaf Khan, Min Li, Xingquan Li, Yun Liang, Yibo Lin, Jinwei Liu, Yi Liu, Guojie Luo, Zhengyuan Shi, Guangyu Sun, Dimitrios Tsaras, Runsheng Wang, Ziyi Wang, Xinming Wei, Zhiyao Xie, Qiang Xu, Chenhao Xue, Evangeline F. Y. Young, Bei Yu, Mingxuan Yuan, Haoyi Zhang, Zuodong Zhang, Yuxiang Zhao, Hui-Ling Zhen, Ziyang Zheng, Binwu Zhu, Keren Zhu, Sunan Zou
2024	J	`jnl`	VerilogReader: LLM-Aided Hardware Test Generation. CoRR Ruiyang Ma, Yuxin Yang, Ziqian Liu, Jiaxi Zhang, Min Li, Junhua Huang, Guojie Luo
2024	J	`jnl`	Weave: Abstraction and Integration Flow for Accelerators of Generated Modules. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tuo Dai, Bizhao Shi, Guojie Luo
2024	A	`conf`	WideSA: A High Array Utilization Mapping Scheme for Uniform Recurrences on ACAP. DATE Tuo Dai, Bizhao Shi, Guojie Luo
2024	J	`jnl`	WideSA: A High Array Utilization Mapping Scheme for Uniform Recurrences on the Versal ACAP Architecture. CoRR Tuo Dai, Bizhao Shi, Guojie Luo
2024	B	`conf`	iEDA: An Open-source infrastructure of EDA. ASPDAC Xingquan Li, Zengrong Huang, Simin Tao, Zhipeng Huang, Chunan Zhuang, Hao Wang, Yifan Li, Yihang Qiu, Guojie Luo, Huawei Li, Haihua Shen, Mingyu Chen, Dongbo Bu, Wenxing Zhu, Ye Cai, Xiaoming Xiong, Ying Jiang, Yi Heng, Peng Zhang, Bei Yu, Biwei Xie, Yungang Bao
2023	J	`jnl`	An ACM Trans. Embed. Comput. Syst. Zhengzheng Ma, Tuo Dai, Xuechao Wei, Guojie Luo
2023	—	`conf`	An Efficient Dataflow for Convolutional Generative Models. ICFPT Zhengzheng Ma, Guojie Luo
2023	J	`jnl`	Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, Yuan Xie
2023	—	`conf`	F-TFM: Accelerating Total Focusing Method for Ultrasonic Array Imaging on FPGA. ICFPT Bizhao Shi, Jieran Zhang, Guojie Luo
2023	A	`conf`	Fast Exact NPN Classification with Influence-Aided Canonical Form. ICCAD Yonghe Zhang, Liwei Ni, Jiaxi Zhang, Guojie Luo, Huawei Li, Shenggen Zheng
2023	J	`jnl`	Fast Exact NPN Classification with Influence-aided Canonical Form. CoRR Yonghe Zhang, Liwei Ni, Jiaxi Zhang, Guojie Luo, Huawei Li, Shenggen Zheng
2023	A*	`conf`	GDSII-Guard: ECO Anti-Trojan Optimization with Exploratory Timing-Security Trade-Offs. DAC Xinming Wei, Jiaxi Zhang, Guojie Luo
2023	J	`jnl`	MEC: An Open-source Fine-grained Mapping Equivalence Checking Tool for FPGA. CoRR Liwei Ni, Zonglin Yang, Jiaxi Zhang, Changhong Feng, Jianhua Liu, Guojie Luo, Huawei Li, Biwei Xie, Xingquan Li
2023	—	`conf`	OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. ASICON Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin
2023	J	`jnl`	OpenPARF: An Open-Source Placement and Routing Framework for Large-Scale Heterogeneous FPGAs with Deep Learning Toolkit. CoRR Jing Mai, Jiarui Wang, Zhixiong Di, Guojie Luo, Yun Liang, Yibo Lin
2023	J	`jnl`	Per-RMAP: Feasibility-Seeking and Superiorization Methods for Floorplanning with I/O Assignment. CoRR Shan Yu, Yair Censor, Ming Jiang, Guojie Luo
2023	A*	`conf`	RF-SIFTER: Sifting Signals at Layer-0.5 to Mitigate Wideband Cross-Technology Interference for IoT. MobiCom Xiong Wang, Jun Huang, Bizhao Shi, Zhe Ou, Guojie Luo, Linghe Kong, Daqing Zhang, Chenren Xu
2023	A	`conf`	Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions. DATE Jiaxi Zhang, Shenggen Zheng, Liwei Ni, Huawei Li, Guojie Luo
2023	J	`jnl`	Rethinking NPN Classification from Face and Point Characteristics of Boolean Functions. CoRR Jiaxi Zhang, Shenggen Zheng, Liwei Ni, Huawei Li, Guojie Luo
2023	A	`conf`	Weave: Abstraction for Accelerator Integration of Generated Modules. FPGA Tuo Dai, Bizhao Shi, Guojie Luo
2023	J	`jnl`	iEDA: An Open-Source Intelligent Physical Implementation Toolkit and Library. CoRR Xingquan Li, Simin Tao, Zengrong Huang, Shijian Chen, Zhisheng Zeng, Liwei Ni, Zhipeng Huang, Chunan Zhuang, Hongxi Wu, Weiguo Li, Xueyan Zhao, He Liu, Shuaiying Long, Wei He, Bojun Liu, Sifeng Gan, Zihao Yu, Tong Liu, Yuchi Miao, Zhiyuan Yan, Hao Wang, Jie Zhao, Yifan Li, Ruizhi Liu, Xiaoze Lin, Bo Yang, Zhen Xue, Fuxing Huang, Zonglin Yang, Zhenggang Wu, Jiangkao Li, Yuezuo Liu, Ming Peng, Yihang Qiu, Wenrui Wu, Zheqing Shao, Kai Mo, Jikang Liu, Yuyao Liang, Mingzhe Zhang, Zhuang Ma, Xiang Cong, Daxiang Huang, Guojie Luo, Huawei Li, Haihua Shen, Mingyu Chen, Dongbo Bu, Wenxing Zhu, Ye Cai, Xiaoming Xiong, Ying Jiang, Yi Heng, Peng Zhang, Biwei Xie, Yungang Bao
2022	—	`conf`	ART-3D: Analytical 3D Placement with Reinforced Parameter Tuning for Monolithic 3D ICs. ISPD Gauthaman Murali, Sandra Maria Shaji, Anthony Agnesina, Guojie Luo, Sung Kyu Lim
2022	—	`conf`	EasyMAC: Design Exploration-Enabled Multiplier-Accumulator Generator Using a Canonical Architectural Representation: (Invited Paper). ASP-DAC Jiaxi Zhang, Qiuyang Gao, Yijiang Guo, Bizhao Shi, Guojie Luo
2022	C	`conf`	Purlin: A Versatile Toolkit for the Generation and Simulation of On-Chip Networks. ICCD Yijiang Guo, Xinming Wei, Jiaxi Zhang, Guojie Luo
2022	J	`jnl`	The Case for FPGA-Based Edge Computing. IEEE Trans. Mob. Comput. Chenren Xu, Shuang Jiang, Guojie Luo, Guangyu Sun, Ning An, Gang Huang, Xuanzhe Liu
2021	C	`conf`	An FPGA-Based Neural Network Overlay for ADAS Supporting Multi-Model and Multi-Mode. ISCAS Jiaxi Zhang, Tao Yang, Qingzheng Li, Bo Zhou, Yang Yang, Guojie Luo, Jianping Shi
2021	J	`jnl`	Area Efficient Pattern Representation of Binary Neural Networks on RRAM. J. Comput. Sci. Technol. Feng Wang, Guojie Luo, Guang-Yu Sun, Yuhao Wang, Dimin Niu, Hongzhong Zheng
2021	A*	`conf`	BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices. DAC Zhe Zhou, Bizhao Shi, Zhe Zhang, Yijin Guan, Guangyu Sun, Guojie Luo
2021	J	`jnl`	BlockGNN: Towards Efficient GNN Acceleration Using Block-Circulant Weight Matrices. CoRR Zhe Zhou, Bizhao Shi, Zhe Zhang, Yijin Guan, Guangyu Sun, Guojie Luo
2021	J	`jnl`	Coarse-Grained Parallel Routing With Recursive Partitioning for FPGAs. IEEE Trans. Parallel Distributed Syst. Minghua Shen, Guojie Luo, Nong Xiao
2021	J	`jnl`	Combining Static and Dynamic Load Balance in Parallel Routing for FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Minghua Shen, Guojie Luo, Nong Xiao
2021	A	`conf`	Enhanced Fast Boolean Matching based on Sensitivity Signatures Pruning. ICCAD Jiaxi Zhang, Liwei Ni, Shenggen Zheng, Hao Liu, Xiangfu Zou, Feng Wang, Guojie Luo
2021	J	`jnl`	Enhanced Fast Boolean Matching based on Sensitivity Signatures Pruning. CoRR Jiaxi Zhang, Liwei Ni, Shenggen Zheng, Hao Liu, Xiangfu Zou, Feng Wang, Guojie Luo
2021	J	`jnl`	FPGA Acceleration for 3-D Low-Dose Tomographic Reconstruction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wentai Zhang, Linjun Qiao, William Hsu, Yong Cui, Ming Jiang, Guojie Luo
2021	Misc	`conf`	FPGA-accelerated Iterative Reconstruction for Transmission Electron Tomography. FCCM Linjun Qiao, Guojie Luo, Wentai Zhang, Ming Jiang
2021	J	`jnl`	Feasibility study of practical vital sign detection using millimeter-wave radios. CCF Trans. Pervasive Comput. Interact. Weicheng Wang, Zhenhua Jia, Chenren Xu, Guojie Luo, Daqing Zhang, Ning An, Yanyong Zhang
2021	A*	`conf`	Formulating Data-arrival Synchronizers in Integer Linear Programming for CGRA Mapping. DAC Yijiang Guo, Jiarui Wang, Jiaxi Zhang, Guojie Luo
2021	A	`conf`	SSR: A Skeleton-based Synthesis Flow for Hybrid Processing-in-RRAM Modes. ICCAD Feng Wang, Guangyu Sun, Guojie Luo
2021	J	`jnl`	STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Feng Wang, Guojie Luo, Guangyu Sun, Jiaxi Zhang, Jinfeng Kang, Yuhao Wang, Dimin Niu, Hongzhong Zheng
2021	Misc	`conf`	TOCO: A Systolic Network for Efficient Transposed Convolutions with Output-Reuse Paths. FCCM Zhengzheng Ma, Guojie Luo
2020	A	`conf`	Dual-Output LUT Merging during FPGA Technology Mapping. ICCAD Feng Wang, Liren Zhu, Jiaxi Zhang, Lei Li, Yang Zhang, Guojie Luo
2020	J	`jnl`	EEPC: A Framework for Energy-Efficient Parallel Control of Connected Cars. IEEE Trans. Parallel Distributed Syst. Minghua Shen, Guojie Luo, Nong Xiao
2020	Misc	`conf`	Evaluating Low-Memory GEMMs for Convolutional Neural Network Inference on FPGAs. FCCM Wentai Zhang, Ming Jiang, Guojie Luo
2020	B	`conf`	FPGA Acceleration of Ray-Based Iterative Algorithm for 3D Low-Dose CT Reconstruction. FPL Linjun Qiao, Guojie Luo, Wentai Zhang, Ming Jiang
2020	Misc	`conf`	FPGA-accelerated Automatic Alignment for Three-dimensional Tomography. FCCM Shuang Wen, Guojie Luo
2020	A*	`conf`	Hardware-assisted Service Live Migration in Resource-limited Edge Computing Systems. DAC Zhe Zhou, Xintong Li, Xiaoyang Wang, Zheng Liang, Guangyu Sun, Guojie Luo
2020	—	`conf`	SaFace: Towards Scenario-aware Face Recognition via Edge Computing System. HotEdge Zhe Zhou, Bingzhe Wu, Zheng Liang, Guangyu Sun, Chenren Xu, Guojie Luo
2020	J	`jnl`	Serial-Equivalent Static and Dynamic Parallel Routing for FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Minghua Shen, Wentai Zhang, Guojie Luo, Nong Xiao
2019	—	`conf`	An Analytical Method of Automatic Alignment for Electron Tomography. LABELS/HAL-MICCAI/CuRIOUS@MICCAI Shuang Wen, Guojie Luo
2019	A	`conf`	An Efficient Mapping Approach to Large-Scale DNNs on Multi-FPGA Architectures. DATE Wentai Zhang, Jiaxi Zhang, Minghua Shen, Guojie Luo, Nong Xiao
2019	J	`jnl`	Data-Flow Graph Mapping Optimization for CGRA With Deep Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dajiang Liu, Shouyi Yin, Guojie Luo, Jiaxing Shang, Leibo Liu, Shaojun Wei, Yong Feng, Shangbo Zhou
2019	J	`jnl`	Exploring GPU-Accelerated Routing for FPGAs. IEEE Trans. Parallel Distributed Syst. Minghua Shen, Guojie Luo, Nong Xiao
2019	A	`conf`	FTConv: FPGA Acceleration for Transposed Convolution Layers in Deep Neural Networks. FPGA Zhucheng Tang, Guojie Luo, Ming Jiang
2019	C	`conf`	Frequency Improvement of Systolic Array-Based CNNs on FPGAs. ISCAS Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, Jason Cong
2019	—	`conf`	Parallel Stateful Logic in RRAM: Theoretical Analysis and Arithmetic Design. ASAP Feng Wang, Guojie Luo, Guangyu Sun, Jiaxi Zhang, Peng Huang, Jinfeng Kang
2019	—	`conf`	Winograd-Based Real-Time Super-Resolution System on FPGA. FPT Bizhao Shi, Zhucheng Tang, Guojie Luo, Ming Jiang
2018	A*	`conf`	Accelerating Mobile Applications at the Network Edge with Software-Programmable FPGAs. INFOCOM Shuang Jiang, Dong He, Chenxi Yang, Chenren Xu, Guojie Luo, Yang Chen, Yunlu Liu, Jiangwei Jiang
2018	A	`conf`	Adaptive-precision framework for SGD using deep Q-learning. ICCAD Wentai Zhang, Hanxian Huang, Jiaxi Zhang, Ming Jiang, Guojie Luo
2018	A	`conf`	BoxPlacer: Force Directed-Based Timing-Driven Placement for Large-Scale FPGAs: (Abstract Only). FPGA Minghua Shen, Jiaxi Zhang, Nong Xiao, Guojie Luo
2018	A	`conf`	DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only). FPGA Gai Liu, Ecenur Ustun, Shaojie Xiang, Chang Xu, Guojie Luo, Zhiru Zhang
2018	Misc	`conf`	Exploiting Box Expansion and Grid Partitioning for Parallel FPGA Routing. FCCM Minghua Shen, Guojie Luo, Nong Xiao
2018	Misc	`conf`	FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos. FCCM Zhuolun He, Hanxian Huang, Ming Jiang, Yuanchao Bai, Guojie Luo
2018	A	`conf`	Mapping Large-Scale DNNs on Asymmetric FPGAs: (Abstract Only). FPGA Wentai Zhang, Jiaxi Zhang, Minghua Shen, Nong Xiao, Guojie Luo
2018	—	`book`	Smartphone-Based Indoor Map Construction - Principles and Applications Ruipeng Gao, Fan Ye, Guojie Luo, Jason Cong
2018	A	`conf`	Towards Serial-Equivalent Parallel Routing for FPGAs: (Abstract Only). FPGA Minghua Shen, Wentai Zhang, Nong Xiao, Guojie Luo
2018	—	`conf`	V-PIM: An Analytical Overhead Model for Processing-in-Memory Architectures. NVMSA Peichen Xie, Guangyu Sun, Feng Wang, Guojie Luo
2018	A	`conf`	cuMBIR: An Efficient Framework for Low-dose X-ray CT Image Reconstruction on GPUs. ICS Xiuhong Li, Yun Liang, Wentai Zhang, Taide Liu, Haochen Li, Guojie Luo, Ming Jiang
2017	A	`conf`	A Parallel Bandit-Based Approach for Autotuning FPGA Compilation. FPGA Chang Xu, Gai Liu, Ritchie Zhao, Stephen Yang, Guojie Luo, Zhiru Zhang
2017	A	`conf`	A coordinated synchronous and asynchronous parallel routing approach for FPGAs. ICCAD Minghua Shen, Guojie Luo, Nong Xiao
2017	A	`conf`	Corolla: GPU-Accelerated FPGA Routing Based on Subgraph Dynamic Expansion. FPGA Minghua Shen, Guojie Luo
2017	C	`conf`	Dependency-Aware Parallel Routing for Large-Scale FPGAs. ICCD Minghua Shen, Nong Xiao, Guojie Luo
2017	A	`conf`	FPGA Acceleration for Computational Glass-Free Displays. FPGA Zhuolun He, Guojie Luo
2017	Misc	`conf`	Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning. FCCM Minghua Shen, Guojie Luo
2017	C	`conf`	Search space reduction for the non-exact projective NPNP Boolean matching problem. ISCAS Feng Wang, Jiaxi Zhang, Lange Wu, Wentai Zhang, Guojie Luo
2017	J	`jnl`	Smartphone-Based Real Time Vehicle Tracking in Indoor Parking Structures. IEEE Trans. Mob. Comput. Ruipeng Gao, Mingmin Zhao, Tao Ye, Fan Ye, Yizhou Wang, Guojie Luo
2017	A	`conf`	Tiguan: Energy-aware collision-free control for large-scale connected vehicles. ISLPED Minghua Shen, Guojie Luo
2016	C	`conf`	A fast and accurate approach for common path pessimism removal in static timing analysis. ISCAS Baihong Jin, Guojie Luo, Wentai Zhang
2016	J	`jnl`	Analytical Clustering Score with Application to Postplacement Register Clustering. ACM Trans. Design Autom. Electr. Syst. Chang Xu, Guojie Luo, Peixin Li, Yiyu Shi, Iris Hui-Ru Jiang
2016	A	`conf`	Energy-Efficient CNN Implementation on a Deeply Pipelined FPGA Cluster. ISLPED Chen Zhang, Di Wu, Jiayu Sun, Guangyu Sun, Guojie Luo, Jason Cong
2016	J	`jnl`	Multi-Story Indoor Floor Plan Reconstruction via Mobile Crowdsensing. IEEE Trans. Mob. Comput. Ruipeng Gao, Mingmin Zhao, Tao Ye, Fan Ye, Guojie Luo, Yizhou Wang, Kaigui Bian, Tao Wang, Xiaoming Li
2016	—	`conf`	Scaling Up Physical Design: Challenges and Opportunities. ISPD Guojie Luo, Wentai Zhang, Jiaxi Zhang, Jason Cong
2016	J	`jnl`	Sextant: Towards Ubiquitous Indoor Localization Service by Photo-Taking of the Environment. IEEE Trans. Mob. Comput. Ruipeng Gao, Yang Tian, Fan Ye, Guojie Luo, Kaigui Bian, Yizhou Wang, Tao Wang, Xiaoming Li
2016	B	`conf`	VeMap: Indoor Road Map Construction via Smartphone-Based Vehicle Tracking. GLOBECOM Ruipeng Gao, Guojie Luo, Fan Ye
2015	—	`conf`	A Fast and Simple Block-Based Approach for Common Path Pessimism Removal in Static Timing Analysis. CAD/Graphics Guojie Luo, Baihong Jin, Wentai Zhang
2015	A	`conf`	Accelerate FPGA Routing with Parallel Recursive Partitioning. ICCAD Minghua Shen, Guojie Luo
2015	—	`conf`	Analytical Clustering Score with Application to Post-Placement Multi-Bit Flip-Flop Merging. ISPD Chang Xu, Peixin Li, Guojie Luo, Yiyu Shi, Iris Hui-Ru Jiang
2015	A	`conf`	FPGA Acceleration for Simultaneous Image Reconstruction and Segmentation based on the Mumford-Shah Regularization (Abstract Only). FPGA Wentai Zhang, Li Shen, Thomas Page, Guojie Luo, Peng Li, Peter Maaß, Ming Jiang, Jason Cong
2015	Misc	`conf`	VeTrack: Real Time Vehicle Tracking in Uninstrumented Indoor Environments. SenSys Mingmin Zhao, Tao Ye, Ruipeng Gao, Fan Ye, Yizhou Wang, Guojie Luo
2014	—	`conf`	Analyzing the impact of heterogeneous blocks on FPGA placement quality. FPT Chang Xu, Wentai Zhang, Guojie Luo
2014	Misc	`conf`	FPGA Acceleration for Simultaneous Medical Image Reconstruction and Segmentation. FCCM Peng Li, Thomas Page, Guojie Luo, Wentai Zhang, Pei Wang, Peng Zhang, Peter Maass, Ming Jiang, Jason Cong
2014	C	`conf`	Rapid design space exploration of two-level unified caches. ISCAS Jingyu Deng, Yun Liang, Guojie Luo, Guangyu Sun
2014	Misc	`conf`	VeLoc: finding your car in the parking lot. SenSys Mingmin Zhao, Ruipeng Gao, Jiaxu Zhu, Tao Ye, Fan Ye, Yizhou Wang, Kaigui Bian, Guojie Luo, Ming Zhang
2013	J	`jnl`	An Analytical Placement Framework for 3-D ICs and Its Extension on Thermal Awareness. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Guojie Luo, Yiyu Shi, Jason Cong
2013	—	`conf`	FF-bond: multi-bit flip-flop bonding at placement. ISPD Chang-Cheng Tsai, Yiyu Shi, Guojie Luo, Iris Hui-Ru Jiang
2013	—	`conf`	Optimizing routability in large-scale mixed-size placement. ASP-DAC Jason Cong, Guojie Luo, Kalliopi Tsota, Bingjun Xiao
2012	A	`conf`	Memory partitioning and scheduling co-optimization in behavioral synthesis. ICCAD Peng Li, Yuxin Wang, Peng Zhang, Guojie Luo, Tao Wang, Jason Cong
2012	—	`conf`	Towards layout-friendly high-level synthesis. ISPD Jason Cong, Bin Liu, Guojie Luo, Raghu Prabhakar
2011	C	`conf`	A unified optimization framework for simultaneous gate sizing and placement under density constraints. ISCAS Jason Cong, John Lee, Guojie Luo
2011	A	`conf`	Early chip planning cockpit. DATE Jeonghee Shin, John A. Darringer, Guojie Luo, Alan J. Weger, Charles L. Johnson
2011	—	`conf`	Floorplanning challenges in early chip planning. SoCC Jeonghee Shin, John A. Darringer, Guojie Luo, Merav Aharoni, Alexey Lvov, Gi-Joon Nam, Michael B. Healy
2011	—	`conf`	Physical hierarchy exploration of 3D processors. ISOCC Guojie Luo
2011	A*	`conf`	Thermal-aware cell and through-silicon-via co-placement for 3D ICs. DAC Jason Cong, Guojie Luo, Yiyu Shi
2010	J	`jnl`	Advances and Challenges in 3D Physical Design. Inf. Media Technol. Jason Cong, Guojie Luo
2010	J	`jnl`	Advances and Challenges in 3D Physical Design. IPSJ Trans. Syst. LSI Des. Methodol. Jason Cong, Guojie Luo
2010	—	`conf`	An analytical placer for mixed-size 3D placement. ISPD Jason Cong, Guojie Luo
2010	—	`conf`	Logic-on-logic 3D integration and placement. 3DIC Thorlindur Thorolfsson, Guojie Luo, Jason Cong, Paul D. Franzon
2009	—	`conf`	A multilevel analytical placement for 3D ICs. ASP-DAC Jason Cong, Guojie Luo
2008	J	`jnl`	Highly Efficient Gradient Computation for Density-Constrained Analytical Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jason Cong, Guojie Luo, Eric Radke
2008	—	`conf`	Highly efficient gradient computation for density-constrained analytical placement methods. ISPD Jason Cong, Guojie Luo
2007	—	`conf`	Thermal-Aware 3D IC Placement Via Transformation. ASP-DAC Jason Cong, Guojie Luo, Jie Wei, Yan Zhang