Guanwen Zhong

12 papers A* 1A 1C 3Journal 5Unranked 2
YearRankTypeTitle / Venue / Authors
2025 — conf
Sparse Collectives: Exploiting Data Sparsity to Improve Communication Efficiency.
NAIC
Dhananjaya Wijerathne, Haris Javaid, Guanwen Zhong, Dan Wu, Xing Yuan Kom, Mario Baldi
2023 J jnl
A Primer on RecoNIC: RDMA-enabled Compute Offloading on SmartNIC.
CoRR
Guanwen Zhong, Aditya Kolekar, Burin Amornpaisannon, Inho Choi, Haris Javaid, Mario Baldi
2019 — conf
FastProxy: Hardware and Software Acceleration of Stratum Mining Proxy.
CVCBT
Guanwen Zhong, Haris Javaid, Hassaan Saadat, Lingchao Xu, Chengchen Hu, Gordon J. Brebner
2019 J jnl
Synergy: An HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC.
ACM Trans. Embed. Comput. Syst.
Guanwen Zhong, Akshat Dubey, Cheng Tan, Tulika Mitra
2018 J jnl
Synergy: A HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC.
CoRR
Guanwen Zhong, Akshat Dubey, Cheng Tan, Tulika Mitra
2017 C conf
A Rapid Data Communication Exploration Tool for Hybrid CPU-FPGA Architectures.
PDP
Mariem Makni, Smaïl Niar, Mouna Baklouti, Guanwen Zhong, Tulika Mitra, Mohamed Abid
2017 J jnl
CGPredict: Embedded GPU Performance Estimation from Single-Threaded Applications.
ACM Trans. Embed. Comput. Syst.
Siqi Wang, Guanwen Zhong, Tulika Mitra
2017 A conf
Design Space exploration of FPGA-based accelerators with multi-level parallelism.
DATE
Guanwen Zhong, Alok Prakash, Siqi Wang, Yun Liang, Tulika Mitra, Smaïl Niar
2016 J jnl
Design of Multiple-Target Tracking System on Heterogeneous System-on-Chip Devices.
IEEE Trans. Veh. Technol.
Guanwen Zhong, Smaïl Niar, Alok Prakash, Tulika Mitra
2016 A* conf
Lin-analyzer: a high-level performance analysis tool for FPGA-based accelerators.
DAC
Guanwen Zhong, Alok Prakash, Yun Liang, Tulika Mitra, Smaïl Niar
2014 C conf
Design space exploration of multiple loops on FPGAs using high level synthesis.
ICCD
Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smaïl Niar
2011 C conf
1024-point pipeline FFT processor with pointer FIFOs based on FPGA.
VLSI-SoC
Guanwen Zhong, Hongbin Zheng, ZhenHua Jin, Dihu Chen, Zhiyong Pang