Grzegorz Mrugalski

68 papers A* 3A 15B 9Misc 8Journal 27Unranked 6
YearRankTypeTitle / Venue / Authors
2025 A conf
Automated Selection of Optimal EDT Input Configuration.
ITC
Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer
2025 B conf
Identification of Failing Flip-Flops with Triangular Test Response Compaction.
ETS
Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer
2023 J jnl
X-Masking for Deterministic In-System Tests.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer, Bartosz Wlodarczak
2022 A conf
DIST: Deterministic In-System Test with X-masking.
ITC
Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer, Bartosz Wlodarczak
2022 J jnl
LBIST for Automotive ICs With Enhanced Test Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Bartosz Kaczmarek, Grzegorz Mrugalski, Nilanjan Mukherjee, Artur Pogiel, Janusz Rajski, Lukasz Rybak, Jerzy Tyszer
2022 B conf
X-Masking for In-System Deterministic Test.
ETS
Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer, Bartosz Wlodarczak
2021 J jnl
Autonomous Scan Patterns for Laser Voltage Imaging.
IEEE Trans. Emerg. Top. Comput.
Wu-Tung Cheng, Sylwester Milewski, Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer
2021 J jnl
X-Tolerant Compactor maXpress for In-System Test Applications With Observation Scan.
IEEE Trans. Very Large Scale Integr. Syst.
Yingdi Liu, Sylwester Milewski, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Bartosz Wlodarczak
2020 — conf
Scan Chain Diagnosis-Driven Test Response Compactor.
ATS
Jakub Janicki, Grzegorz Mrugalski, Artur Stelmach, Szczepan Urban
2020 J jnl
Scan Integrity Tests for EDT Compression.
IEEE Des. Test
Wu-Tung Cheng, Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer
2020 B conf
Test Sequence-Optimized BIST for Automotive Applications.
ETS
Bartosz Kaczmarek, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Lukasz Rybak, Jerzy Tyszer
2020 A conf
X-Tolerant Tunable Compactor for In-System Test.
ITC
Yingdi Liu, Sylwester Milewski, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Bartosz Wldarczak
2019 Misc conf
On Cyclic Scan Integrity Tests for EDT-based Compression.
VTS
Wu-Tung Cheng, Grzegorz Mrugalski, Janusz Rajski, Maciej Trawka, Jerzy Tyszer
2017 J jnl
Star-EDT: Deterministic On-Chip Scheme Using Compressed Test Patterns.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Grzegorz Mrugalski, Janusz Rajski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer
2017 J jnl
Trimodal Scan-Based Test Paradigm.
IEEE Trans. Very Large Scale Integr. Syst.
Grzegorz Mrugalski, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Chen Wang
2015 A conf
A deterministic BIST scheme based on EDT-compressed test patterns.
ITC
Grzegorz Mrugalski, Janusz Rajski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer
2015 J jnl
Low-Power Programmable PRPG With Test Compression Capabilities.
IEEE Trans. Very Large Scale Integr. Syst.
Michal Filipek, Grzegorz Mrugalski, Nilanjan Mukherjee, Benoit Nadeau-Dostie, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer
2015 J jnl
Scan Test Bandwidth Management for Ultralarge-Scale System-on-Chip Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Wu-Tung Cheng, Yan Dong, Grady Giles, Yu Huang, Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2015 — conf
TestExpress - New Time-Effective Scan-Based Deterministic Test Paradigm.
ATS
Grzegorz Mrugalski, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer, Chen Wang
2014 J jnl
Erratum to "Test Time Reduction in EDT Bandwidth Management for SoC Designs".
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2014 — conf
High-Speed Serial Embedded Deterministic Test for System-on-Chip Designs.
ATS
Maciej Trawka, Grzegorz Mrugalski, Nilanjan Mukherjee, Artur Pogiel, Janusz Rajski, Jakub Janicki, Jerzy Tyszer
2014 — conf
Low Power Test Compression with Programmable Broadcast-Based Control.
ATS
Sylwester Milewski, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2014 A* conf
On Using Implied Values in EDT-based Test Compression.
DAC
Marcin Gebala, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2013 B conf
New test compression scheme based on low power BIST.
ETS
Jerzy Tyszer, Michal Filipek, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski
2013 J jnl
On Deploying Scan Chains for Data Storage in Test Compression Environment.
IEEE Des. Test
Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2013 J jnl
Test Time Reduction in EDT Bandwidth Management for SoC Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2012 B conf
Bandwidth-aware test compression logic for SoC designs.
ETS
Jakub Janicki, Jerzy Tyszer, Grzegorz Mrugalski, Janusz Rajski
2012 J jnl
EDT Bandwidth Management in SoC Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jakub Janicki, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2012 A conf
Low power programmable PRPG with enhanced fault coverage gradient.
ITC
Jedrzej Solecki, Jerzy Tyszer, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski
2012 Misc conf
Test generator with preselected toggling for low power built-in self-test.
VTS
Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Benoit Nadeau-Dostie
2011 J jnl
Deterministic Clustering of Incompatible Test Cubes for Higher Power-Aware EDT Compression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Przemyslaw Szczerbicki, Jerzy Tyszer
2011 B conf
Diagnosis of Failing Scan Cells through Orthogonal Response Compaction.
ETS
Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer
2011 A conf
EDT channel bandwidth management in SoC designs with pattern-independent test access mechanism.
ITC
Jakub Janicki, Jerzy Tyszer, Avijit Dutta, Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski
2011 — conf
Fault Diagnosis in Memory BIST Environment with Non-march Tests.
Asian Test Symposium
Grzegorz Mrugalski, Artur Pogiel, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Pawel Urbanek
2011 J jnl
Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs.
J. Electron. Test.
Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer
2011 — conf
Low Power Decompressor and PRPG with Constant Value Broadcast.
Asian Test Symposium
Michal Filipek, Yoshiaki Fukui, Hiroyuki Iwata, Grzegorz Mrugalski, Janusz Rajski, Masahiro Takakura, Jerzy Tyszer
2011 B conf
Reduced ATE Interface for High Test Data Compression.
ETS
Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2011 J jnl
Ring Generator: An Ultimate Linear Feedback Shift Register.
Computer
Nilanjan Mukherjee, Janusz Rajski, Grzegorz Mrugalski, Artur Pogiel, Jerzy Tyszer
2010 B conf
Diagnosis of failing scan cells through orthogonal response compaction.
ETS
Brady Benware, Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jedrzej Solecki, Jerzy Tyszer
2010 A conf
Dynamic channel allocation for higher EDT compression in SoC designs.
ITC
Mark Kassab, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jakub Janicki, Jerzy Tyszer
2010 A conf
Low power compression of incompatible test cubes.
ITC
Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Przemyslaw Szczerbicki, Jerzy Tyszer
2010 J jnl
On Compaction Utilizing Inter and Intra-Correlation of Unknown States.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dariusz Czysz, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2009 A conf
Compression based on deterministic vector clustering of incompatible test cubes.
ITC
Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer
2009 Misc conf
Highly X-Tolerant Selective Compaction of Test Responses.
VTS
Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer
2009 J jnl
Low-Power Scan Operation in Test Compression Environment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dariusz Czysz, Mark Kassab, Xijiang Lin, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2008 A conf
Low Power Scan Shift and Capture in the EDT Environment.
ITC
Dariusz Czysz, Mark Kassab, Xijiang Lin, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2008 J jnl
Low-Power Test Data Application in EDT Environment Through Decompressor Freeze.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2008 J jnl
X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng, Nilanjan Mukherjee, Mark Kassab
2007 J jnl
Fault Diagnosis With Convolutional Compactors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jerzy Tyszer
2007 J jnl
Isolation of Failing Scan Cells through Convolutional Test Response Compaction.
J. Electron. Test.
Grzegorz Mrugalski, Janusz Rajski, Chen Wang, Artur Pogiel, Jerzy Tyszer
2007 Misc conf
Low Power Embedded Deterministic Test.
VTS
Dariusz Czysz, Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2007 A* conf
New Test Data Decompressor for Low Power Applications.
DAC
Grzegorz Mrugalski, Janusz Rajski, Dariusz Czysz, Jerzy Tyszer
2007 J jnl
X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis.
IEEE Des. Test Comput.
Jerzy Tyszer, Janusz Rajski, Grzegorz Mrugalski, Nilanjan Mukherjee, Mark Kassab, Wu-Tung Cheng, Manish Sharma, Liyang Lai
2006 J jnl
High Performance Dense Ring Generators.
IEEE Trans. Computers
Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2006 A* conf
Test response compactor with programmable selector.
DAC
Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2006 A conf
X-Press Compactor for 1000x Reduction of Test Data.
ITC
Janusz Rajski, Jerzy Tyszer, Grzegorz Mrugalski, Wu-Tung Cheng, Nilanjan Mukherjee, Mark Kassab
2005 B conf
Convolutional compaction-driven diagnosis of scan failures.
ETS
Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jerzy Tyszer, Chen Wang
2005 A conf
Diagnosis with convolutional compactors in presence of unknown states.
ITC
Grzegorz Mrugalski, Artur Pogiel, Janusz Rajski, Jerzy Tyszer
2004 A conf
Fault Diagnosis in Designs with Convolutional Compactors.
ITC
Grzegorz Mrugalski, Chen Wang, Artur Pogiel, Jerzy Tyszer, Janusz Rajski
2004 Misc conf
Planar High Performance Ring Generators.
VTS
Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer
2004 J jnl
Ring generators - new devices for embedded test applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2003 J jnl
2D Test Sequence Generators.
IEEE Des. Test Comput.
Grzegorz Mrugalski, Jerzy Tyszer, Janusz Rajski
2003 Misc conf
High Speed Ring Generators and Compactors of Test Data.
VTS
Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2002 A conf
Embedded Deterministic Test for Low-Cost Manufacturing Test.
ITC
Janusz Rajski, Jerzy Tyszer, Mark Kassab, Nilanjan Mukherjee, Rob Thompson, Kun-Han Tsai, Andre Hertwig, Nagesh Tamarapalli, Grzegorz Mrugalski, Geir Eide, Jun Qian
2000 J jnl
Cellular automata-based test pattern generators with phase shifters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Grzegorz Mrugalski, Janusz Rajski, Jerzy Tyszer
2000 Misc conf
Linear Independence as Evaluation Criterion for Two-Dimensional Test Pattern Generators.
VTS
Grzegorz Mrugalski, Jerzy Tyszer, Janusz Rajski
1999 Misc conf
Comparative Study of CA-based PRPGs and LFSRs with Phase Shifters.
VTS
Janusz Rajski, Grzegorz Mrugalski, Jerzy Tyszer
1999 A conf
Synthesis of pattern generators based on cellular automata with phase shifters.
ITC
Grzegorz Mrugalski, Jerzy Tyszer, Janusz Rajski