Grzegorz Borowik

26 papers C 7Journal 8Unranked 9
YearRankTypeTitle / Venue / Authors
2023 J jnl
Evaluation of machine learning methods for impostor detection in web applications.
Expert Syst. Appl.
Maciej Grzenda, Stanislaw Kazmierczak, Marcin Luckner, Grzegorz Borowik, Jacek Mandziuk
2023 J jnl
Improved Mesh Processing using Distorted Pole Spherical Coordinates.
CoRR
Grzegorz Borowik, Michal Balicki, Michal Kasprzak, Piotr Cukier
2023 J jnl
On computing the symplectic LL
Numer. Algorithms
Maksymilian Bujok, Alicja Smoktunowicz, Grzegorz Borowik
2022 J jnl
On computing the symplectic LL
CoRR
Maksymilian Bujok, Alicja Smoktunowicz, Grzegorz Borowik
2022 — conf
Reference Datasets for Analysis of Traditional Japanese and German Martial Arts.
EUROCAST
Konrad Kluwak, Ryszard Klempous, Atsushi Ito, Tomasz Górski, Jan Nikodem, Konrad Wojciechowski, Jerzy W. Rozenblit, Grzegorz Borowik, Zenon Chaczko, Wojciech Bozejko, Marek Kulbacki
2021 — conf
Assistive IoT-centric Robotics for Senior Living.
ITHET
Zenon Chaczko, Christopher Chiu, Grzegorz Borowik, Robin Braun
2020 — conf
Comparison of algorithms for dimensionality reduction and their application to index generation functions.
SoSE
Grzegorz Borowik, Tadeusz Luba, Ryszard Klempous
2018 J jnl
Optimization on the Complementation Procedure Towards Efficient Implementation of the Index Generation Function.
Int. J. Appl. Math. Comput. Sci.
Grzegorz Borowik
2016 J jnl
A First Attempt to Cloud-Based User Verification in Distributed System.
CoRR
Marcin Wozniak, Dawid Polap, Grzegorz Borowik, Christian Napoli
2015 — ed.
Computational Intelligence and Efficiency in Engineering Systems
Computational Intelligence and Efficiency in Engineering Systems
Grzegorz Borowik, Zenon Chaczko, Witold Jacak, Tadeusz Luba
2015 J jnl
Embedded Damage Localization Subsystem Based on Elastic Wave Propagation.
Comput. Aided Civ. Infrastructure Eng.
Tomasz Wandowski, Pawel Malinowski, Wieslaw Ostachowicz, Mariusz Rawski, Pawel Tomaszewicz, Tadeusz Luba, Grzegorz Borowik
2015 — ch.
Technique for Transformation of DL Knowledge Base to Boolean Representation.
Computational Intelligence and Efficiency in Engineering Systems
Grzegorz Borowik, Dariusz Nogalski
2014 C conf
Rule Induction Based on Logic Synthesis Methods.
ICSEng
Grzegorz Borowik, Andrzej Krasniewski, Tadeusz Luba
2014 C conf
Simulating Active Interference Cancellation in Cognitive Radio.
ICSEng
Zenon Chaczko, Grzegorz Borowik, Philip Hsieh
2013 — conf
Boolean Function Complementation Based Algorithm for Data Discretization.
EUROCAST (2)
Grzegorz Borowik
2013 — conf
Control System Design Based on Modern Embedded Systems.
EUROCAST (2)
Ahmed Khamis, Dawid Zydek, Grzegorz Borowik, D. Subbaram Naidu
2011 C conf
A Tool for Trading-Off On-Line Error Detection Efficiency with Implementation Cost for Sequential Logic Implemented in FPGAs.
ICSEng
Grzegorz Borowik, Andrzej Krasniewski
2011 J jnl
Energy characteristic of a processor allocator and a network-on-chip.
Int. J. Appl. Math. Comput. Sci.
Dawid Zydek, Henry Selvaraj, Grzegorz Borowik, Tadeusz Luba
2011 C conf
Hardware Accelerator for Generating Primitive Polynomials over GF(3).
ICSEng
Grzegorz Borowik, Andrzej Paszkiewicz
2011 — conf
Method of Generating Irreducible Polynomials over GF(3) on the Basis of Trinomials.
EUROCAST (2)
Grzegorz Borowik, Andrzej Paszkiewicz
2011 — conf
On Memory Capacity to Implement Logic Functions.
EUROCAST (2)
Grzegorz Borowik, Tadeusz Luba, Pawel Tomaszewicz
2011 C conf
Reduction of Knowledge Representation Using Logic Minimization Techniques.
ICSEng
Grzegorz Borowik, Tadeusz Luba, Dawid Zydek
2011 — conf
Trading-Off Error Detection Efficiency with Implementation Cost for Sequential Circuits Implemented with FPGAs.
EUROCAST (2)
Grzegorz Borowik, Andrzej Krasniewski
2009 — conf
Decomposing Pattern Matching Circuit.
EUROCAST
Grzegorz Borowik, Tadeusz Luba
2009 C conf
Logic synthesis method for pattern matching circuits implementation in FPGA with embedded memories.
DDECS
Grzegorz Borowik, Tadeusz Luba, Bogdan J. Falkowski
2007 C conf
Cost-Efficient Synthesis for Sequential Circuits Implemented Using Embedded Memory Blocks of FPGAs.
DDECS
Grzegorz Borowik, Bogdan J. Falkowski, Tadeusz Luba