Greg M. Link - RankMe

21 papers A 5C 1Misc 2Journal 5Unranked 8

Year	Rank	Type	Title / Venue / Authors
2011	J	`jnl`	Teaching embedded systems using AVR microcontrollers: tutorial presentation. J. Comput. Sci. Coll. David Hovemeyer, Greg M. Link
2009	J	`jnl`	Design of Thermally Robust Clock Trees Using Dynamically Adaptive Clock Buffers. IEEE Trans. Circuits Syst. I Regul. Pap. Tamer Ragheb, Andrew J. Ricketts, Mosin Mondal, Sami Kirolos, Greg M. Link, Vijaykrishnan Narayanan, Yehia Massoud
2007	J	`jnl`	Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip CoRR Greg M. Link, Narayanan Vijaykrishnan
2007	A	`conf`	Load Miss Prediction - Exploiting Power Performance Trade-offs. IPDPS Konrad Malkowski, Greg M. Link, Padma Raghavan, Mary Jane Irwin
2007	—	`conf`	Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers. ISQED Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud
2007	A	`conf`	Thermally robust clocking schemes for 3D integrated circuits. DATE Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud
2006	—	`conf`	Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	A	`conf`	Poster reception - Energy/performance modeling for collective communication in 3-D torus cluster networks. SC S. Conner, Greg M. Link, S. Tobita, Mary Jane Irwin, Padma Raghavan
2006	—	`conf`	Thermal Trends in Emerging Technologies. ISQED Greg M. Link, Narayanan Vijaykrishnan
2005	J	`jnl`	A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. IEEE Trans. Computers Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das
2005	—	`conf`	FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection. ASP-DAC John Conner, Yuan Xie, Mahmut T. Kandemir, Robert P. Dick, Greg M. Link
2005	A	`conf`	Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip. DATE Greg M. Link, Narayanan Vijaykrishnan
2005	Misc	`conf`	Implementing LDPC Decoding on Network-on-Chip. VLSI Design Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	J	`jnl`	Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. Adv. Comput. Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	—	`conf`	Resource-Driven Optimizations for Transient-Fault Detecting SuperScalar Microarchitectures. Asia-Pacific Computer Systems Architecture Conference Jie S. Hu, Greg M. Link, Johnsy K. John, Shuai Wang, Sotirios G. Ziavras
2005	C	`conf`	Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. ICCD Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner
2004	—	`conf`	A generic reconfigurable neural network architecture as a network on chip. SoCC Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Vamsi Srikantam
2004	Misc	`conf`	Embedded Hardware Face Detection. VLSI Design Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2004	—	`conf`	Evaluating Alternative Implementations for LDPC Decoder Check Node Function. ISVLSI Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit
2004	—	`conf`	Fault Tolerant Algorithms for Network-On-Chip Interconnect. ISVLSI Matthew Pirretti, Greg M. Link, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003	A	`conf`	Energy optimization techniques in cluster interconnects. ISLPED Eun Jung Kim, Ki Hwan Yum, Greg M. Link, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mazin S. Yousif, Chita R. Das