Graham Schelle

12 papers A* 2A 3B 3Misc 1Journal 1Unranked 2

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	NPUEval: Optimizing NPU Kernels with LLMs and Open Source Compilers. CoRR Sarunas Kalade, Graham Schelle
2016	—	`conf`	Keynote 1 - Growing the ReConFig community through python, zynq and hardware overlays. ReConFig Graham Schelle
2010	A	`conf`	Intel nehalem processor core made FPGA synthesizable. FPGA Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang
2008	—	`conf`	An intelligent physical layer for cognitive radio networks. WICON Aveek Dutta, Jeff Fifield, Graham Schelle, Dirk Grunwald, Douglas C. Sicker
2008	B	`conf`	Exploring FPGA network on chip implementations across various application and network loads. FPL Graham Schelle, Dirk Grunwald
2007	B	`conf`	A Software Defined Radio Application Utilizing Modern FPGAs and NoC Interconnects. FPL Graham Schelle, Jeff Fifield, Dirk Grunwald
2007	Misc	`conf`	Abstracting Modern FCCMs To Provide a Single Interface to Architectural Resources. FCCM Graham Schelle, Dirk Grunwald
2006	A*	`conf`	Exploiting parallelism and structure to accelerate the simulation of chip multi-processors. HPCA David A. Penry, Daniel Fay, David Hodgdon, Ryan Wells, Graham Schelle, David I. August, Dan Connors
2005	A	`conf`	CUSP: a modular framework for high speed network applications on FPGAs. FPGA Graham Schelle, Dirk Grunwald
2004	B	`conf`	Automated Speculation and Parallelism in High Performance Network Applications. FPL Graham Schelle, Dirk Grunwald
2004	A*	`conf`	Mapping a domain specific language to a platform FPGA. DAC Chidamber Kulkarni, Gordon J. Brebner, Graham Schelle
2003	A	`conf`	Privacy-Aware Location Sensor Networks. HotOS Marco Gruteser, Graham Schelle, Ashish Jain, Richard Han, Dirk Grunwald