Gopal Raut

33 papers C 1Misc 2Journal 21Unranked 9
YearRankTypeTitle / Venue / Authors
2026 J jnl
Adaptive-precision SIMD architecture for high-throughput and resource-efficient DNN acceleration.
Integr.
Vasundhara Trivedi, Harman Singh Bagga, Gopal Raut, Santosh Kumar Vishvakarma
2026 J jnl
C-SIMD: CORDIC-Driven SIMD Processing Element for Resource-Efficient Multi-Precision Deep Learning Inference.
IEEE Access
Vasundhara Trivedi, Gopal Raut, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar
2026 Misc conf
Design and Analysis of Fused SIM(S)D Functional Units for RISC-V P-and-B Extensions Instructions.
VLSID
Nancy Gupta, David Selvakumar, Gopal Raut, Pranose J. Edavoor
2025 J jnl
CORDIC Is All You Need.
CoRR
Omkar Kokane, Adam Teman, Anushka Jha, Guru Prasath SL, Gopal Raut, Mukul Lokhande, S. V. Jaya Chand, Tanushree Dewangan, Santosh Kumar Vishvakarma
2025 J jnl
Flex-PE: Flexible and SIMD Multiprecision Processing Element for AI Workloads.
IEEE Trans. Very Large Scale Integr. Syst.
Mukul Lokhande, Gopal Raut, Santosh Kumar Vishvakarma
2025 C conf
LPRE: Logarithmic Posit-enabled Reconfigurable edge-AI Engine.
ISCAS
Omkar Kokane, Mukul Lokhande, Gopal Raut, Adam Teman, Santosh Kumar Vishvakarma
2025 — conf
Retrospective: A CORDIC Based Configurable Activation Function for NN Applications.
ISVLSI
Omkar Kokane, Gopal Raut, Salim Ullah, Mukul Lokhande, Adam Teman, Akash Kumar, Santosh Kumar Vishvakarma
2025 J jnl
Retrospective: A CORDIC Based Configurable Activation Function for NN Applications.
CoRR
Omkar Kokane, Gopal Raut, Salim Ullah, Mukul Lokhande, Adam Teman, Akash Kumar, Santosh Kumar Vishvakarma
2024 J jnl
A Precision-Aware Neuron Engine for DNN Accelerators.
SN Comput. Sci.
Sudheer Vishwakarma, Gopal Raut, Sonu Jaiswal, Santosh Kumar Vishvakarma, Dhruva Ghai
2024 — conf
A SIMD Dynamic Fixed Point Processing Engine for DNN Accelerators.
ISQED
Gopal Raut, Pranose J. Edavoor, David Selvakumar, Ritambhara Thakur
2024 J jnl
Flex-PE: Flexible and SIMD Multi-Precision Processing Element for AI Workloads.
CoRR
Mukul Lokhande, Gopal Raut, Santosh Kumar Vishvakarma
2024 J jnl
HYDRA: Hybrid Data Multiplexing and Run-time Layer Configurable DNN Accelerator.
CoRR
Sonu Kumar, Komal Gupta, Gopal Raut, Mukul Lokhande, Santosh Kumar Vishvakarma
2024 J jnl
In-Memory Computing with 6T SRAM for Multi-operator Logic Design.
Circuits Syst. Signal Process.
Narendra Singh Dhakad, Eshika Chittora, Gopal Raut, Vishal Sharma, Santosh Kumar Vishvakarma
2024 J jnl
QuantMAC: Enhancing Hardware Performance in DNNs With Quantize Enabled Multiply-Accumulate Unit.
IEEE Access
Neha Ashar, Gopal Raut, Vasundhara Trivedi, Santosh Kumar Vishvakarma, Akash Kumar
2023 — conf
A Configurable Activation Function for Variable Bit-Precision DNN Hardware Accelerators.
IFIPIoT (1)
Sudheer Vishwakarma, Gopal Raut, Narendra Singh Dhakad, Santosh Kumar Vishvakarma, Dhruva Ghai
2023 J jnl
An Empirical Approach to Enhance Performance for Scalable CORDIC-Based Deep Neural Networks.
ACM Trans. Reconfigurable Technol. Syst.
Gopal Raut, Saurabh Karkun, Santosh Kumar Vishvakarma
2023 J jnl
An Empirical Evaluation of Enhanced Performance Softmax Function in Deep Learning.
IEEE Access
Sumiran Mehra, Gopal Raut, Ribhu Das Purkayastha, Santosh Kumar Vishvakarma, Anton Biasizzo
2023 Misc conf
Design and Analysis of Posit Quire Processing Engine for Neural Network Applications.
VLSID
Pranose J. Edavoor, Aneesh Raveendran, David Selvakumar, Vivian Desalphine, Shankar G. Dharani, Gopal Raut
2023 J jnl
Designing a Performance-Centric MAC Unit with Pipelined Architecture for DNN Accelerators.
Circuits Syst. Signal Process.
Gopal Raut, Jogesh Mukala, Vishal Sharma, Santosh Kumar Vishvakarma
2023 J jnl
Hybrid ADDer: A Viable Solution for Efficient Design of MAC in DNNs.
Circuits Syst. Signal Process.
Vasundhara Trivedi, Khushbu Lalwani, Gopal Raut, Avikshit Khomane, Neha Ashar, Santosh Kumar Vishvakarma
2022 J jnl
An accurate and noninvasive skin cancer screening based on imaging technique.
Int. J. Imaging Syst. Technol.
Gunjan Rajput, Shashank Agrawal, Gopal Raut, Santosh Kumar Vishvakarma
2022 J jnl
BitMAC: Bit-Serial Computation-Based Efficient Multiply-Accumulate Unit for DNN Accelerator.
Circuits Syst. Signal Process.
Harsh Chhajed, Gopal Raut, Narendra Singh Dhakad, Sudheer Vishwakarma, Santosh Kumar Vishvakarma
2022 J jnl
Data multiplexed and hardware reused architecture for deep neural network accelerator.
Neurocomputing
Gopal Raut, Anton Biasizzo, Narendra Singh Dhakad, Neha Gupta, Gregor Papa, Santosh Kumar Vishvakarma
2022 — conf
Loading Effect Free MOS-only Voltage Reference Ladder for ADC in RRAM-crossbar Array.
ACM Great Lakes Symposium on VLSI
Varun Bhatnagar, Gopal Raut, Santosh Kumar Vishvakarma
2022 — conf
SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture.
ISVLSI
Nikhil Rangarajan, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Shubham Rai, Gopal Raut, Heba Abunahla, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar, Johann Knechtel, Ozgur Sinanoglu
2021 J jnl
Correction to "RECON: Resource-Efficient CORDIC-Based Neuron Architecture".
IEEE Open J. Circuits Syst.
Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar
2021 J jnl
RECON: Resource-Efficient CORDIC-Based Neuron Architecture.
IEEE Open J. Circuits Syst.
Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar
2021 J jnl
VLSI implementation of transcendental function hyperbolic tangent for deep neural network accelerators.
Microprocess. Microsystems
Gunjan Rajput, Gopal Raut, Mahesh Chandra, Santosh Kumar Vishvakarma
2020 J jnl
A 2.4-GS/s Power-Efficient, High-Resolution Reconfigurable Dynamic Comparator for ADC Architecture.
Circuits Syst. Signal Process.
Gopal Raut, Ambika Prasad Shah, Vishal Sharma, Gunjan Rajput, Santosh Kumar Vishvakarma
2020 — conf
A CORDIC Based Configurable Activation Function for ANN Applications.
ISVLSI
Gopal Raut, Shubham Rai, Santosh Kumar Vishvakarma, Akash Kumar
2019 — conf
An Ultra Low Power AES Architecture for IoT.
VDAT
Sajid Khan, Neha Gupta, Gopal Raut, Gunjan Rajput, Jai Gopal Pandey, Santosh Kumar Vishvakarma
2019 — conf
Compact Spiking Neural Network System with SiGe Based Cylindrical Tunneling Transistor for Low Power Applications.
VDAT
Ankur Beohar, Gopal Raut, Gunjan Rajput, Abhinav Vishwakarma, Ambika Prasad Shah, Bhupendra Singh Reniwal, Santosh Kumar Vishvakarma
2019 — conf
Efficient Low-Precision CORDIC Algorithm for Hardware Implementation of Artificial Neural Network.
VDAT
Gopal Raut, Vishal Bhartiy, Gunjan Rajput, Sajid Khan, Ankur Beohar, Santosh Kumar Vishvakarma