Giuseppe Maria Sarda

15 papers A* 2A 1B 1Journal 9Unranked 2

Year	Rank	Type	Title / Venue / Authors
2025	A*	`conf`	Cooperative Warp Execution in Tensor Core for RISC-V GPGPU. HPCA Abubakr Nada, Giuseppe Maria Sarda, Erwan Lenormand
2025	J	`jnl`	Decoupled Control Flow and Data Access in RISC-V GPGPUs. CoRR Giuseppe Maria Sarda, Nimish Shah, Abubakr Nada, Debjyoti Bhattacharjee, Marian Verhelst
2025	J	`jnl`	MATCH: Model-Aware TVM-Based Compilation for Heterogeneous Edge Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohamed Amine Hamdi, Francesco Daghero, Giuseppe Maria Sarda, Josse Van Delm, Arne Symons, Luca Benini, Marian Verhelst, Daniele Jahier Pagliari, Alessio Burrello
2024	J	`jnl`	HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms. CoRR Josse Van Delm, Maarten Vandersteegen, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti, Daniele Jahier Pagliari, Luca Benini, Marian Verhelst
2024	J	`jnl`	MATCH: Model-Aware TVM-based Compilation for Heterogeneous Edge Devices. CoRR Mohamed Amine Hamdi, Francesco Daghero, Giuseppe Maria Sarda, Josse Van Delm, Arne Symons, Luca Benini, Marian Verhelst, Daniele Jahier Pagliari, Alessio Burrello
2024	J	`jnl`	Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. CoRR Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
2023	J	`jnl`	AIMC Modeling and Parameter Tuning for Layer-Wise Optimal Operating Point in DNN Inference. IEEE Access Iman Dadras, Giuseppe Maria Sarda, Nathan Laubeuf, Debjyoti Bhattacharjee, Arindam Mallik
2023	J	`jnl`	DIANA: An End-to-End Hybrid DIgital and ANAlog Neural Network SoC for the Edge. IEEE J. Solid State Circuits Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Kodai Ueyoshi, Ioannis A. Papistas, Man Shi, Qilin Zheng, Debjyoti Bhattacharjee, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst
2023	A*	`conf`	HTVM: Efficient Neural Network Deployment On Heterogeneous TinyML Platforms. DAC Josse Van Delm, Maarten Vandersteegen, Alessio Burrello, Giuseppe Maria Sarda, Francesco Conti, Daniele Jahier Pagliari, Luca Benini, Marian Verhelst
2023	—	`conf`	Optimising GPGPU Execution Through Runtime Micro-Architecture Parameter Analysis. IISWC Giuseppe Maria Sarda, Nimish Shah, Debjyoti Bhattacharjee, Peter Debacker, Marian Verhelst
2023	A	`conf`	Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference. ISLPED Matteo Risso, Alessio Burrello, Giuseppe Maria Sarda, Luca Benini, Enrico Macii, Massimo Poncino, Marian Verhelst, Daniele Jahier Pagliari
2023	J	`jnl`	Precision-aware Latency and Energy Balancing on Multi-Accelerator Platforms for DNN Inference. CoRR Matteo Risso, Alessio Burrello, Giuseppe Maria Sarda, Luca Benini, Enrico Macii, Massimo Poncino, Marian Verhelst, Daniele Jahier Pagliari
2022	B	`conf`	CoNLoCNN: Exploiting Correlation and Non-Uniform Quantization for Energy-Efficient Low-precision Deep Convolutional Neural Networks. IJCNN Muhammad Abdullah Hanif, Giuseppe Maria Sarda, Alberto Marchisio, Guido Masera, Maurizio Martina, Muhammad Shafique
2022	J	`jnl`	CoNLoCNN: Exploiting Correlation and Non-Uniform Quantization for Energy-Efficient Low-precision Deep Convolutional Neural Networks. CoRR Muhammad Abdullah Hanif, Giuseppe Maria Sarda, Alberto Marchisio, Guido Masera, Maurizio Martina, Muhammad Shafique
2022	—	`conf`	DIANA: An End-to-End Energy-Efficient Digital and ANAlog Hybrid Neural Network SoC. ISSCC Kodai Ueyoshi, Ioannis A. Papistas, Pouya Houshmand, Giuseppe Maria Sarda, Vikram Jain, Man Shi, Qilin Zheng, Juan Sebastian Piedrahita Giraldo, Peter Vrancx, Jonas Doevenspeck, Debjyoti Bhattacharjee, Stefan Cosemans, Arindam Mallik, Peter Debacker, Diederik Verkest, Marian Verhelst