Giuseppe Cocorullo

47 papers A 1B 1C 3Journal 24Unranked 18

Year	Rank	Type	Title / Venue / Authors
2022	J	`jnl`	Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes. Sensors Fabio Frustaci, Fanny Spagnolo, Stefania Perri, Giuseppe Cocorullo, Pasquale Corsonello
2021	—	`conf`	Junction Temperature Measurement in Optically-Controlled Power Mosfet. PHOTOPTICS Sandro Rao, Elisa Demetra Mallemace, Giuseppe Cocorullo, Lakhdar Dehimi, Francesco Giuseppe Della Corte
2019	J	`jnl`	Multimodal background subtraction for high-performance embedded systems. J. Real Time Image Process. Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Lorena-de-los-Angeles Guachi-Guachi, Stefania Perri
2018	—	`conf`	A Smart Torque Control for a High Efficiency 4WD Electric Vehicle. ApplePies Antonio Cordopatri, Giuseppe Cocorullo
2017	J	`jnl`	Design of Efficient BCD Adders in Quantum-Dot Cellular Automata. IEEE Trans. Circuits Syst. II Express Briefs Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2016	J	`jnl`	An efficient hardware-oriented stereo matching algorithm. Microprocess. Microsystems Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2016	J	`jnl`	Design of efficient QCA multiplexers. Int. J. Circuit Theory Appl. Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2014	—	`conf`	A novel background subtraction method based on color invariants and grayscale levels. ICCST Lorena Guachi, Giuseppe Cocorullo, Pasquale Corsonello, Fabio Frustaci, Stefania Perri
2014	J	`jnl`	Area-Delay Efficient Binary Adders in QCA. IEEE Trans. Very Large Scale Integr. Syst. Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo
2013	J	`jnl`	Adaptive Census Transform: A novel hardware-oriented stereovision algorithm. Comput. Vis. Image Underst. Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo
2012	J	`jnl`	Design approach for high-bandwidth low-power three-stage operational amplifiers. Int. J. Circuit Theory Appl. Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo
2012	J	`jnl`	Low-cost FPGA stereo vision system for real time disparity maps calculation. Microprocess. Microsystems Paolo Zicari, Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo
2010	J	`jnl`	Analysis of op-amp phase margin impact on SC SigmaDelta modulator performance. Microelectron. J. Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo
2010	J	`jnl`	Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo
2010	J	`jnl`	Corrections to "Settling Time Optimization for Three-Stage CMOS Amplifier Topologies" [Dec 09 2569-2582]. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo
2009	C	`conf`	Effect of OP-amp Phase Margin on SC SigmaDelta Modulator Performances. ISCAS Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo
2009	J	`jnl`	Settling Time Optimization for Three-Stage CMOS Amplifier Topologies. IEEE Trans. Circuits Syst. I Regul. Pap. Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo
2008	—	`conf`	A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation. PATMOS Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo
2008	J	`jnl`	A matrix product accelerator for field programmable systems on chip. Microprocess. Microsystems Paolo Zicari, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo
2008	J	`jnl`	Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo
2008	J	`jnl`	High-performance noise-tolerant circuit techniques for CMOS dynamic logic. IET Circuits Devices Syst. Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo
2008	—	`conf`	Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers. PATMOS Andrea Pugliese, Francesco A. Amoroso, Gregorio Cappuccino, Giuseppe Cocorullo
2007	C	`conf`	Design and Implementation of a 90nm Low bit-rate Image Compression Core. DSD Pasquale Corsonello, Stefania Perri, Giovanni Staino, Marco Lanuzza, Giuseppe Cocorullo
2007	—	`conf`	Design methodology of nested-Miller amplifiers for small capacitive loads. ECCTD Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo
2007	—	`conf`	Settling Time Minimization of Operational Amplifiers. PATMOS Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo
2006	—	`conf`	A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique. PATMOS Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo
2006	—	`conf`	Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications. PATMOS Andrea Pugliese, Gregorio Cappuccino, Giuseppe Cocorullo
2006	C	`conf`	Leakage energy reduction techniques in deep submicron cache memories: a comparative study. ISCAS Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo
2006	J	`jnl`	Low bit rate image compression core for onboard space applications. IEEE Trans. Circuits Syst. Video Technol. Pasquale Corsonello, Stefania Perri, Giovanni Staino, Marco Lanuzza, Giuseppe Cocorullo
2006	J	`jnl`	Techniques for Leakage Energy Reduction in Deep Submicrometer Cache Memories. IEEE Trans. Very Large Scale Integr. Syst. Fabio Frustaci, Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo
2005	J	`jnl`	A high-performance fully reconfigurable FPGA-based 2D convolution processor. Microprocess. Microsystems Stefania Perri, Marco Lanuzza, Pasquale Corsonello, Giuseppe Cocorullo
2005	—	`conf`	Fast Low-Power 64-Bit Modular Hybrid Adder. PATMOS Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo
2005	J	`jnl`	Microprocessor-based FPGA implementation of SPIHT image compression subsystems. Microprocess. Microsystems Pasquale Corsonello, Stefania Perri, Paolo Zicari, Giuseppe Cocorullo
2005	—	`conf`	Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation. PATMOS Gregorio Cappuccino, Andrea Pugliese, Giuseppe Cocorullo
2004	J	`jnl`	Variable precision arithmetic circuits for FPGA-based multimedia processors. IEEE Trans. Very Large Scale Integr. Syst. Stefania Perri, Pasquale Corsonello, Maria Antonia Iachino, Marco Lanuzza, Giuseppe Cocorullo
2003	J	`jnl`	A high-speed energy-efficient 64-bit reconfigurable binary adder. IEEE Trans. Very Large Scale Integr. Syst. Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo
2003	B	`conf`	Variable Precision Multipliers for FPGA-Based Reconfigurable Computing Systems. FPL Pasquale Corsonello, Stefania Perri, Maria Antonia Iachino, Giuseppe Cocorullo
2002	—	`conf`	Operating Region Modelling and Timing Analysis of CMOS Gates Driving Transmission Lines. PATMOS Gregorio Cappuccino, Giuseppe Cocorullo
2002	J	`jnl`	VLSI circuits for low-power high-speed asynchronous addition. IEEE Trans. Very Large Scale Integr. Syst. Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo
2001	A	`conf`	CMOS sizing rule for high performance long interconnects. DATE Gregorio Cappuccino, Giuseppe Cocorullo
2001	—	`conf`	Dynamic power of CMOS gates driving lossy transmission lines. ICECS Gregorio Cappuccino, Pasquale Corsonello, Giuseppe Cocorullo, Stefania Perri, Giovanni Staino
2001	—	`conf`	VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. ICECS Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo, Gregorio Cappuccino, Giovanni Staino
2000	—	`conf`	Designing High-Speed Asynchronous Pipelines. EUROMICRO Stefania Perri, Pasquale Corsonello, Giuseppe Cocorullo
2000	—	`conf`	VLSI Implementation of a Low-Power High-Speed Self-Timed Adder. PATMOS Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo
1999	—	`conf`	A 56-bit self-timed adder for high speed asynchronous datapath. ICECS Pasquale Corsonello, Stefania Perri, Giuseppe Cocorullo
1999	—	`conf`	A Time-Domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines. EUROMICRO Gregorio Cappuccino, Giuseppe Cocorullo
1998	J	`jnl`	High performance VLSI modules for division and square root. Microprocess. Microsystems Gregorio Cappuccino, Pasquale Corsonello, Giuseppe Cocorullo