Giuseppe Alia - RankMe

19 papers A* 1Journal 15Unranked 3

Year	Rank	Type	Title / Venue / Authors
2011	J	`jnl`	A high performance ROM-based structure for modular exponentiation. Comput. Electr. Eng. Giuseppe Alia, Enrico Martinelli
2005	J	`jnl`	NEUROM: a ROM based RNS digital neuron. Neural Networks Giuseppe Alia, Enrico Martinelli
2002	J	`jnl`	Fast modular exponentiation of large numbers with large exponents. J. Syst. Archit. Giuseppe Alia, Enrico Martinelli
1998	J	`jnl`	Logic Design of a Fast Circuit for Iterative Additions in Redundant Hybrid. Comput. J. Giuseppe Alia, Enrico Martinelli
1998	J	`jnl`	Sign detection in residue arithmetic units. J. Syst. Archit. Giuseppe Alia, Enrico Martinelli
1993	J	`jnl`	On the Lower Bound to the VLSI Complexity of Number Conversion from Weighted to Residue Representation. IEEE Trans. Computers Giuseppe Alia, Enrico Martinelli
1991	J	`jnl`	A VLSI Modulo m Multiplier. IEEE Trans. Computers Giuseppe Alia, Enrico Martinelli
1990	J	`jnl`	A VLSI structure for J. VLSI Signal Process. Giuseppe Alia, Enrico Martinelli
1990	J	`jnl`	VLSI Binary-Residue Converters for Pipelined Processing. Comput. J. Giuseppe Alia, Enrico Martinelli
1986	J	`jnl`	Fast hardware graphic generators of curve families. Comput. Graph. Giuseppe Alia, Enrico Martinelli, N. Tani
1985	—	`conf`	Table Look-up Graphic Interpolation. Eurographics Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli, N. Tani
1984	J	`jnl`	A Fast VLSI Conversion Between Binary and Residue Systems. Inf. Process. Lett. Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli
1984	J	`jnl`	A fast near optimum VLSI implementation of FFT using residue number systems. Integr. Giuseppe Alia, Ferruccio Barsi, Enrico Martinelli
1984	—	`conf`	An Approach to the Design of Hardware Curve Generators for Graphic Displays. Eurographics Giuseppe Alia, Enrico Martinelli, N. Tani
1983	J	`jnl`	VLSI systolic arrays for band matrix multiplication. Integr. Giuseppe Alia
1982	J	`jnl`	On switching network functionalities and their relationships. Int. J. Parallel Program. Giuseppe Alia, Enrico Martinelli
1978	A*	`conf`	LSI components modelling in a three-valued functional simulation. DAC Giuseppe Alia, P. Ciompi, Enrico Martinelli, F. Bernardini
1974	—	`conf`	An approach to optimal partitioning of hypergraphs. ACM Annual Conference (1) Giuseppe Alia, Piero Maestrini
1973	J	`jnl`	Automated module placement and wire routeing according to a structured biplanar scheme in printed boards. Comput. Aided Des. Giuseppe Alia, Graziano Frosini, Piero Maestrini