Giulio Gambardella

46 papers A 6B 6C 4Journal 18Unranked 11

Year	Rank	Type	Title / Venue / Authors
2025	B	`conf`	On the Fault Sensitivity of Natural Language Embeddings Computation. ETS Sumeet Sapkal, Ussama Zahid, Giulio Gambardella, Haralampos-G. Stratigopoulos, Brian Clerkin
2023	J	`jnl`	Fault-Tolerant Neural Network Accelerators With Selective TMR. IEEE Des. Test Timoteo García Bertoa, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, John McAllister
2023	J	`jnl`	On the RTL Implementation of FINN Matrix Vector Unit. ACM Trans. Embed. Comput. Syst. Syed Asad Alam, David Gregg, Giulio Gambardella, Thomas B. Preußer, Michaela Blott
2022	J	`jnl`	On the RTL Implementation of FINN Matrix Vector Compute Unit. CoRR Syed Asad Alam, David Gregg, Giulio Gambardella, Michael Preußer, Michaela Blott
2021	J	`jnl`	Evaluation of Optimized CNNs on Heterogeneous Accelerators Using a Novel Benchmarking Approach. IEEE Trans. Computers Michaela Blott, Nicholas J. Fraser, Giulio Gambardella, Lisa Halder, Johannes Kath, Zachary Neveu, Yaman Umuroglu, Alina Vasilciuc, Miriam Leeser, Linda Doyle
2020	A	`conf`	Evaluation of Optimized CNNs on FPGA and non-FPGA based Accelerators using a Novel Benchmarking Approach. FPGA Michaela Blott, Johannes Kath, Lisa Halder, Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Miriam Leeser, Linda Doyle
2020	A	`conf`	FAT: Training Neural Networks for Reliable Inference Under Hardware Faults. ITC Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Kees A. Vissers
2020	J	`jnl`	FAT: Training Neural Networks for Reliable Inference Under Hardware Faults. CoRR Ussama Zahid, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Kees A. Vissers
2019	—	`conf`	Efficient Error-Tolerant Quantized Neural Network Accelerators. DFT Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, Martin Kumm, Peter Zipf, Kees A. Vissers
2019	J	`jnl`	Efficient Error-Tolerant Quantized Neural Network Accelerators. CoRR Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, Martin Kumm, Peter Zipf, Kees A. Vissers
2019	A	`conf`	Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. FPGA Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer
2018	—	`conf`	Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic. ARC Jiang Su, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Gianluca Durelli, David B. Thomas, Philip Heng Wai Leong, Peter Y. K. Cheung
2018	J	`jnl`	Accuracy to Throughput Trade-offs for Reduced Precision Neural Networks on Reconfigurable Logic. CoRR Jiang Su, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Gianluca Durelli, David B. Thomas, Philip Heng Wai Leong, Peter Y. K. Cheung
2018	B	`conf`	Customizing Low-Precision Deep Neural Networks for FPGAs. FPL Julian Faraone, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott, Philip H. W. Leong, David Boland
2018	J	`jnl`	FINN- ACM Trans. Reconfigurable Technol. Syst. Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser, Kees A. Vissers
2018	B	`conf`	FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. FPL Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott
2018	J	`jnl`	FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs. CoRR Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott
2018	J	`jnl`	FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks. CoRR Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu
2018	J	`jnl`	Inference of Quantized Neural Networks on Heterogeneous All-Programmable Devices. CoRR Thomas B. Preußer, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott
2018	A	`conf`	Inference of quantized neural networks on heterogeneous all-programmable devices. DATE Thomas B. Preußer, Giulio Gambardella, Nicholas J. Fraser, Michaela Blott
2018	J	`jnl`	Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. CoRR Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser
2018	J	`jnl`	Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. CoRR Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer
2017	—	`conf`	Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks. ICONIP (2) Julian Faraone, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong
2017	J	`jnl`	Compressing Low Precision Deep Neural Networks Using Sparsity-Induced Regularization in Ternary Networks. CoRR Julian Faraone, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong
2017	A	`conf`	FINN: A Framework for Fast, Scalable Binarized Neural Network Inference. FPGA Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers
2017	—	`conf`	Scaling Binarized Neural Networks on Reconfigurable Logic. PARMA-DITAM@HiPEAC Nicholas J. Fraser, Yaman Umuroglu, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers
2017	J	`jnl`	Scaling Binarized Neural Networks on Reconfigurable Logic. CoRR Nicholas J. Fraser, Yaman Umuroglu, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers
2017	C	`conf`	Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic. ICCD Michaela Blott, Thomas B. Preußer, Nicholas J. Fraser, Giulio Gambardella, Kenneth O'Brien, Yaman Umuroglu, Miriam Leeser
2016	J	`jnl`	FINN: A Framework for Fast, Scalable Binarized Neural Network Inference. CoRR Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers
2015	J	`jnl`	SA-FEMIP: A Self-Adaptive Features Extractor and Matcher IP-Core Based on Partially Reconfigurable FPGAs for Space Applications. IEEE Trans. Very Large Scale Integr. Syst. Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2015	J	`jnl`	SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs. ACM Trans. Reconfigurable Technol. Syst. Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2014	—	`conf`	A cloud-based Cyber-Physical System for environmental monitoring. MECO Teodora Sanislav, George Dan Mois, Silviu Folea, Liviu Miclea, Giulio Gambardella, Paolo Prinetto
2014	C	`conf`	A novel methodology to increase fault tolerance in autonomous FPGA-based systems. IOLTS Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alessandro Vallero
2014	—	`—`	Dynamic partial reconfiguration for dependable systems. Giulio Gambardella
2014	C	`conf`	On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems. DSD Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Frank Reichenbach, Trond Løkstad, Gulzaib Rafiq
2013	B	`conf`	A software-based self test of CUDA Fermi GPUs. ETS Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013	B	`conf`	Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS. FPL Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013	B	`conf`	FEMIP: A high performance FPGA-based features extractor & matcher for space applications. FPL Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Piergiorgio Lanza
2013	A	`conf`	Fault mitigation strategies for CUDA GPUs. ITC Stefano Di Carlo, Giulio Gambardella, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013	C	`conf`	Increasing the robustness of CUDA Fermi GPU-based systems. IOLTS Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Ippazio Martella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013	—	`conf`	SAFE: A self adaptive frame enhancer FPGA-based IP-core for real-time space applications. IDT Stefano Di Carlo, Giulio Gambardella, Piergiorgio Lanza, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2013	—	`conf`	ZipStream: Improving dependability in dynamic partial reconfiguration. IDT Stefano Di Carlo, Giulio Gambardella, Trong Huynh Bao, Paolo Prinetto, Daniele Rolfo, Pascal Trotta
2011	—	`conf`	A unifying formalism to support automated synthesis of SBSTs for embedded caches. EWDTS Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto
2011	—	`conf`	An area-efficient 2-D convolution implementation on FPGA for space applications. IDT Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Gabriele Tiotto, Paolo Prinetto
2011	—	`conf`	MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches. Asian Test Symposium Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto
2011	—	`conf`	Validation & Verification of an EDA automated synthesis tool. IDT Stefano Di Carlo, Giulio Gambardella, Marco Indaco, Daniele Rolfo, Paolo Prinetto