Girish Venkataramani

21 papers A* 4A 3B 1Misc 5Journal 2Unranked 6
YearRankTypeTitle / Venue / Authors
2014 Misc conf
System-Level Retiming and Pipelining.
FCCM
Girish Venkataramani, Yongfeng Gu
2013 A conf
Model-based hardware design.
ICCAD
Girish Venkataramani, Kiran Kintali, Sudeepa Prakash, Stephan van Beek
2009 — conf
Tuning SoCs using the global dynamic critical path.
SoCC
Hari Kannan, Mihai Budiu, John D. Davis, Girish Venkataramani
2008 Misc conf
Comprehensive isomorphic subtree enumeration.
CASES
Partha Biswas, Girish Venkataramani
2008 — conf
Heterogeneous Latch-Based Asynchronous Pipelines.
ASYNC
Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein
2008 Misc conf
Slack analysis in the system design loop.
CODES+ISSS
Girish Venkataramani, Seth Copen Goldstein
2007 — conf
Area Optimizations for Dual-Rail Circuits Using Relative-Timing Analysis.
ASYNC
Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein
2007 A* conf
Global Critical Path: A Tool for System-Level Timing Analysis.
DAC
Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea, Seth Copen Goldstein
2007 A conf
Operation chaining asynchronous pipelined circuits.
ICCAD
Girish Venkataramani, Seth Copen Goldstein
2007 A* conf
Self-Resetting Latches for Asynchronous Micro-Pipelines.
DAC
Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein
2006 J jnl
Hardware compilation of application-specific memory-access interconnect.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Girish Venkataramani, Tobias Bjerregaard, Tiberiu Chelcea, Seth Copen Goldstein
2006 — conf
Interface Design for Rationally Clocked GALS Systems.
ASYNC
Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma, Girish Venkataramani, P. S. Thiagarajan
2006 A conf
Leveraging protocol knowledge in slack matching.
ICCAD
Girish Venkataramani, Seth Copen Goldstein
2006 A* conf
Tartan: evaluating spatial computation for whole program execution.
ASPLOS
Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein, Mihai Budiu
2005 Misc conf
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs.
CODES+ISSS
Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein, Tobias Bjerregaard
2004 — conf
Programmer specified pointer independence.
Memory System Performance
David Koes, Mihai Budiu, Girish Venkataramani
2004 A* conf
Spatial computation.
ASPLOS
Mihai Budiu, Girish Venkataramani, Tiberiu Chelcea, Seth Copen Goldstein
2003 J jnl
Automatic compilation to a coarse-grained reconfigurable system-opn-chip.
ACM Trans. Embed. Comput. Syst.
Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm, Jeffrey Hammes
2003 — conf
Reconfigurable Computing and Electronic Nanotechnology.
ASAP
Seth Copen Goldstein, Mihai Budiu, Mahim Mishra, Girish Venkataramani
2002 B conf
Factors Influencing the Performance of a CPU-RFU Hybrid Architecture.
FPL
Girish Venkataramani, Suraj Sudhir, Mihai Budiu, Seth Copen Goldstein
2001 Misc conf
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture.
CASES
Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm