Girish Varatkar

18 papers A* 2A 2C 1Misc 1Journal 6Unranked 5
YearRankTypeTitle / Venue / Authors
2025 — conf
ResMoE: Space-efficient Compression of Mixture of Experts LLMs via Residual Restoration.
KDD (1)
Mengting Ai, Tianxin Wei, Yifan Chen, Zhichen Zeng, Ritchie Zhao, Girish Varatkar, Bita Darvish Rouhani, Xianfeng Tang, Hanghang Tong, Jingrui He
2025 J jnl
ResMoE: Space-efficient Compression of Mixture of Experts LLMs via Residual Restoration.
CoRR
Mengting Ai, Tianxin Wei, Yifan Chen, Zhichen Zeng, Ritchie Zhao, Girish Varatkar, Bita Darvish Rouhani, Xianfeng Tang, Hanghang Tong, Jingrui He
2023 J jnl
Shared Microexponents: A Little Shifting Goes a Long Way.
CoRR
Bita Rouhani, Ritchie Zhao, Venmugil Elango, Rasoul Shafipour, Mathew Hall, Maral Mesmakhosroshahi, Ankit More, Levi Melnick, Maximilian Golub, Girish Varatkar, Lei Shao, Gaurav Kolhe, Dimitry Melts, Jasmine Klar, Renee L'Heureux, Matt Perry, Doug Burger, Eric S. Chung, Zhaoxia Deng, Sam Naghshineh, Jongsoo Park, Maxim Naumov
2023 A* conf
With Shared Microexponents, A Little Shifting Goes a Long Way.
ISCA
Bita Darvish Rouhani, Ritchie Zhao, Venmugil Elango, Rasoul Shafipour, Mathew Hall, Maral Mesmakhosroshahi, Ankit More, Levi Melnick, Maximilian Golub, Girish Varatkar, Lai Shao, Gaurav Kolhe, Dimitry Melts, Jasmine Klar, Renee L'Heureux, Matt Perry, Doug Burger, Eric S. Chung, Zhaoxia (Summer) Deng, Sam Naghshineh, Jongsoo Park, Maxim Naumov
2010 J jnl
Computation as estimation: a general framework for robustness and energy efficiency in SoCs.
IEEE Trans. Signal Process.
Sriram Narayanan, Girish Varatkar, Douglas L. Jones, Naresh R. Shanbhag
2010 J jnl
Stochastic Networked Computation.
IEEE Trans. Very Large Scale Integr. Syst.
Girish Varatkar, Shrikanth S. Narayanan, Naresh R. Shanbhag, Douglas L. Jones
2008 Misc conf
Computation as estimation: Estimation-theoretic IC design improves robustness and reduces power consumption.
ICASSP
Shrikanth S. Narayanan, Girish Varatkar, Douglas L. Jones, Naresh R. Shanbhag
2008 — —
Energy-Efficient and Error-Tolerant Digital Design
Girish Varatkar
2008 J jnl
Error-Resilient Motion Estimation Architecture.
IEEE Trans. Very Large Scale Integr. Syst.
Girish Varatkar, Naresh R. Shanbhag
2008 — conf
Trends in energy-efficiency and robustness using stochastic sensor network-on-a-chip.
ACM Great Lakes Symposium on VLSI
Girish Varatkar, Sriram Narayanan, Naresh R. Shanbhag, Douglas L. Jones
2008 C conf
Variation-tolerant, low-power PN-code acquisition using stochastic sensor NOC.
ISCAS
Girish Varatkar, Sriram Narayanan, Naresh R. Shanbhag, Douglas L. Jones
2007 — conf
Sensor Network-On-Chip.
SoC
Girish Varatkar, Sriram Narayanan, Naresh R. Shanbhag, Douglas L. Jones
2007 — conf
Variation-Tolerant Motion Estimation Architecture.
SiPS
Girish Varatkar, Naresh R. Shanbhag
2006 A conf
Energy-efficient motion estimation using error-tolerance.
ISLPED
Girish Varatkar, Naresh R. Shanbhag
2004 J jnl
On-chip traffic modeling and synthesis for MPEG-2 video applications.
IEEE Trans. Very Large Scale Integr. Syst.
Girish Varatkar, Radu Marculescu
2003 A conf
Communication-Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization.
ICCAD
Girish Varatkar, Radu Marculescu
2002 — conf
On-chip communication analysis for multimedia applications.
ICME (2)
Girish Varatkar, Radu Marculescu
2002 A* conf
Traffic analysis for on-chip networks design of multimedia applications.
DAC
Girish Varatkar, Radu Marculescu