Giovanni De Micheli

682 papers A* 47A 126B 14C 56Misc 6Journal 224Unranked 196

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Faster Homomorphic Operations and Beyond: Expediting Homomorphic Computation via Boolean Circuit Optimization. J. Cryptol. Mingfei Yu, Giovanni De Micheli
2026	J	`jnl`	Scalable Sequential Logic Synthesis Using Observability Don't Care Conditions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dewmini Sudara Marakkalage, Eleonora Testa, Giulia Meuli, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
2025	—	`conf`	Area-Oriented Optimization After Standard-Cell Mapping. ASP-DAC Andrea Costamagna, Alessandro Tempia Calvino, Alan Mishchenko, Giovanni De Micheli
2025	J	`jnl`	Area-Oriented Resubstitution For Networks of Look-Up Tables. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andrea Costamagna, Alessandro Tempia Calvino, Alan Mishchenko, Giovanni De Micheli
2025	—	`conf`	Back-end-aware Fault-tolerant Quantum Oracle Synthesis. ASP-DAC Mingfei Yu, Alessandro Tempia Calvino, Mathias Soeken, Giovanni De Micheli
2025	J	`jnl`	Benchmarking of Scaled Majority-Logic-Synthesized Spintronic Circuits Based on Magnetic Tunnel Junction Transducers. IEEE Trans. Circuits Syst. I Regul. Pap. Fanfan Meng, Siang-Yun Lee, Odysseas Zografos, Mohit Gupta, Van D. Nguyen, Giovanni De Micheli, Sorin Cotofana, Inge Asselberghs, Christoph Adelmann, Gouri Sankar Kar, Sebastien Couet, Florin Ciubotaru
2025	J	`jnl`	Cut Tracing with E-Graphs for Boolean FHE Circuit Synthesis. CoRR Julien de Castelnau, Mingfei Yu, Giovanni De Micheli
2025	J	`jnl`	Efficient Resubstitution-Based Approximate Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Chang Meng, Alan Mishchenko, Weikang Qian, Giovanni De Micheli
2025	J	`jnl`	Enhancing Delay-Driven LUT Mapping With Boolean Decomposition. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Alessandro Tempia Calvino, Giovanni De Micheli, Alan Mishchenko, Robert K. Brayton
2025	A	`conf`	Gradient Approximation of Approximate Multipliers for High-Accuracy Deep Neural Network Retraining. DATE Chang Meng, Wayne P. Burleson, Weikang Qian, Giovanni De Micheli
2025	J	`jnl`	Gradient Estimation Methods of Approximate Multipliers for High-Accuracy Retraining of Deep Learning Models. CoRR Chang Meng, Wayne P. Burleson, Giovanni De Micheli
2025	C	`conf`	Lazy Man's Resynthesis For Glitching-Aware Power Minimization. DDECS Andrea Costamagna, Xiaoqing Xu, Giovanni De Micheli, Dino Ruic
2025	A	`conf`	Making the Best Switch: Encoding Strategy Management for Efficient TFHE Circuit Evaluation. ICCAD Mingfei Yu, Gabrielle De Micheli, Giovanni De Micheli
2025	—	`conf`	SPFD-Based Delay Resynthesis. SMACD Andrea Costamagna, Chang Meng, Giovanni De Micheli
2025	J	`jnl`	Simulation-Guided Approximate Logic Synthesis Under the Maximum Error Constraint. CoRR Chang Meng, Weikang Qian, Giovanni De Micheli
2025	Misc	`conf`	Symmetry-Based Synthesis for Interpretable Boolean Evaluation. VLSID Andrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli
2025	J	`jnl`	Technology Legalization and Optimization for Adiabatic Quantum-Flux Parametron. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Siang-Yun Lee, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli
2025	J	`jnl`	The Council on Electronic Design Automation: Creation, Growth, and Future. IEEE Des. Test Giovanni De Micheli
2024	B	`conf`	Algebraic and Boolean Methods for SFQ Superconducting Circuits. ASPDAC Alessandro Tempia Calvino, Giovanni De Micheli
2024	C	`conf`	An Enhanced Resubstitution Algorithm for Area-Oriented Logic Optimization. ISCAS Andrea Costamagna, Alan Mishchenko, Satrajit Chatterjee, Giovanni De Micheli
2024	J	`jnl`	Expediting Homomorphic Computation via Multiplicative Complexity-aware Multiplicative Depth Minimization. IACR Cryptol. ePrint Arch. Mingfei Yu, Giovanni De Micheli
2024	J	`jnl`	Fanout-Bounded Logic Synthesis for Emerging Technologies. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dewmini Sudara Marakkalage, Giovanni De Micheli
2024	B	`conf`	In Medio Stat Virtus*: Combining Boolean and Pattern Matching. ASPDAC Gianluca Radi, Alessandro Tempia Calvino, Giovanni De Micheli
2024	A*	`conf`	Late Breaking Results: Majority-Inverter Graph Minimization by Design Space Exploration. DAC Siang-Yun Lee, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli
2024	—	`conf`	On the Synthesis of High-performance Homomorphic Boolean Circuits. WAHC@CCS Mingfei Yu, Sergiu Carpov, Alessandro Tempia Calvino, Giovanni De Micheli
2024	J	`jnl`	Practical Boolean Decomposition for Delay-driven LUT Mapping. CoRR Alessandro Tempia Calvino, Alan Mishchenko, Giovanni De Micheli, Robert K. Brayton
2024	A	`conf`	Quantum State Preparation Using an Exact CNOT Synthesis Formulation. DATE Hanyu Wang, Jason Cong, Giovanni De Micheli
2024	J	`jnl`	Quantum State Preparation Using an Exact CNOT Synthesis Formulation. CoRR Hanyu Wang, Bochen Tan, Jason Cong, Giovanni De Micheli
2024	A	`conf`	RareLS: Rarity-Reducing Logic Synthesis for Mitigating Hardware Trojan Threats. ICCAD Chang Meng, Mingfei Yu, Hanyu Wang, Wayne P. Burleson, Giovanni De Micheli
2024	A	`conf`	Scalable Logic Rewriting Using Don't Cares. DATE Alessandro Tempia Calvino, Giovanni De Micheli
2024	A	`conf`	Scalable Sequential Optimization Under Observability Don't Cares. DATE Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
2024	A	`conf`	Technology-Aware Logic Synthesis for Superconducting Electronics. DATE Rassul Bairamkulov, Siang-Yun Lee, Alessandro Tempia Calvino, Dewmini Sudara Marakkalage, Mingfei Yu, Giovanni De Micheli
2024	B	`conf`	Towards Multiphase Clocking in Single-Flux Quantum Systems. ASPDAC Rassul Bairamkulov, Giovanni De Micheli
2024	J	`jnl`	Towards Multiphase Clocking in Single-Flux Quantum Systems. CoRR Rassul Bairamkulov, Giovanni De Micheli
2024	A	`conf`	Unleashing the Power of T1-Cells in SFQ Arithmetic Circuits. DATE Rassul Bairamkulov, Mingfei Yu, Giovanni De Micheli
2024	A*	`conf`	Unleashing the Power of T1-cells in SFQ Arithmetic Circuits. DAC Rassul Bairamkulov, Mingfei Yu, Giovanni De Micheli
2024	J	`jnl`	Unleashing the Power of T1-cells in SFQ Arithmetic Circuits. CoRR Rassul Bairamkulov, Mingfei Yu, Giovanni De Micheli
2024	A	`conf`	VACSEM: Verifying Average Errors in Approximate Circuits Using Simulation-Enhanced Model Counting. DATE Chang Meng, Hanyu Wang, Yuqi Mai, Weikang Qian, Giovanni De Micheli
2023	J	`jnl`	Accuracy recovery: A decomposition procedure for the synthesis of partially-specified Boolean functions. Integr. Andrea Costamagna, Giovanni De Micheli
2023	J	`jnl`	AnySyn: A Cost-Generic Logic Synthesis Framework with Customizable Cost Functions. CoRR Hanyu Wang, Siang-Yun Lee, Giovanni De Micheli
2023	—	`conf`	Compound Logic Gates for Pipeline Depth Minimization in Single Flux Quantum Integrated Systems. ACM Great Lakes Symposium on VLSI Rassul Bairamkulov, Giovanni De Micheli
2023	—	`conf`	Cyclical Progress in Design and Technology. ICTA Giovanni De Micheli
2023	—	`conf`	Depth-Optimal Buffer and Splitter Insertion and Optimization in AQFP Circuits. ASP-DAC Alessandro Tempia Calvino, Giovanni De Micheli
2023	A	`conf`	Fanout-Bounded Logic Synthesis for Emerging Technologies - A Top-Down Approach. DATE Dewmini Sudara Marakkalage, Giovanni De Micheli
2023	J	`jnl`	Garbled Circuits Reimagined: Logic Synthesis Unleashes Efficient Secure Computation. Cryptogr. Mingfei Yu, Dewmini Sudara Marakkalage, Giovanni De Micheli
2023	—	`conf`	Generating Lower-Cost Garbled Circuits: Logic Synthesis Can Help. HOST Mingfei Yu, Giovanni De Micheli
2023	J	`jnl`	Heuristic Logic Resynthesis Algorithms at the Core of Peephole Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Siang-Yun Lee, Giovanni De Micheli
2023	A*	`conf`	Improving Standard-Cell Design Flow using Factored Form Optimization. DAC Alessandro Tempia Calvino, Alan Mishchenko, Herman Schmit, Ethan Mahintorabi, Giovanni De Micheli, Xiaoqing Xu
2023	—	`conf`	Logic Synthesis for Emerging Technologies. ASICON Giovanni De Micheli
2023	J	`jnl`	Scalable Sequential Optimization Under Observability Don't Cares. CoRR Dewmini Sudara Marakkalage, Eleonora Testa, Walter Lau Neto, Alan Mishchenko, Giovanni De Micheli, Luca G. Amarù
2023	J	`jnl`	Strange Loops in Design and Technology: 59th DAC Keynote Speech. IEEE Des. Test Giovanni De Micheli
2023	A	`conf`	Striving for Both Quality and Speed: Logic Synthesis for Practical Garbled Circuits. ICCAD Mingfei Yu, Giovanni De Micheli
2023	C	`conf`	Synthesis of SFQ Circuits with Compound Gates. VLSI-SoC Rassul Bairamkulov, Alessandro Tempia Calvino, Giovanni De Micheli
2023	—	`conf`	Synthesis of SFQ Circuits with Compound Gates. VLSI-SoC (Selected Papers) Rassul Bairamkulov, Alessandro Tempia Calvino, Giovanni De Micheli
2023	A	`conf`	Technology Mapping Using Multi-Output Library Cells. ICCAD Alessandro Tempia Calvino, Giovanni De Micheli
2023	J	`jnl`	Utilizing XMG-Based Synthesis to Preserve Self-Duality for RFET-Based Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Shubham Rai, Alessandro Tempia Calvino, Heinz Riener, Giovanni De Micheli, Akash Kumar
2022	J	`jnl`	A Simulation-Guided Paradigm for Logic Synthesis and Verification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Siang-Yun Lee, Heinz Riener, Alan Mishchenko, Robert K. Brayton, Giovanni De Micheli
2022	—	`conf`	A Versatile Mapping Approach for Technology Mapping and Graph Optimization. ASP-DAC Alessandro Tempia Calvino, Heinz Riener, Shubham Rai, Akash Kumar, Giovanni De Micheli
2022	J	`jnl`	Advances in Quantum Computation and Quantum Technologies: A Design Automation Perspective. IEEE J. Emerg. Sel. Topics Circuits Syst. Giovanni De Micheli, Jie-Hong R. Jiang, Robert Rand, Kaitlin N. Smith, Mathias Soeken
2022	J	`jnl`	An Automated Testing and Debugging Toolkit for Gate-Level Logic Synthesis Applications. CoRR Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2022	A*	`conf`	Beyond local optimality of buffer and splitter insertion for AQFP circuits. DAC Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2022	—	`conf`	Boolean Rewriting Strikes Back: Reconvergence-Driven Windowing Meets Resynthesis. ASP-DAC Heinz Riener, Siang-Yun Lee, Alan Mishchenko, Giovanni De Micheli
2022	J	`jnl`	Challenges and targets of MRAM-enabled scaled spintronic logic circuits. CoRR Fanfan Meng, Florin Ciubotaru, S.-Y. Lee, Odysseas Zografos, M. Gupta, Van D. Nguyen, Sebastien Couet, Gouri Sankar Kar, Giovanni De Micheli, Christoph Adelmann, Inge Asselberghs
2022	J	`jnl`	Design and Automation for Quantum Computation and Quantum Technologies. IEEE J. Emerg. Sel. Topics Circuits Syst. Jie-Hong R. Jiang, Giovanni De Micheli, Kaitlin N. Smith, Mathias Soeken
2022	—	`conf`	Design and Optimization of Quantum Electronic Circuits. ISPD Giovanni De Micheli
2022	J	`jnl`	Efficient Deterministic Preparation of Quantum States Using Decision Diagrams. CoRR Fereshte Mozafari, Giovanni De Micheli, Yuxiang Yang
2022	—	`conf`	Efficient Preparation of Cyclic Quantum States. ASP-DAC Fereshte Mozafari, Yuxiang Yang, Giovanni De Micheli
2022	—	`conf`	Logic Synthesis From Incomplete Specifications Using Disjoint Support Decomposition. PRIME Andrea Costamagna, Giovanni De Micheli
2022	A	`conf`	Majority-based Design Flow for AQFP Superconducting Family. DATE Giulia Meuli, Vinicius N. Possani, Rajinder Singh, Siang-Yun Lee, Alessandro Tempia Calvino, Dewmini Sudara Marakkalage, Patrick Vuillod, Luca G. Amarù, Scott Chase, Jamil Kawa, Giovanni De Micheli
2022	A	`conf`	tweedledum: A Compiler Companion for Quantum Computing. DATE Bruno Schmitt, Giovanni De Micheli
2021	—	`conf`	Algebraic and Boolean Optimization Methods for AQFP Superconducting Circuits. ASP-DAC Eleonora Testa, Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2021	A	`conf`	Compilation flow for classically defined quantum operations. DATE Bruno Schmitt, Ali Javadi-Abhari, Giovanni De Micheli
2021	A	`conf`	From Boolean functions to quantum circuits: A scalable quantum compilation flow in C++. DATE Bruno Schmitt, Fereshte Mozafari, Giulia Meuli, Heinz Riener, Giovanni De Micheli
2021	J	`jnl`	Irredundant Buffer and Splitter Insertion and Scheduling-Based Optimization for AQFP Circuits. CoRR Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2021	A*	`conf`	LUT-Based Optimization For ASIC Design Flow. DAC Luca Gaetano Amarù, Vinicius N. Possani, Eleonora Testa, Felipe S. Marranghello, Christopher Casares, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
2021	C	`conf`	Logic Resynthesis of Majority-Based Circuits by Top-Down Decomposition. DDECS Siang-Yun Lee, Heinz Riener, Giovanni De Micheli
2021	J	`jnl`	Multi-Ion-Sensing Emulator and Multivariate Calibration Optimization by Machine Learning Models. IEEE Access Ivan Ny Hanitra, Francesca Criscuolo, Sandro Carrara, Giovanni De Micheli
2021	—	`conf`	Optimizing Adiabatic Quantum-Flux-Parametron (AQFP) Circuits using an Exact Database. NANOARCH Dewmini Sudara Marakkalage, Heinz Riener, Giovanni De Micheli
2021	A	`conf`	Preserving Self-Duality During Logic Synthesis for Emerging Reconfigurable Nanotechnologies. DATE Shubham Rai, Heinz Riener, Giovanni De Micheli, Akash Kumar
2021	J	`jnl`	Real-Time Multi-Ion-Monitoring Front-End With Interference Compensation by Multi-Output Support Vector Regressor. IEEE Trans. Biomed. Circuits Syst. Mandresy Ivan Ny Hanitra, Francesca Criscuolo, Sandro Carrara, Giovanni De Micheli
2021	J	`jnl`	The Emerging Majority: Technology and Design for Superconducting Electronics. IEEE Des. Test Giovanni De Micheli
2021	J	`jnl`	Three-Input Gates for Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dewmini Sudara Marakkalage, Eleonora Testa, Heinz Riener, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli
2020	J	`jnl`	2019 DAC Roundtable. IEEE Des. Test Giovanni De Micheli, Antun Domic, Massimiliano Di Ventra, Martin Roettler, Jason Cong
2020	A	`conf`	A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. DATE Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli
2020	J	`jnl`	A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks. IACR Cryptol. ePrint Arch. Eleonora Testa, Mathias Soeken, Heinz Riener, Luca G. Amarù, Giovanni De Micheli
2020	J	`jnl`	Advanced Functional Decomposition Using Majority and Its Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2020	—	`conf`	Automatic Uniform Quantum State Preparation Using Decision Diagrams. ISMVL Fereshte Mozafari, Mathias Soeken, Heinz Riener, Giovanni De Micheli
2020	C	`conf`	Emulator Design and Generation of Synthetic Dataset in Multi-Ion Sensing. ISCAS Ivan Ny Hanitra, Danilo Demarchi, Sandro Carrara, Giovanni De Micheli
2020	C	`conf`	Enumerating Optimal Quantum Circuits using Spectral Classification. ISCAS Giulia Meuli, Mathias Soeken, Martin Roetteler, Giovanni De Micheli
2020	J	`jnl`	Extending Boolean Methods for Scalable Logic Synthesis. IEEE Access Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2020	A	`conf`	Multiplier Architectures: Challenges and Opportunities with Plasmonic-based Logic : (Special Session Paper). DATE Eleonora Testa, Samantha Lubaba Noor, Odysseas Zografos, Mathias Soeken, Francky Catthoor, Azad Naeemi, Giovanni De Micheli
2020	J	`jnl`	Nonsilicon, Non-von Neumann Computing - Part II. Proc. IEEE Sankar Basu, Randal E. Bryant, Giovanni De Micheli, Thomas N. Theis, Lloyd Whitman
2020	J	`jnl`	SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Winston Haaswijk, Mathias Soeken, Alan Mishchenko, Giovanni De Micheli
2020	A*	`conf`	SAT-Sweeping Enhanced for Logic Synthesis. DAC Luca G. Amarù, Felipe S. Marranghello, Eleonora Testa, Christopher Casares, Vinicius N. Possani, Jiong Luo, Patrick Vuillod, Alan Mishchenko, Giovanni De Micheli
2020	J	`jnl`	Simulation-Guided Boolean Resubstitution. CoRR Siang-Yun Lee, Heinz Riener, Alan Mishchenko, Robert K. Brayton, Giovanni De Micheli
2020	—	`conf`	Symbolic Algorithms for Token Swapping. ISMVL Bruno Schmitt, Mathias Soeken, Giovanni De Micheli
2020	—	`ed.`	VLSI-SoC: New Technology Enabler - 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Carolina Metzler, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Carlos Silva Cárdenas, Ricardo Reis
2019	—	`conf`	AdaptHD: Adaptive Efficient Training for Brain-Inspired Hyperdimensional Computing. BioCAS Mohsen Imani, Justin Morris, Samuel Bosch, Helen Shu, Giovanni De Micheli, Tajana Rosing
2019	—	`conf`	All-solid-state Reference Electrodes for analytical applications. IWASI Francesca Criscuolo, Marco Galfione, Sandro Carrara, Giovanni De Micheli
2019	A	`conf`	Compiling Permutations for Superconducting QPUs. DATE Mathias Soeken, Fereshte Mozafari, Bruno Schmitt, Giovanni De Micheli
2019	J	`jnl`	Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. Giovanni V. Resta, Alessandra Leonhardt, Yashwanth Balaji, Stefan De Gendt, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2019	C	`conf`	Direct and Catalyst-Free Growth of Vertically-Stacked Graphene-Based Structures for Enhanced Drug Sensing. ISCAS Ioulia Tzouvadaki, Nima Aliakbarinodehi, Diana Dávila Pineda, Giovanni De Micheli, Sandro Carrara
2019	C	`conf`	Evaluating ESOP Optimization Methods in Quantum Compilation Flows. RC Giulia Meuli, Bruno Schmitt, Rüdiger Ehlers, Heinz Riener, Giovanni De Micheli
2019	C	`conf`	Exact Synthesis of Boolean Functions in Majority-of-Five Forms. ISCAS Zhufei Chu, Winston Haaswijk, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2019	J	`jnl`	FPGA-SPICE: A Simulation-Based Architecture Evaluation Framework for FPGAs. IEEE Trans. Very Large Scale Integr. Syst. Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2019	J	`jnl`	Fast Procedures for the Electrodeposition of Platinum Nanostructures on Miniaturized Electrodes for Improved Ion Sensing. Sensors Francesca Criscuolo, Irene Taurino, Van Anh Dam, Francky Catthoor, Marcel Zevenbergen, Sandro Carrara, Giovanni De Micheli
2019	—	`conf`	Flexible sweat sensors for non-invasive optimization of lithium dose in psychiatric disorders. IEEE SENSORS Francesca Criscuolo, Filippo Cantù, Irene Taurino, Sandro Carrara, Giovanni De Micheli
2019	J	`jnl`	LUT-Based Hierarchical Reversible Logic Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2019	—	`conf`	Logic Optimization of Majority-Inverter Graphs. MBMV Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken
2019	J	`jnl`	Logic Synthesis for Established and Emerging Computing. Proc. IEEE Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Giovanni De Micheli
2019	J	`jnl`	Mapping Monotone Boolean Functions into Majority. IEEE Trans. Computers Eleonora Testa, Mathias Soeken, Luca Gaetano Amarù, Winston Haaswijk, Giovanni De Micheli
2019	—	`ch.`	Memory Effects in Multi-terminal Solid State Devices and Their Applications. Handbook of Memristor Networks Davide Sacchetto, Pierre-Emmanuel Gaillardon, Yusuf Leblebici, Giovanni De Micheli
2019	—	`conf`	Multi-Target Electrolyte Sensing Front-End for Wearable Physical Monitoring. PRIME Ivan Ny Hanitra, Francesca Criscuolo, Sandro Carrara, Giovanni De Micheli
2019	J	`jnl`	Nonsilicon, Non-von Neumann Computing - Part I [Scanning the Issue]. Proc. IEEE Sankar Basu, Randal E. Bryant, Giovanni De Micheli, Thomas N. Theis, Lloyd Whitman
2019	A	`conf`	On-the-fly and DAG-aware: Rewriting Boolean Networks with Exact Synthesis. DATE Heinz Riener, Winston Haaswijk, Alan Mishchenko, Giovanni De Micheli, Mathias Soeken
2019	J	`jnl`	QubitHD: A Stochastic Acceleration Method for HD Computing-Based Machine Learning. CoRR Samuel Bosch, Alexander Sanchez de la Cerda, Mohsen Imani, Tajana Simunic Rosing, Giovanni De Micheli
2019	—	`conf`	ROS: Resource-constrained Oracle Synthesis for Quantum Computers. QPL Giulia Meuli, Mathias Soeken, Martin Roetteler, Giovanni De Micheli
2019	A*	`conf`	Reducing the Multiplicative Complexity in Logic Networks for Cryptography and Security Applications. DAC Eleonora Testa, Mathias Soeken, Luca G. Amarù, Giovanni De Micheli
2019	—	`conf`	Reversible Pebble Games for Reducing Qubits in Hierarchical Quantum Circuit Synthesis. ISMVL Debjyoti Bhattacharjee, Mathias Soeken, Srijit Dutta, Anupam Chattopadhyay, Giovanni De Micheli
2019	A	`conf`	Reversible Pebbling Game for Quantum Memory Management. DATE Giulia Meuli, Mathias Soeken, Martin Roetteler, Nikolaj S. Bjørner, Giovanni De Micheli
2019	J	`jnl`	Reversible Pebbling Game for Quantum Memory Management. CoRR Giulia Meuli, Mathias Soeken, Martin Roetteler, Nikolaj S. Bjørner, Giovanni De Micheli
2019	A	`conf`	Scalable Boolean Methods in a Modern Synthesis Flow. DATE Eleonora Testa, Luca G. Amarù, Mathias Soeken, Alan Mishchenko, Patrick Vuillod, Jiong Luo, Christopher Casares, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2019	A*	`conf`	Scalable Generic Logic Synthesis: One Approach to Rule Them All. DAC Heinz Riener, Eleonora Testa, Winston Haaswijk, Alan Mishchenko, Luca G. Amarù, Giovanni De Micheli, Mathias Soeken
2019	—	`conf`	Scaling-up ESOP Synthesis for Quantum Compilation. ISMVL Bruno Schmitt, Mathias Soeken, Giovanni De Micheli, Alan Mishchenko
2019	—	`conf`	Structural rewriting in XOR-majority graphs. ASP-DAC Zhufei Chu, Mathias Soeken, Yinshui Xia, Lun-Yao Wang, Giovanni De Micheli
2019	A	`conf`	The Role of Multiplicative Complexity in Compiling Low $T$-count Oracle Circuits. ICCAD Giulia Meuli, Mathias Soeken, Earl T. Campbell, Martin Roetteler, Giovanni De Micheli
2019	J	`jnl`	The Role of Multiplicative Complexity in Compiling Low T-count Oracle Circuits. CoRR Giulia Meuli, Mathias Soeken, Earl T. Campbell, Martin Roetteler, Giovanni De Micheli
2018	—	`conf`	A Flexible Front-End for Wearable Electrochemical Sensing. MeMeA Ivan Ny Hanitra, Lucia Lobello, Francesca Stradolini, Abuduwaili Tuoheti, Francesca Criscuolo, Tugba Kilic, Danilo Demarchi, Sandro Carrara, Giovanni De Micheli
2018	—	`conf`	A best-fit mapping algorithm to facilitate ESOP-decomposition in Clifford+T quantum network synthesis. ASP-DAC Giulia Meuli, Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2018	—	`conf`	A novel electrochemical sensor for non-invasive monitoring of lithium levels in mood disorders. EMBC Francesca Criscuolo, Irene Taurino, Sandro Carrara, Giovanni De Micheli
2018	J	`jnl`	An IoT Solution for Online Monitoring of Anesthetics in Human Serum Based on an Integrated Fluidic Bioelectronic System. IEEE Trans. Biomed. Circuits Syst. Francesca Stradolini, Abuduwaili Tuoheti, Tugba Kilic, Sofia Lydia Ntella, Nadia Tamburrano, Zijian Huang, Giovanni De Micheli, Danilo Demarchi, Sandro Carrara
2018	C	`conf`	Deep Learning for Logic Optimization Algorithms. ISCAS Winston Haaswijk, Edo Collins, Benoit Seguin, Mathias Soeken, Frédéric Kaplan, Sabine Süsstrunk, Giovanni De Micheli
2018	J	`jnl`	Developing Synthesis Flows Without Human Knowledge. CoRR Cunxi Yu, Houping Xiao, Giovanni De Micheli
2018	A*	`conf`	Developing synthesis flows without human knowledge. DAC Cunxi Yu, Houping Xiao, Giovanni De Micheli
2018	—	`conf`	Doping-free complementary inverter enabled by 2D WSe2 electrostatically-doped reconfigurable transistors. DRC Giovanni V. Resta, Yashwanth Balaji, Dennis Lin, Iuliana P. Radu, Francky Catthoor, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2018	—	`conf`	End-to-End Industrial Study of Retiming. ISVLSI Cunxi Yu, Chau-Chin Huang, Gi-Joon Nam, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Maciej J. Ciesielski, Giovanni De Micheli
2018	J	`jnl`	Exact Synthesis of ESOP Forms. CoRR Heinz Riener, Rüdiger Ehlers, Bruno Schmitt, Giovanni De Micheli
2018	—	`conf`	Functional decomposition using majority. ASP-DAC Zhufei Chu, Mathias Soeken, Yinshui Xia, Giovanni De Micheli
2018	—	`conf`	Generating Safety Guidance for Medical Injection with Three-Compartment Pharmacokinetics Model. ISVLSI Cunxi Yu, Heinz Riener, Francesca Stradolini, Giovanni De Micheli
2018	A	`conf`	Improvements to boolean resynthesis. DATE Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Janet Olson, Robert K. Brayton, Giovanni De Micheli
2018	—	`conf`	Integrated ESOP Refactoring for Industrial Designs. ICECS Winston Haaswijk, Luca Gaetano Amarù, Patrick Vuillod, Jiong Luo, Mathias Soeken, Giovanni De Micheli
2018	—	`conf`	Keynote Talk: NoCs: A Short History of Success and a Long Future. NOCS Giovanni De Micheli
2018	A	`conf`	Majority logic synthesis. ICCAD Luca G. Amarù, Eleonora Testa, Miguel Couceiro, Odysseas Zografos, Giovanni De Micheli, Mathias Soeken
2018	—	`conf`	Mixed Gold and Platinum Nanostructured Layers for All-Solid-State Ion Sensors. IEEE SENSORS Francesca Criscuolo, Lucia Lobello, Irene Taurino, Danilo Demarchi, Sandro Carrara, Giovanni De Micheli
2018	J	`jnl`	Pairs of majority-decomposing functions. Inf. Process. Lett. Mathias Soeken, Eleonora Testa, Alan Mishchenko, Giovanni De Micheli
2018	C	`conf`	Portable Memristive Biosensing System as Effective Point-of-Care Device for Cancer Diagnostics. ISCAS Ioulia Tzouvadaki, Abuduwaili Tuoheti, Giovanni De Micheli, Danilo Demarchi, Sandro Carrara
2018	J	`jnl`	Post-P&R Performance and Power Analysis for RRAM-Based FPGAs. IEEE J. Emerg. Sel. Topics Circuits Syst. Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2018	A	`conf`	Practical exact synthesis. DATE Mathias Soeken, Winston Haaswijk, Eleonora Testa, Alan Mishchenko, Luca Gaetano Amarù, Robert K. Brayton, Giovanni De Micheli
2018	A*	`conf`	SAT based exact synthesis using DAG topology families. DAC Winston Haaswijk, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli
2018	C	`conf`	SAT-based {CNOT, T} Quantum Circuit Synthesis. RC Giulia Meuli, Mathias Soeken, Giovanni De Micheli
2018	J	`jnl`	Safe and Efficient Deployment of Data-Parallelizable Applications on Many-Core Platforms: Theory and Practice. IEEE Des. Test Stefanos Skalistis, Federico Angiolini, Giovanni De Micheli, Alena Simalatsar
2018	—	`conf`	Size Optimization of MIGs with an Application to QCA and STMG Technologies. NANOARCH Heinz Riener, Eleonora Testa, Luca G. Amarù, Mathias Soeken, Giovanni De Micheli
2018	J	`jnl`	The EPFL Logic Synthesis Libraries. CoRR Mathias Soeken, Heinz Riener, Winston Haaswijk, Giovanni De Micheli
2018	J	`jnl`	Towards Ultrasound Everywhere: A Portable 3D Digital Back-End Capable of Zone and Compound Imaging. IEEE Trans. Biomed. Circuits Syst. Aya Ibrahim, Shuping Zhang, Federico Angiolini, Marcel Arditi, Shinji Kimura, Satoshi Goto, Jean-Philippe Thiran, Giovanni De Micheli
2018	A	`conf`	Towards high-performance polarity-controllable FETs with 2D materials. DATE Giovanni V. Resta, Jorge Romero Gonzalez, Yashwanth Balaji, Tarun Agarwal, Dennis Lin, Francky Catthoor, Iuliana P. Radu, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017	A	`conf`	1024-Channel 3D ultrasound digital beamformer in a single 5W FPGA. DATE Federico Angiolini, Aya Ibrahim, William Andrew Simon, Ahmet Caner Yuzuguler, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2017	J	`jnl`	A Differential Electrochemical Readout ASIC With Heterogeneous Integration of Bio-Nano Sensors for Amperometric Sensing. IEEE Trans. Biomed. Circuits Syst. Sara S. Ghoreishizadeh, Irene Taurino, Giovanni De Micheli, Sandro Carrara, Pantelis Georgiou
2017	J	`jnl`	A High-Performance FPGA Architecture Using One-Level RRAM-Based Multiplexers. IEEE Trans. Emerg. Top. Comput. Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017	J	`jnl`	A PLiM Computer for the Internet of Things. Computer Mathias Soeken, Pierre-Emmanuel Gaillardon, Saeideh Shirinzadeh, Rolf Drechsler, Giovanni De Micheli
2017	—	`conf`	A novel basis for logic rewriting. ASP-DAC Winston Haaswijk, Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017	C	`conf`	An efficient electronic measurement interface for memristive biosensors. ISCAS Sebastien Naus, Ioulia Tzouvadaki, Pierre-Emmanuel Gaillardon, Armando Biscontini, Giovanni De Micheli, Sandro Carrara
2017	—	`conf`	An electrochemical sensor for quantitative analysis of Rhesus D antibodies in blood. IWASI Francesca Criscuolo, Irene Taurino, Tugba Kilic, Sandro Carrara, Giovanni De Micheli
2017	A	`conf`	Busy man's synthesis: Combinational delay optimization with SAT. DATE Mathias Soeken, Giovanni De Micheli, Alan Mishchenko
2017	J	`jnl`	Circuit Designs of High-Performance and Low-Power RRAM-Based Multiplexers Based on 4T(ransistor)1R(RAM) Programming Structure. IEEE Trans. Circuits Syst. I Regul. Pap. Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017	—	`conf`	Classifying Functions with Exact Synthesis. ISMVL Winston Haaswijk, Eleonora Testa, Mathias Soeken, Giovanni De Micheli
2017	J	`jnl`	Cyber-Medical Systems: Requirements, Components and Design Examples. IEEE Trans. Circuits Syst. I Regul. Pap. Giovanni De Micheli
2017	A	`conf`	Design automation and design space exploration for quantum computers. DATE Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2017	J	`jnl`	Efficient Sample Delay Calculation for 2-D and 3-D Ultrasound Imaging. IEEE Trans. Biomed. Circuits Syst. Aya Ibrahim, Pascal A. Hager, Andrea Bartolini, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Luca Benini, Giovanni De Micheli
2017	A	`conf`	Enabling exact delay synthesis. ICCAD Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli
2017	A	`conf`	Endurance management for resistive Logic-In-Memory computing architectures. DATE Saeideh Shirinzadeh, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Rolf Drechsler
2017	J	`jnl`	Exact Synthesis of Majority-Inverter Graphs and Its Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017	A*	`conf`	Hierarchical Reversible Logic Synthesis Using LUTs. DAC Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2017	—	`conf`	Improving Circuit Mapping Performance Through MIG-based Synthesis for Carry Chains. ACM Great Lakes Symposium on VLSI Zhufei Chu, Xifan Tang, Mathias Soeken, Ana Petkovska, Grace Zgheib, Luca Gaetano Amarù, Yinshui Xia, Paolo Ienne, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017	—	`conf`	Inexpensive 1024-channel 3D telesonography system on FPGA. BioCAS Aya Ibrahim, Damien Doy, Claudio Loureiro, Eliéva Pignat, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2017	—	`conf`	Inverter Propagation and Fan-Out Constraints for Beyond-CMOS Majority-Based Technologies. ISVLSI Eleonora Testa, Odysseas Zografos, Mathias Soeken, Adrien Vaysset, Mauricio Manfrini, Rudy Lauwereins, Giovanni De Micheli
2017	—	`conf`	Live demonstration: An IoT smartwatch-based system for intensive care monitoring. BioCAS Francesca Stradolini, Eleonora Lavalle, Paolo Motto Ros, Giovanni De Micheli, Danilo Demarchi, Sandro Carrara
2017	—	`conf`	Live demonstration: Inexpensive 1024-channel 3D telesonography system on FPGA. BioCAS Aya Ibrahim, Damien Doy, Claudio Loureiro, Eliéva Pignat, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2017	J	`jnl`	Logic Synthesis for Quantum Computing. CoRR Mathias Soeken, Martin Roetteler, Nathan Wiebe, Giovanni De Micheli
2017	—	`conf`	Multi-level logic benchmarks: An exactness study. ASP-DAC Luca Gaetano Amarù, Mathias Soeken, Winston Haaswijk, Eleonora Testa, Patrick Vuillod, Jiong Luo, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017	J	`jnl`	Nano-Tera.ch: Information Technology for Health, Environment, and Energy. IEEE Des. Test Patrick Mayor, Martin Rajman, Giovanni De Micheli
2017	J	`jnl`	Networks on Chips: 15 Years Later. Computer Giovanni De Micheli, Luca Benini
2017	—	`conf`	Optimization opportunities in RRAM-based FPGA architectures. LASCAS Xifan Tang, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017	—	`conf`	Physical Design Considerations of One-level RRAM-based Routing Multiplexers. ISPD Xifan Tang, Edouard Giacomin, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2017	C	`conf`	RM3 based logic synthesis (Special session paper). ISCAS Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2017	—	`conf`	Raspberry Pi driven flow-injection system for electrochemical continuous monitoring platforms. BioCAS Bruno Donato, Francesca Stradolini, Abuduwaili Tuoheti, Federico Angiolini, Danilo Demarchi, Giovanni De Micheli, Sandro Carrara
2017	—	`conf`	Single-FPGA complete 3D and 2D medical ultrasound imager. DASIP Aya Ibrahim, William Andrew Simon, Damien Doy, Eliéva Pignat, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2017	A	`conf`	Wave pipelining for majority-based beyond-CMOS technologies. DATE Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
2016	J	`jnl`	A CMOS Amperometric System for Multi-Neurotransmitter Detection. IEEE Trans. Biomed. Circuits Syst. Genevieve Massicotte, Sandro Carrara, Giovanni De Micheli, Mohamad Sawan
2016	J	`jnl`	A Fault-Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors. ACM J. Emerg. Technol. Comput. Syst. Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli, Ernesto Sánchez, Matteo Sonza Reorda
2016	A	`conf`	A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only). FPGA Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	J	`jnl`	A Sound and Complete Axiomatization of Majority-n Logic. IEEE Trans. Computers Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli
2016	J	`jnl`	A Study on the Programming Structures for RRAM-Based FPGA Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. Xifan Tang, Gain Kim, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	A	`conf`	A power-efficient 3-D on-chip interconnect for multi-core accelerators with stacked L2 cache. DATE Kyungsu Kang, Sangho Park, Jong-Bae Lee, Luca Benini, Giovanni De Micheli
2016	A*	`conf`	An MIG-based compiler for programmable logic-in-memory architectures. DAC Mathias Soeken, Saeideh Shirinzadeh, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Rolf Drechsler, Giovanni De Micheli
2016	C	`conf`	An integrated platform for differential electrochemical and ISFET sensing. ISCAS Sara S. Ghoreishizadeh, Pantelis Georgiou, Sandro Carrara, Giovanni De Micheli
2016	J	`jnl`	Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. Jury Sandrini, Marios Barlas, Maxime Thammasack, Tugba Demirci, Michele De Marchi, Davide Sacchetto, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Yusuf Leblebici
2016	—	`conf`	Demo: Efficient delay and apodization for on-FPGA 3D ultrasound. DASIP Ahmet Caner Yuzuguler, William Andrew Simon, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2016	J	`jnl`	Design Automation and Design Space Exploration for Quantum Computers. CoRR Mathias Soeken, Martin Rötteler, Nathan Wiebe, Giovanni De Micheli
2016	J	`jnl`	Design and analysis of jitter-aware low-power and high-speed TSV link for 3D ICs. Microelectron. J. Giulia Beanato, Kiarash Gharibdoust, Alessandro Cevrero, Giovanni De Micheli, Yusuf Leblebici
2016	J	`jnl`	Efficient Statistical Parameter Selection for Nonlinear Modeling of Process/Performance Variation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	J	`jnl`	Emerging Technology-Based Design of Primitives for Hardware Security. ACM J. Emerg. Technol. Comput. Syst. Yu Bi, Kaveh Shamsi, Jiann-Shiun Yuan, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Xunzhao Yin, Xiaobo Sharon Hu, Michael T. Niemier, Yier Jin
2016	C	`conf`	Enumeration of Reversible Functions and Its Application to Circuit Complexity. RC Mathias Soeken, Nabila Abdessaied, Giovanni De Micheli
2016	A	`conf`	Exploiting inherent characteristics of reversible circuits for faster combinational equivalence checking. DATE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Robert Wille, Giovanni De Micheli
2016	A	`conf`	Fast generation of lexicographic satisfiable assignments: enabling canonicity in SAT-based applications. ICCAD Ana Petkovska, Alan Mishchenko, Mathias Soeken, Giovanni De Micheli, Robert K. Brayton, Paolo Ienne
2016	B	`conf`	Fast hierarchical NPN classification. FPL Ana Petkovska, Mathias Soeken, Giovanni De Micheli, Paolo Ienne, Alan Mishchenko
2016	A	`conf`	Heuristic NPN Classification for Large Functions Using AIGs and LEXSAT. SAT Mathias Soeken, Alan Mishchenko, Ana Petkovska, Baruch Sterin, Paolo Ienne, Robert K. Brayton, Giovanni De Micheli
2016	J	`jnl`	Impact of data serialization over TSVs on routing congestion in 3D-stacked multi-core processors. Microelectron. J. Giulia Beanato, Alessandro Cevrero, Giovanni De Micheli, Yusuf Leblebici
2016	J	`jnl`	In-Vivo Validation of Fully Implantable Multi-Panel Devices for Remote Monitoring of Metabolism. IEEE Trans. Biomed. Circuits Syst. Camilla Baj-Rossi, Andrea Cavallini, Enver G. Kilinc, Francesca Stradolini, Tanja Rezzonico Jost, Michele Proietti, Giovanni De Micheli, Fabio Grassi, Catherine Dehollain, Sandro Carrara
2016	—	`conf`	Inversion optimization in Majority-Inverter Graphs. NANOARCH Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	J	`jnl`	Majority-Inverter Graph: A New Paradigm for Logic Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	—	`conf`	Majority-based synthesis for nanotechnologies. ASP-DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	J	`jnl`	Memristive Biosensors Integration With Microfluidic Platform. IEEE Trans. Circuits Syst. I Regul. Pap. Alessandro Vallero, Ioulia Tzouvadaki, Francesca Puppo, Marie-Agnes Doucey, Jean-François Delaloye, Giovanni De Micheli, Sandro Carrara
2016	—	`conf`	Nano-fabricated memristive biosensors for biomedical applications with liquid and dried samples. EMBC Ioulia Tzouvadaki, Xiaoling Lu, Giovanni De Micheli, Sven Ingebrandt, Sandro Carrara
2016	—	`conf`	Notes on Majority Boolean Algebra. ISMVL Anupam Chattopadhyay, Luca Gaetano Amarù, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	—	`conf`	One-step rapid synthesis of Au-Pt nanofems for electrochemical sensing and biosensing. IEEE SENSORS Irene Taurino, Gabriella Sanzó, Sandro Carrara, Giovanni De Micheli, Gabriele Favero, Franco Mazzei, Riccarda Antiochia
2016	A	`conf`	Optimizing Majority-Inverter Graphs with functional hashing. DATE Mathias Soeken, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	A	`conf`	Panel: Looking backwards and forwards. DATE Marco Casale-Rossi, Giovanni De Micheli, Antun Domic, Enrico Macii, Domenico Rossi, Joseph Sawicki
2016	—	`conf`	Paradigm-Shifting Players for IoT: Smart-Watches for Intensive Care Monitoring. MobiHealth Francesca Stradolini, Eleonora Lavalle, Giovanni De Micheli, Paolo Motto Ros, Danilo Demarchi, Sandro Carrara
2016	C	`conf`	Resistance impact by long connections on electrical behavior of integrated Memristive Biosensors. ISCAS Ioulia Tzouvadaki, Alessandro Vallero, Francesca Puppo, Giovanni De Micheli, Sandro Carrara
2016	—	`conf`	SAT-Based Combinational and Sequential Dependency Computation. Haifa Verification Conference Mathias Soeken, Pascal Raiola, Baruch Sterin, Bernd Becker, Giovanni De Micheli, Matthias Sauer
2016	C	`conf`	Simultaneous monitoring of anesthetics and therapeutic compounds with a portable multichannel potentiostat. ISCAS Francesca Stradolini, Tamador Elboshra, Armando Biscontini, Giovanni De Micheli, Sandro Carrara
2016	B	`conf`	Single-FPGA 3D ultrasound beamformer. FPL Ahmet Caner Yuzuguler, William Andrew Simon, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2016	B	`conf`	Single-FPGA, scalable, low-power, and high-quality 3D ultrasound beamformer. FPL William Andrew Simon, Ahmet Caner Yuzuguler, Aya Ibrahim, Federico Angiolini, Marcel Arditi, Jean-Philippe Thiran, Giovanni De Micheli
2016	A	`conf`	The Programmable Logic-in-Memory (PLiM) computer. DATE Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Anne Siemon, Eike Linn, Rainer Waser, Anupam Chattopadhyay, Giovanni De Micheli
2015	J	`jnl`	A Novel FPGA Architecture Based on Ultrafine Grain Reconfigurable Logic Cells. IEEE Trans. Very Large Scale Integr. Syst. Pierre-Emmanuel Gaillardon, Xifan Tang, Gain Kim, Giovanni De Micheli
2015	J	`jnl`	A Sound and Complete Axiomatization of Majority-n Logic. CoRR Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Anupam Chattopadhyay, Giovanni De Micheli
2015	J	`jnl`	A Survey on Low-Power Techniques with Emerging Technologies: From Devices to Systems. ACM J. Emerg. Technol. Comput. Syst. Pierre-Emmanuel Gaillardon, Edith Beigné, Suzanne Lesecq, Giovanni De Micheli
2015	—	`conf`	A fast pruning technique for low-power inexact Circuit design. LASCAS Johan Broc, Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jaume Joven Murillo, Krishna V. Palem, Giovanni De Micheli
2015	B	`conf`	A neural approach to drugs monitoring for personalized medicine. IJCNN Benjamin Staar, Marius Schirmer, Camilla Baj-Rossi, Giovanni De Micheli, Sandro Carrara, Elisabetta Chicca
2015	—	`conf`	A study on buffer distribution for RRAM-based FPGA routing structures. LASCAS Somayyeh Rahimian Omam, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	—	`conf`	A surface potential and current model for polarity-controllable silicon nanowire FETs. ESSDERC Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	A	`conf`	A ultra-low-power FPGA based on monolithically integrated RRAMs. DATE Pierre-Emmanuel Gaillardon, Xifan Tang, Jury Sandrini, Maxime Thammasack, Somayyeh Rahimian Omam, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2015	B	`conf`	Accurate power analysis for near-Vt RRAM-based FPGA. FPL Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	—	`conf`	Biocompatible packagings for fully implantable multi-panel devices for remote monitoring of metabolism. BioCAS Camilla Baj-Rossi, Andrea Cavallini, Tanja Rezzonico Jost, Michele Proietti, Fabio Grassi, Giovanni De Micheli, Sandro Carrara
2015	J	`jnl`	Cost-Effective Design of Mesh-of-Tree Interconnect for Multicore Clusters With 3-D Stacked L2 Scratchpad Memory. IEEE Trans. Very Large Scale Integr. Syst. Kyungsu Kang, Luca Benini, Giovanni De Micheli
2015	—	`conf`	Exploiting Circuit Duality to Speed up SAT. ISVLSI Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Maciej J. Ciesielski, Giovanni De Micheli
2015	—	`conf`	Exploiting the Expressive Power of Graphene Reconfigurable Gates via Post-Synthesis Optimization. ACM Great Lakes Symposium on VLSI Sandeep Miryala, Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino, Luca Gaetano Amarù, Giovanni De Micheli, Pierre-Emmanuel Gaillardon
2015	C	`conf`	FPGA-SPICE: A simulation-based power estimation framework for FPGAs. ICCD Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	J	`jnl`	FRAME: Fast and Realistic Attacker Modeling and Evaluation for Temporal Logical Correlation in Static Noise. CoRR Sungroh Yoon, Nahmsuk Oh, Peivand F. Tehrani, Eui-Young Chung, Giovanni De Micheli
2015	A	`conf`	Fault modeling in controllable polarity silicon nanowire circuits. DATE Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	C	`conf`	Full system for translational studies of personalized medicine with free-moving mice. ISCAS Sandro Carrara, Camilla Baj-Rossi, Sara Seyedeh Ghoreishizadeh, Stefano Riario, Grégoire Surrel, Francesca Stradolini, Cristina Boero, Giovanni De Micheli, Enver G. Kilinc, Catherine Dehollain
2015	J	`jnl`	Layout Technique for Double-Gate Silicon Nanowire FETs With an Efficient Sea-of-Tiles Architecture. IEEE Trans. Very Large Scale Integr. Syst. Shashikanth Bobba, Giovanni De Micheli
2015	—	`conf`	Multiple Independent Gate FETs: How many gates do we need? ASP-DAC Luca Gaetano Amarù, Gage Hills, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
2015	—	`conf`	NEM relay design with biconditional binary decision diagrams. NANOARCH Winston Haaswijk, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	J	`jnl`	New Logic Synthesis as Nanotechnology Enabler. Proc. IEEE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Subhasish Mitra, Giovanni De Micheli
2015	—	`conf`	On the Design of a Fault Tolerant Ripple-Carry Adder with Controllable-Polarity Transistors. ISVLSI Hassan Ghasemzadeh, Pierre-Emmanuel Gaillardon, J. Zhang, Giovanni De Micheli, Ernesto Sánchez, Matteo Sonza Reorda
2015	—	`conf`	Reliable redundancy with memristive-biosensors to achieve statistical significance in immunosensing. IWASI Ardalan Lotfi, Danilo Demarchi, Francesca Puppo, Giovanni De Micheli, Sandro Carrara, Marie-Agnes Doucey
2015	—	`conf`	Reversible Logic Synthesis via Biconditional Binary Decision Diagrams. ISMVL Anupam Chattopadhyay, Alessandro Littarru, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2015	A	`conf`	Tackling the bottleneck of delay tables in 3D ultrasound imaging. DATE Aya Ibrahim, Pascal Hager, Andrea Bartolini, Federico Angiolini, Marcel Arditi, Luca Benini, Giovanni De Micheli
2015	A	`conf`	The future of electronics, semiconductors, and design in Europe: panel. DATE Marco Casale-Rossi, Giovanni De Micheli, Jalal Bagherli, Thierry Collette, Antun Domic, Horst Symanzik, Hossein Yassaie
2015	A	`conf`	Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only). FPGA Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli
2015	—	`conf`	Wireless monitoring in intensive care units by a 3D-printed system with embedded electronic. BioCAS Flavia Basilotta, Stefano Riario, Francesca Stradolini, Irene Taurino, Danilo Demarchi, Giovanni De Micheli, Sandro Carrara
2014	—	`conf`	3D serial TSV link for low-power chip-to-chip communication. ICICDT Giulia Beanato, Alessandro Cevrero, Giovanni De Micheli, Yusuf Leblebici
2014	—	`conf`	A high-performance low-power near-Vt RRAM-based FPGA. FPT Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	—	`conf`	A lightweight cryptographic system for implantable biosensors. BioCAS Sara S. Ghoreishizadeh, Tolga Yalçin, Antonio Pullini, Giovanni De Micheli, Wayne P. Burleson, Sandro Carrara
2014	A	`conf`	A new basic logic structure for data-path computation (abstract only). FPGA Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli
2014	A	`conf`	Advanced system on a chip design based on controllable-polarity FETs. DATE Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Jian Zhang, Giovanni De Micheli
2014	J	`jnl`	An Integrated Control and Readout Circuit for Implantable Multi-Target Electrochemical Biosensing. IEEE Trans. Biomed. Circuits Syst. Sara S. Ghoreishizadeh, Camilla Baj-Rossi, Andrea Cavallini, Sandro Carrara, Giovanni De Micheli
2014	A	`conf`	An efficient manipulation package for Biconditional Binary Decision Diagrams. DATE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	J	`jnl`	Biconditional Binary Decision Diagrams: A Novel Canonical Logic Representation Form. IEEE J. Emerg. Sel. Topics Circuits Syst. Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	J	`jnl`	Configurable Circuits Featuring Dual-Threshold-Voltage Design With Three-Independent-Gate Silicon Nanowire FETs. IEEE Trans. Circuits Syst. I Regul. Pap. Jian Zhang, Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	—	`conf`	Data compression via logic synthesis. ASP-DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Andreas Burg, Giovanni De Micheli
2014	—	`conf`	Electrochemical biochip for applications to wireless and batteryless monitoring of free-moving mice. EMBC Camilla Baj-Rossi, Giovanni De Micheli, Sandro Carrara
2014	J	`jnl`	Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design. IEEE Trans. Circuits Syst. I Regul. Pap. Ibrahim Kazi, Pascal Andreas Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Yusuf Leblebici, Andreas Peter Burg, Giovanni De Micheli
2014	—	`conf`	Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection. NANOARCH Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Majid Yazdani, Giovanni De Micheli
2014	J	`jnl`	Full Fabrication and Packaging of an Implantable Multi-Panel Device for Monitoring of Metabolites in Small Animals. IEEE Trans. Biomed. Circuits Syst. Camilla Baj-Rossi, Enver G. Kilinc, Sara S. Ghoreishizadeh, Daniele Casarino, Tanja Rezzonico Jost, Catherine Dehollain, Fabio Grassi, Laura Pastorino, Giovanni De Micheli, Sandro Carrara
2014	—	`conf`	Glucose and lactate monitoring in cell cultures with a wireless android interface. BioCAS Jacopo Olivo, Lorenzo Foglia, Maria Antonietta Casulli, Cristina Boero, Sandro Carrara, Giovanni De Micheli
2014	—	`conf`	Live demonstration: A smart camera for real-time monitoring of fluorescent cell biomarkers. BioCAS Julien Ghaye, Sinan K. Muldur, Patricia Urban, Agnieszka Kinsner-Ovaskainen, Pascal Colpo, Danilo Demarchi, Giovanni De Micheli, Sandro Carrara
2014	—	`conf`	Live demonstration: In-situ biosensors array for cell culture monitoring. BioCAS Cristina Boero, Maria Antonietta Casulli, Jacopo Olivo, Lorenzo Foglia, Sandro Carrara, Giovanni De Micheli
2014	C	`conf`	Majority Logic Synthesis for Spin Wave Technology. DSD Odysseas Zografos, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli
2014	A*	`conf`	Majority-Inverter Graph: A Novel Data-Structure and Algorithms for Efficient Logic Optimization. DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	C	`conf`	Memristor-based devices for sensing. ISCAS Francesca Puppo, Marie-Agnes Doucey, Massimiliano Di Ventra, Giovanni De Micheli, Sandro Carrara
2014	—	`conf`	Novel configurable logic block architecture exploiting controllable-polarity transistors. ReCoSoC Pierre-Emmanuel Gaillardon, Xifan Tang, Giovanni De Micheli
2014	C	`conf`	Novel grid-based power routing scheme for regular controllable-polarity FET arrangements. ISCAS Odysseas Zografos, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	—	`conf`	Novel readout circuit for memristive biosensors in cancer detection. BioCAS Ali Zaher, Philipp Häfliger, Francesca Puppo, Giovanni De Micheli, Sandro Carrara
2014	A	`conf`	Panel: Emerging vs. established technologies, a two sphinxes' riddle at the crossroads? DATE Marco Casale-Rossi, Giovanni De Micheli, Rob Aitken, Antun Domic, Manfred Horstmann, Robert Hum, Philippe Magarshack
2014	—	`conf`	Parallel vs. serial inter-plane communication using TSVs. LASCAS Somayyeh Rahimian Omam, Yusuf Leblebici, Giovanni De Micheli
2014	B	`conf`	Pattern-based FPGA logic block and clustering algorithm. FPL Xifan Tang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	—	`conf`	Programmable active pixel sensor for low-light biomedical applications. BioCAS Gozen Koklu, Yusuf Leblebici, Giovanni De Micheli, Sandro Carrara
2014	C	`conf`	Quantitative estimation of biological cell surface receptors by segmenting conventional fluorescence microscopy images. ISCAS Julien Ghaye, Chiara Succa, Danilo Demarchi, Sinan K. Muldur, Pascal Colpo, Paolo Silacci, Guy Vergeres, Giovanni De Micheli, Sandro Carrara
2014	J	`jnl`	Representation of Medical Guidelines with a Computer Interpretable Model. Int. J. Artif. Intell. Tools Alena Simalatsar, Wenqi You, Verena Gotta, Nicolas Widmer, Giovanni De Micheli
2014	C	`conf`	Safe Implementation of Embedded Software for a Portable Device Supporting Drug Administration. BIBE Alena Simalatsar, Romain Bornet, Wenqi You, Yann Thoma, Giovanni De Micheli
2014	—	`conf`	Sub-mW reconfigurable interface IC for electrochemical sensing. BioCAS Sara S. Ghoreishizadeh, Cristina Boero, Antonio Pullini, Camilla Baj-Rossi, Sandro Carrara, Giovanni De Micheli
2014	J	`jnl`	System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits. ACM J. Emerg. Technol. Comput. Syst. Shashikanth Bobba, Jie Zhang, Pierre-Emmanuel Gaillardon, H.-S. Philip Wong, Subhasish Mitra, Giovanni De Micheli
2014	C	`conf`	TSPC Flip-Flop circuit design with three-independent-gate silicon nanowire FETs. ISCAS Xifan Tang, Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2014	—	`conf`	Temperature-aware runtime power management for chip-multiprocessors with 3-D stacked cache. ISQED Kyungsu Kang, Giovanni De Micheli, Seunghan Lee, Chong-Min Kyung
2014	—	`conf`	Unlocking Controllable-Polarity Transistors Opportunities by Exclusive-OR and Majority Logic Synthesis. ISVLSI Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Giovanni De Micheli
2013	C	`conf`	3.5-D integration: A case study. ISCAS Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Ciprian Seiculescu, Vasilis F. Pavlidis, Giovanni De Micheli
2013	—	`conf`	A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write. NEWCAS Ibrahim Kazi, Pascal Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Andreas Burg, Giovanni De Micheli
2013	J	`jnl`	A Study of Multi-Layer Spiral Inductors for Remote Powering of Implantable Sensors. IEEE Trans. Biomed. Circuits Syst. Jacopo Olivo, Sandro Carrara, Giovanni De Micheli
2013	J	`jnl`	A combined sensor placement and convex optimization approach for thermal management in 3D-MPSoC with liquid cooling. Integr. Francesco Zanini, David Atienza, Giovanni De Micheli
2013	—	`conf`	A configurable IC to contol, readout, and calibrate an array of biosensors. ECCTD Sara S. Ghoreishizadeh, Sandro Carrara, Giovanni De Micheli
2013	—	`conf`	A fast TCAD-based methodology for Variation analysis of emerging nano-devices. DFTS Hassan Ghasemzadeh Mohammadi, Pierre-Emmanuel Gaillardon, Majid Yazdani, Giovanni De Micheli
2013	J	`jnl`	An Enhanced Design Methodology for Resonant Clock Trees. J. Low Power Electron. Somayyeh Rahimian, Vasilis F. Pavlidis, Xifan Tang, Giovanni De Micheli
2013	—	`conf`	An implantable bio-micro-system for drug monitoring. BioCAS Sara S. Ghoreishizadeh, Enver G. Kilinc, Camilla Baj-Rossi, Catherine Dehollain, Sandro Carrara, Giovanni De Micheli
2013	J	`jnl`	An integrated, programming model-driven framework for NoC-QoS support in cluster-based embedded many-cores. Parallel Comput. Jaume Joven, Andrea Marongiu, Federico Angiolini, Luca Benini, Giovanni De Micheli
2013	A*	`conf`	BDS-MAJ: a BDD-based logic synthesis tool exploiting majority logic decomposition. DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	A	`conf`	Biconditional BDD: a novel canonical BDD for logic synthesis targeting XOR-rich circuits. DATE Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	J	`jnl`	Cell transformations and physical design techniques for 3D monolithic integrated circuits. ACM J. Emerg. Technol. Comput. Syst. Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Giovanni De Micheli
2013	C	`conf`	Characterization of standard CMOS compatible photodiodes and pixels for Lab-on-Chip devices. ISCAS Gozen Koklu, Ralph Etienne-Cummings, Yusuf Leblebici, Giovanni De Micheli, Sandro Carrara
2013	J	`jnl`	Computing Accurate Performance Bounds for Best Effort Networks-on-Chip. IEEE Trans. Computers Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad
2013	J	`jnl`	Designing best effort networks-on-chip to meet hard latency constraints. ACM Trans. Embed. Comput. Syst. Ciprian Seiculescu, Dara Rahmati, Srinivasan Murali, Hamid Sarbazi-Azad, Luca Benini, Giovanni De Micheli
2013	C	`conf`	Dual-threshold-voltage configurable circuits with three-independent-gate silicon nanowire FETs. ISCAS Jian Zhang, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	—	`conf`	Efficient arithmetic logic gates using double-gate silicon nanowire FETs. NEWCAS Luca Arnani, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	A	`conf`	Electronic implants: power delivery and management. DATE Jacopo Olivo, Sara S. Ghoreishizadeh, Sandro Carrara, Giovanni De Micheli
2013	—	`conf`	Empirical study of noise dependence in electrochemical sensors. IWASI Sara S. Ghoreishizadeh, Gaurav Nanda, Sandro Carrara, Giovanni De Micheli
2013	—	`conf`	Fabrication and packaging of a fully implantable biosensor array. BioCAS Camilla Baj-Rossi, Enver G. Kilinc, Sara S. Ghoreishizadeh, Daniele Casarino, Tanja Rezzonico Jost, Catherine Dehollain, Fabio Grassi, Laura Pastorino, Giovanni De Micheli, Sandro Carrara
2013	—	`conf`	MIXSyn: An efficient logic synthesis methodology for mixed XOR-AND/OR dominated circuits. ASP-DAC Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	—	`conf`	Multi-electrode amperometric biosensor for neurotransmitters detection. BioCAS Genevieve Massicotte, Mohamad Sawan, Giovanni De Micheli, Sandro Carrara
2013	—	`conf`	Nanogap-based enzymatic-free electrochemical detection of glucose. BioCAS Ismael Rattalino, Paolo Motto Ros, Irene Taurino, Fernando Cortes-Salazar, Gianluca Piccinini, Danilo Demarchi, Giovanni De Micheli, Sandro Carrara
2013	A	`conf`	Panel: "will 3D-IC remain a technology of the future... even in the future?". DATE Marco Casale-Rossi, Patrick Leduc, Giovanni De Micheli, Patrick Blouet, Brendan Farley, Anna Fontanelli, Dragomir Milojevic, Steve Smith
2013	—	`conf`	Parameterized SVM for personalized drug concentration prediction. EMBC Wenqi You, Alena Simalatsar, Giovanni De Micheli
2013	J	`jnl`	Power-Gated Differential Logic Style Based on Double-Gate Controllable-Polarity Transistors. IEEE Trans. Circuits Syst. II Express Briefs Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Jian Zhang, Giovanni De Micheli
2013	J	`jnl`	QoS-Driven Reconfigurable Parallel Computing for NoC-Based Clustered MPSoCs. IEEE Trans. Ind. Informatics Jaume Joven, Akash Bagdia, Federico Angiolini, P. Strid, David Castells-Rufas, Eduard Fernandez-Alonso, Jordi Carrabina, Giovanni De Micheli
2013	—	`conf`	Runtime 3-D stacked cache management for chip-multiprocessors. ISQED Jongpil Jung, Kyungsu Kang, Giovanni De Micheli, Chong-Min Kyung
2013	—	`conf`	SATSoT: A methodology to map controllable-polarity devices on a regular fabric using SAT. NANOARCH Catherine Gasnier, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	C	`conf`	Self-checking ripple-carry adder with Ambipolar Silicon NanoWire FET. ISCAS Ogun Turkyilmaz, Fabien Clermidy, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2013	J	`jnl`	Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise. IEEE Trans. Very Large Scale Integr. Syst. Hu Xu, Vasilis F. Pavlidis, Xifan Tang, Wayne P. Burleson, Giovanni De Micheli
2013	A*	`conf`	Towards structured ASICs using polarity-tunable Si nanowire transistors. DAC Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amarù, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2013	A	`conf`	Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. DATE Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2013	—	`conf`	Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study. LATW Pierre-Emmanuel Gaillardon, Hassan Ghasemzadeh, Giovanni De Micheli
2012	C	`conf`	3D-LIN: A configurable low-latency interconnect for multi-core clusters with 3D stacked L1 memory. VLSI-SoC Giulia Beanato, Igor Loi, Giovanni De Micheli, Yusuf Leblebici, Luca Benini
2012	J	`jnl`	A Buffer-Sizing Algorithm for Network-on-Chips with Multiple Voltage-Frequency Islands. J. Electr. Comput. Eng. Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli
2012	—	`conf`	A Drug Administration Decision Support System. BIBM Workshops Wenqi You, Alena Simalatsar, Nicolas Widmer, Giovanni De Micheli
2012	J	`jnl`	A Self-Contained System With CNTs-Based Biosensors for Cell Culture Monitoring. IEEE J. Emerg. Sel. Topics Circuits Syst. Cristina Boero, Jacopo Olivo, Sandro Carrara, Giovanni De Micheli
2012	—	`conf`	A current-mode potentiostat for multi-target detection tested with different lactate biosensors. BioCAS Sara S. Ghoreishizadeh, Irene Taurino, Sandro Carrara, Giovanni De Micheli
2012	Misc	`conf`	A distributed interleaving scheme for efficient access to WideIO DRAM memory. CODES+ISSS Ciprian Seiculescu, Luca Benini, Giovanni De Micheli
2012	C	`conf`	A high-throughput and low-latency interconnection network for multi-core Clusters with 3-D stacked L2 tightly-coupled data memory. VLSI-SoC Kyungsu Kang, Luca Benini, Giovanni De Micheli
2012	—	`conf`	CCNoC: Specializing On-Chip Interconnects for Energy Efficiency in Cache-Coherent Servers. NOCS Stavros Volos, Ciprian Seiculescu, Boris Grot, Naser Khosro Pour, Babak Falsafi, Giovanni De Micheli
2012	—	`conf`	Configurable Low-Latency Interconnect for Multi-core Clusters. VLSI-SoC (Selected Papers) Giulia Beanato, Igor Loi, Giovanni De Micheli, Yusuf Leblebici, Luca Benini
2012	—	`conf`	Design, fabrication, and test of a sensor array for perspective biosensing in chronic pathologies. BioCAS Andrea Cavallini, Camilla Baj-Rossi, Sara S. Ghoreishizadeh, Giovanni De Micheli, Sandro Carrara
2012	J	`jnl`	Editorial. IEEE J. Emerg. Sel. Topics Circuits Syst. Giovanni De Micheli, Subhasish Mitra, Maciej Ogorzalek
2012	J	`jnl`	Effect of process variations in 3D global clock distribution networks. ACM J. Emerg. Technol. Comput. Syst. Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2012	J	`jnl`	Electrochemical Detection of Anti-Breast-Cancer Agents in Human Serum by Cytochrome P450-Coated Carbon Nanotubes. Sensors Camilla Baj-Rossi, Giovanni De Micheli, Sandro Carrara
2012	—	`conf`	Engineering complex systems for health, security and the environment. ASP-DAC Giovanni De Micheli
2012	B	`conf`	Enhanced wafer matching heuristics for 3-D ICs. ETS Vasilis F. Pavlidis, Hu Xu, Giovanni De Micheli
2012	J	`jnl`	Fully Integrated Biochip Platforms for Advanced Healthcare. Sensors Sandro Carrara, Sara S. Ghoreishizadeh, Jacopo Olivo, Irene Taurino, Camilla Baj-Rossi, Andrea Cavallini, Maaike Op de Beeck, Catherine Dehollain, Wayne P. Burleson, Francis Moussy, Anthony Guiseppi-Elie, Giovanni De Micheli
2012	C	`conf`	GMS: Generic memristive structure for non-volatile FPGAs. VLSI-SoC Pierre-Emmanuel Gaillardon, Davide Sacchetto, Shashikanth Bobba, Yusuf Leblebici, Giovanni De Micheli
2012	A*	`conf`	Integrated biosensors for personalized medicine. DAC Giovanni De Micheli, Cristina Boero, Camilla Baj-Rossi, Irene Taurino, Sandro Carrara
2012	J	`jnl`	Inter-Plane Communication Methods for 3-D ICs. J. Low Power Electron. Somayyeh Rahimian, Vasilis F. Pavlidis, Giovanni De Micheli
2012	C	`conf`	Medical guidelines reconciling medical software and electronic devices: Imatinib case-study. BIBE Alena Simalatsar, Giovanni De Micheli
2012	J	`jnl`	Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A Review. Proc. IEEE Davide Sacchetto, Giovanni De Micheli, Yusuf Leblebici
2012	J	`jnl`	New Approaches for Carbon Nanotubes-Based Biosensors and Their Application to Cell Culture Monitoring. IEEE Trans. Biomed. Circuits Syst. Cristina Boero, Jacopo Olivo, Giovanni De Micheli, Sandro Carrara
2012	J	`jnl`	Online thermal control methods for multiprocessor systems. ACM Trans. Design Autom. Electr. Syst. Francesco Zanini, David Atienza, Colin N. Jones, Luca Benini, Giovanni De Micheli
2012	A*	`conf`	Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors. DAC Shashikanth Bobba, Michele De Marchi, Yusuf Leblebici, Giovanni De Micheli
2012	—	`conf`	Process/design co-optimization of regular logic tiles for double-gate silicon nanowire transistors. NANOARCH Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Jian Zhang, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
2012	—	`conf`	Quantification of sub-resolution sized targets in cell fluorescent imaging. BioCAS Julien Ghaye, Giovanni De Micheli, Sandro Carrara
2012	C	`conf`	Quantitative comparison of commercial CCD and custom-designed CMOS camera for biological applications. ISCAS Gozen Koklu, Julien Ghaye, Rene Beuchat, Giovanni De Micheli, Yusuf Leblebici, Sandro Carrara
2012	—	`conf`	TAT-based formal representation of medical guidelines: Imatinib case-study. EMBC Alena Simalatsar, Giovanni De Micheli
2012	—	`conf`	The combined effect of process variations and power supply noise on clock skew and jitter. ISQED Hu Xu, Vasilis F. Pavlidis, Wayne P. Burleson, Giovanni De Micheli
2012	A	`conf`	Voltage propagation method for 3-D power grid analysis. DATE Cheng Zhang, Vasilis F. Pavlidis, Giovanni De Micheli
2011	—	`ch.`	3D Network on Chip Topology Synthesis: Designing Custom Topologies for Chip Stacks. 3D Integration for NoC-based SoC Architectures Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2011	—	`conf`	A DRAM Centric NoC Architecture and Topology Design Approach. ISVLSI Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2011	—	`conf`	A Simulation Based Buffer Sizing Algorithm for Network on Chips. ISVLSI Anish S. Kumar, M. Pawan Kumar, Srinivasan Murali, V. Kamakoti, Luca Benini, Giovanni De Micheli
2011	A	`conf`	Alternative design methodologies for the next generation logic switch. ICCAD Davide Sacchetto, Michele De Marchi, Giovanni De Micheli, Yusuf Leblebici
2011	J	`jnl`	An Efficient Gate Library for Ambipolar CNTFET Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli
2011	A	`conf`	An integrated platform for advanced diagnostics. DATE Giovanni De Micheli, Sara S. Ghoreishizadeh, Cristina Boero, Francesco Valgimigli, Sandro Carrara
2011	A	`conf`	Analytical heat transfer model for thermal through-silicon vias. DATE Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2011	—	`conf`	CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits. ASP-DAC Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Thomas Ernst, Olivier Faynot, David Z. Pan, Giovanni De Micheli
2011	—	`conf`	Convex-Based Thermal Management for 3D MPSoCs Using DVFS and Variable-Flow Liquid Cooling. PATMOS Francesco Zanini, David Atienza, Giovanni De Micheli
2011	—	`ch.`	Design and Analysis of NoCs for Low-Power 2D and 3D SoCs. Low Power Networks-on-Chip Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2011	—	`conf`	Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits. PATMOS Somayyeh Rahimian, Vasilis F. Pavlidis, Giovanni De Micheli
2011	—	`conf`	Example-based support vector machine for drug concentration analysis. EMBC Wenqi You, Nicolas Widmer, Giovanni De Micheli
2011	—	`conf`	HW-SW implementation of a decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs. SIES Jaume Joven, Per Strict, David Castells-Rufas, Akash Bagdia, Giovanni De Micheli, Jordi Carrabina
2011	J	`jnl`	Hierarchical Thermal Management Policy for High-Performance 3D Systems With Liquid Cooling. IEEE J. Emerg. Sel. Topics Circuits Syst. Francesco Zanini, Mohamed M. Sabry, David Atienza, Giovanni De Micheli
2011	A	`conf`	Logic synthesis and physical design: Quo vadis? DATE Giovanni De Micheli
2011	—	`conf`	PRO3D, Programming for Future 3D Manycore Architectures: Project's Interim Status. FMCO Christian Fabre, Iuliana Bacivarov, Ananda Basu, Martino Ruggiero, David Atienza, Eric Flamand, Jean-Pierre Krimm, Julien Mottin, Lars Schor, Pratyush Kumar, Hoeseok Yang, Devesh B. Chokshi, Lothar Thiele, Saddek Bensalem, Marius Bozga, Luca Benini, Mohamed M. Sabry, Yusuf Leblebici, Giovanni De Micheli, Diego Melpignano
2011	—	`conf`	Personalized modeling for drug concentration prediction using Support Vector Machine. BMEI Wenqi You, Nicolas Widmer, Giovanni De Micheli
2011	C	`conf`	Skew variability in 3-D ICs with multiple clock domains. ISCAS Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2011	C	`conf`	Thermal-aware system-level modeling and management for Multi-Processor Systems-on-Chip. ISCAS Francesco Zanini, David Atienza, Luca Benini, Giovanni De Micheli
2011	—	`conf`	pH sensing with temperature compensation in a Molecular Biosensor for drugs detection. ISQED Daniela De Venuto, Sandro Carrara, Andrea Cavallini, Giovanni De Micheli
2010	A	`conf`	A method to remove deadlocks in Networks-on-Chips with Wormhole flow control. DATE Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	J	`jnl`	Capacitance DNA bio-chips improved by new probe immobilization strategies. Microelectron. J. Sandro Carrara, Andrea Cavallini, Yusuf Leblebici, Giovanni De Micheli, Vijayender Bhalla, Francesco Valle, Bruno Samorì, Luca Benini, Bruno Riccò, Inger Vikholm-Lundin, Tony Munter
2010	A*	`conf`	Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement. DAC Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra
2010	C	`conf`	Characterization of memristive Poly-Si Nanowires via empirical physical modelling. ISCAS Nikolaos Archontas, Julius Georgiou, M. Haykel Ben Jamaa, Sandro Carrara, Giovanni De Micheli
2010	J	`jnl`	Comparative Analysis of NoCs for Two-Dimensional Versus Three-Dimensional SoCs Supporting Multiple Voltage and Frequency Islands. IEEE Trans. Circuits Syst. II Express Briefs Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	C	`conf`	Design aspects of carry lookahead adders with vertically-stacked nanowire transistors. ISCAS Davide Sacchetto, M. Haykel Ben Jamaa, Giovanni De Micheli, Yusuf Leblebici
2010	C	`conf`	Design of a CNFET array for sensing and control in P450 based biochips for multiple drug detection. ISCAS Shashikanth Bobba, Sandro Carrara, Giovanni De Micheli
2010	—	`conf`	Design of networks on chips for 3D ICs. ASP-DAC Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	A	`ed.`	Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010 DATE Giovanni De Micheli, Bashir M. Al-Hashimi, Wolfgang Müller, Enrico Macii
2010	Misc	`conf`	Exploring programming model-driven QoS support for NoC-based platforms. CODES+ISSS Jaume Joven, Andrea Marongiu, Federico Angiolini, Luca Benini, Giovanni De Micheli
2010	C	`conf`	Memristive devices fabricated with silicon nanowire schottky barrier transistors. ISCAS Davide Sacchetto, M. Haykel Ben Jamaa, Sandro Carrara, Giovanni De Micheli, Yusuf Leblebici
2010	C	`conf`	Methods for Designing Reliable Probe Arrays. BIBE Michele Lombardi, Luca Benini, Abhishek Garg, Giovanni De Micheli
2010	C	`conf`	Multicore thermal management using approximate explicit model predictive control. ISCAS Francesco Zanini, Colin N. Jones, David Atienza, Giovanni De Micheli
2010	A*	`conf`	Networks on Chips: from research to products. DAC Giovanni De Micheli, Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Federico Angiolini, Antonio Pullini
2010	—	`conf`	Online convex optimization-based algorithm for thermal management of MPSoCs. ACM Great Lakes Symposium on VLSI Francesco Zanini, David Atienza, Giovanni De Micheli, Stephen P. Boyd
2010	A	`conf`	Panel: First commandment at least, do nothing well! DATE Marco Casale-Rossi, Giovanni De Micheli, Antun Domic, Enrico Macii, Piero Perlo, Andreas Wild, Roberto Zafalon
2010	—	`conf`	Performance analysis of 3-D monolithic integrated circuits. 3DIC Shashikanth Bobba, Ashutosh Chakraborty, Olivier Thomas, Perrine Batude, Vasilis F. Pavlidis, Giovanni De Micheli
2010	—	`conf`	Physical design tradeoffs in power distribution networks for 3-D ICs. ICECS Ioannis Tsioutsios, Vasilis F. Pavlidis, Giovanni De Micheli
2010	A	`conf`	Power consumption of logic circuits in ambipolar carbon nanotube technology. DATE M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli
2010	—	`conf`	Process-induced skew variation for scaled 2-D and 3-D ICs. SLIP Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2010	—	`conf`	Regular fabric design with ambipolar CNTFETs for FPGA and structured ASIC applications. NANOARCH Michele De Marchi, M. Haykel Ben Jamaa, Giovanni De Micheli
2010	J	`jnl`	SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2010	—	`conf`	Synchronization and power integrity issues in 3-D ICs. APCCAS Vasilis F. Pavlidis, Hu Xu, Ioannis Tsioutsios, Giovanni De Micheli
2010	—	`conf`	Synthesis of regular computational fabrics with ambipolar CNTFET technology. ICECS Michele De Marchi, Shashikanth Bobba, M. Haykel Ben Jamaa, Giovanni De Micheli
2010	C	`conf`	Temperature sensor placement in thermal management systems for MPSoCs. ISCAS Francesco Zanini, David Atienza, Colin N. Jones, Giovanni De Micheli
2009	—	`conf`	A control theory approach for thermal balancing of MPSoC. ASP-DAC Francesco Zanini, David Atienza, Giovanni De Micheli
2009	A	`conf`	A method for calculating hard QoS guarantees for Networks-on-Chip. ICCAD Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad
2009	—	`conf`	A stochastic perturbative approach to design a defect-aware thresholder in the sense amplifier of crossbar memories. ASP-DAC M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli
2009	—	`conf`	An Analytical Model for the Contention Access Period of the Slotted IEEE 802.15.4 with Service Differentiation. ICC Eugène David Ngangue Ndih, Nadia Khaled, Giovanni De Micheli
2009	J	`jnl`	An Outlook on Design Technologies for Future Integrated Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli
2009	Misc	`conf`	Complete nanowire crossbar framework optimized for the multi-spacer patterning technique. CASES M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf Leblebici, Giovanni De Micheli
2009	A*	`conf`	Decoding nanowire arrays fabricated with the multi-spacer patterning technique. DAC M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De Micheli
2009	A	`conf`	Design of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis. DATE Shashikanth Bobba, Jie Zhang, Antonio Pullini, David Atienza, Giovanni De Micheli
2009	A	`ed.`	Design, Automation and Test in Europe, DATE 2009, Nice, France, April 20-24, 2009 DATE Luca Benini, Giovanni De Micheli, Bashir M. Al-Hashimi, Wolfgang Müller
2009	—	`conf`	Implementation of an Automated ECG-based Diagnosis Algorithm for a Wireless Body Sensor Plataform. BIODEVICES Francisco J. Rincón, Laura Gutiérrez, Mónica Jiménez, Víctor Díaz, Nadia Khaled, David Atienza, Marcos Sánchez-Élez, Joaquín Recas, Giovanni De Micheli
2009	J	`jnl`	Modeling stochasticity and robustness in gene regulatory networks. Bioinform. Abhishek Garg, Kartik Mohanram, Alessandro Di Cara, Giovanni De Micheli, Ioannis Xenarios
2009	—	`conf`	Multicore thermal management with model predictive control. ECCTD Francesco Zanini, David Atienza, Luca Benini, Giovanni De Micheli
2009	—	`ch.`	Networks-on-Chip: an Interconnect Fabric for Multiprocessor Systems-on-Chip. Embedded Systems Design and Verification Francisco Gilabert Villamón, Davide Bertozzi, Luca Benini, Giovanni De Micheli
2009	A*	`conf`	NoC topology synthesis for supporting shutdown of voltage islands in SoCs. DAC Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009	A	`conf`	Novel library of logic gates with ambipolar CNTFETs: Opportunities for multi-level logic synthesis. DATE M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De Micheli
2009	A	`conf`	Panel session - Consolidation, a modern "Moor of Venice" tale. DATE Marco Casale-Rossi, Giovanni De Micheli
2009	A	`conf`	Physically clustered forward body biasing for variability compensation in nanometer CMOS design. DATE Ashoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Giovanni De Micheli, Enrico Macii
2009	—	`conf`	Power distribution paths in 3-D ICS. ACM Great Lakes Symposium on VLSI Vasilis F. Pavlidis, Giovanni De Micheli
2009	J	`jnl`	Processor Speed Control With Thermal Constraints. IEEE Trans. Circuits Syst. I Regul. Pap. Almir Mutapcic, Stephen P. Boyd, Srinivasan Murali, David Atienza, Giovanni De Micheli, Rajesh Gupta
2009	—	`conf`	Quantum Dots and Wires to Improve Enzymes-Based Electrochemical Bio-sensing. NanoNet Sandro Carrara, Cristina Boero, Giovanni De Micheli
2009	—	`conf`	Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits. NanoNet Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
2009	A	`conf`	SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips. DATE Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2009	—	`conf`	Synthesis of networks on chips for 3D systems on chips. ASP-DAC Srinivasan Murali, Ciprian Seiculescu, Luca Benini, Giovanni De Micheli
2009	J	`jnl`	Thermal Balancing Policy for Multiprocessor Stream Computing Platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Fabrizio Mulas, David Atienza, Andrea Acquaviva, Salvatore Carta, Luca Benini, Giovanni De Micheli
2008	—	`conf`	A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication. VLSI-SoC (Selected Papers) Vincenzo Rana, David Atienza, Marco D. Santambrogio, Donatella Sciuto, Giovanni De Micheli
2008	J	`jnl`	Designing Micro- and Nanosystems for a Safer and Healthier Tomorrow. IEEE Des. Test Comput. Giovanni De Micheli
2008	A	`conf`	Designing Micro/Nano Systems for a Safer and Healthier Tomorrow. DATE Giovanni De Micheli
2008	J	`jnl`	Joint co-clustering: Co-clustering of genomic and clinical bioimaging data. Comput. Math. Appl. Elisa Ficarra, Giovanni De Micheli, Sungroh Yoon, Luca Benini, Enrico Macii
2008	J	`jnl`	Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures. Integr. David Atienza, Praveen Raghavan, José Luis Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
2008	J	`jnl`	Network-on-Chip design and synthesis outlook. Integr. David Atienza, Federico Angiolini, Srinivasan Murali, Antonio Pullini, Luca Benini, Giovanni De Micheli
2008	A	`conf`	OS-Based Sensor Node Platform and Energy Estimation Model for Health-Care Wireless Sensor Networks. DATE Francisco J. Rincón, Michele Paselli, Joaquín Recas, Qin Zhao, Marcos Sánchez-Élez, David Atienza, Julien Penders, Giovanni De Micheli
2008	J	`jnl`	On-chip implementation of multiprocessor networks and switch fabrics. Int. J. Embed. Syst. Terry Tao Ye, Giovanni De Micheli
2008	A*	`conf`	Programmable logic circuits based on ambipolar CNFET. DAC M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebici, Giovanni De Micheli
2008	—	`conf`	Reliability-aware design for nanometer-scale devices. ASP-DAC David Atienza, Giovanni De Micheli, Luca Benini, José L. Ayala, Pablo García Del Valle, Michael DeBole, Vijaykrishnan Narayanan
2008	B	`conf`	Stochastic modeling and analysis for environmentally powered wireless sensor nodes. WiOpt Alex E. Susu, Andrea Acquaviva, David Atienza, Giovanni De Micheli
2008	J	`jnl`	Synchronous versus asynchronous modeling of gene regulatory networks. Bioinform. Abhishek Garg, Alessandro Di Cara, Ioannis Xenarios, Luis Mendoza, Giovanni De Micheli
2008	—	`conf`	System-level design technologies for heterogeneous distributed systems. SBCCI Giovanni De Micheli
2008	A	`conf`	Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization. DATE Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Luca Benini, Giovanni De Micheli
2008	A	`conf`	Thermal Balancing Policy for Streaming Computing on Multiprocessor Architectures. DATE Fabrizio Mulas, Michele Pittau, Marco Buttu, Salvatore Carta, Andrea Acquaviva, Luca Benini, David Atienza, Giovanni De Micheli
2008	J	`jnl`	Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli
2007	J	`jnl`	A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees. VLSI Design Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli
2007	J	`jnl`	An Application-Specific Design Methodology for On-Chip Crossbar Generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivasan Murali, Luca Benini, Giovanni De Micheli
2007	J	`jnl`	An Application-Specific Design Methodology for STbus Crossbar Generation CoRR Srinivasan Murali, Giovanni De Micheli
2007	B	`conf`	An Efficient Method for Dynamic Analysis of Gene Regulatory Networks and RECOMB Abhishek Garg, Ioannis Xenarios, Luis Mendoza, Giovanni De Micheli
2007	J	`jnl`	Bringing NoCs to 65 nm. IEEE Micro Antonio Pullini, Federico Angiolini, Srinivasan Murali, David Atienza, Giovanni De Micheli, Luca Benini
2007	J	`jnl`	Clustering protein environments for function prediction: finding PROSITE motifs in 3D. BMC Bioinform. Sungroh Yoon, Jessica C. Ebert, Eui-Young Chung, Giovanni De Micheli, Russ B. Altman
2007	J	`jnl`	Co-clustering: A Versatile Tool for Data Analysis in Biomedical Informatics. IEEE Trans. Inf. Technol. Biomed. Sungroh Yoon, Luca Benini, Giovanni De Micheli
2007	—	`conf`	Design Technologies for Networks on Chips. NOCS Giovanni De Micheli
2007	J	`jnl`	Dynamic simulation of regulatory networks using SQUAD. BMC Bioinform. Alessandro Di Cara, Abhishek Garg, Giovanni De Micheli, Ioannis Xenarios, Luis Mendoza
2007	—	`conf`	Early wire characterization for predictable network-on-chip global interconnects. SLIP Ilhan Hatirnaz, Stéphane Badel, Nuria Pazos, Yusuf Leblebici, Srinivasan Murali, David Atienza, Giovanni De Micheli
2007	A	`conf`	Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays. ICCAD M. Haykel Ben Jamaa, Kirsten E. Moselund, David Atienza, Didier Bouvet, Adrian M. Ionescu, Yusuf Leblebici, Giovanni De Micheli
2007	J	`jnl`	HW-SW emulation framework for temperature-aware design in MPSoCs. ACM Trans. Design Autom. Electr. Syst. David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida
2007	A	`conf`	Interactive presentation: Improving the fault tolerance of nanometric PLA designs. DATE Federico Angiolini, M. Haykel Ben Jamaa, David Atienza, Luca Benini, Giovanni De Micheli
2007	—	`conf`	MiGra: A Task Migration Algorithm for Reducing Temperature Gradient in Multiprocessor Systems on Chip. SoC Salvatore Carta, Fabio Mereu, Andrea Acquaviva, Giovanni De Micheli
2007	—	`conf`	Multi-processor operating system emulation framework with thermal feedback for systems-on-chip. ACM Great Lakes Symposium on VLSI Salvatore Carta, Andrea Acquaviva, Pablo García Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias
2007	—	`conf`	New Design Paradigms: New Architectures for New technologies. ICECS Giovanni De Micheli
2007	—	`conf`	NoC Design and Implementation in 65nm Technology. NOCS Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini
2007	J	`jnl`	Power and Reliability Management of SoCs. IEEE Trans. Very Large Scale Integr. Syst. Tajana Simunic Rosing, Kresimir Mihic, Giovanni De Micheli
2007	J	`jnl`	Reconfiguration Strategies for Environmentally Powered Devices: Theoretical Analysis and Experimental Validation. Trans. High Perform. Embed. Archit. Compil. Alex E. Susu, Michele Magno, Andrea Acquaviva, David Atienza, Giovanni De Micheli
2007	C	`conf`	Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors. ISCAS Praveen Raghavan, José L. Ayala, David Atienza, Francky Catthoor, Giovanni De Micheli, Marisa López-Vallejo
2007	J	`jnl`	Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. Srinivasan Murali, David Atienza, Paolo Meloni, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2007	—	`conf`	System-Level Design for Nano-Electronics. ICECS David Atienza, Shashikanth Bobba, Massimo Poli, Giovanni De Micheli, Luca Benini
2007	Misc	`conf`	Temperature-aware processor frequency assignment for MPSoCs using convex optimization. CODES+ISSS Srinivasan Murali, Almir Mutapcic, David Atienza, Rajesh Gupta, Stephen P. Boyd, Giovanni De Micheli
2007	J	`jnl`	Timing-Error-Tolerant Network-on-Chip Design Methodology. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rutuparna Tamhankar, Srinivasan Murali, Stergios Stergiou, Antonio Pullini, Federico Angiolini, Luca Benini, Giovanni De Micheli
2007	—	`ed.`	VLSI-SoC: Research Trends in VLSI and Systems on Chip - Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France VLSI-SoC (Selected Papers) Giovanni De Micheli, Salvador Mir, Ricardo Reis
2006	C	`conf`	A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework. VLSI-SoC Pablo García Del Valle, David Atienza, Ivan Magan, Javier Garcia Flores, Esther Andres Perez, Jose Manuel Mendias, Luca Benini, Giovanni De Micheli
2006	J	`jnl`	A Pattern-Mining Method for High-Throughput Lab-on-a-Chip Data Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sungroh Yoon, Luca Benini, Giovanni De Micheli
2006	Misc	`conf`	A buffer-sizing algorithm for networks on chip using TDMA and credit-based end-to-end flow control. CODES+ISSS Martijn Coenen, Srinivasan Murali, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006	A*	`conf`	A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip. DAC David Atienza, Pablo García Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias
2006	A	`conf`	A methodology for mapping multiple use-cases onto networks on chips. DATE Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006	A*	`conf`	A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip. DAC Srinivasan Murali, David Atienza, Luca Benini, Giovanni De Micheli
2006	—	`conf`	A simulation methodology for reliability analysis in multi-core SoCs. ACM Great Lakes Symposium on VLSI Ayse K. Coskun, Tajana Simunic Rosing, Yusuf Leblebici, Giovanni De Micheli
2006	—	`conf`	An opportunistic reconfiguration strategy for environmentally powered devices. Conf. Computing Frontiers Igino Folcarelli, Alex E. Susu, Ties Kluter, Giovanni De Micheli, Andrea Acquaviva
2006	J	`jnl`	Analysis and Optimization of MPSoC Reliability. J. Low Power Electron. Ayse Kivilcim Coskun, Tajana Simunic, Kresimir Mihic, Giovanni De Micheli, Yusuf Leblebici
2006	—	`conf`	Comparison of a Timing-Error Tolerant Scheme with a Traditional Re-transmission Mechanism for Networks on Chips. SoC Srinivasan Murali, Rutuparna Tamhankar, Federico Angiolini, Antonio Pullini, David Atienza, Luca Benini, Giovanni De Micheli
2006	—	`conf`	Compiler-Driven Leakage Energy Reduction in Banked Register Files. PATMOS David Atienza, Praveen Raghavan, José L. Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
2006	B	`conf`	Computer-Aided Evaluation of Protein Expression in Pathological Tissue Images. CBMS Elisa Ficarra, Enrico Macii, Giovanni De Micheli, Luca Benini
2006	C	`conf`	Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips. VLSI-SoC Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2006	—	`conf`	Designing Routing and Message-Dependent Deadlock Free Networks on Chips. VLSI-SoC (Selected Papers) Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2006	A	`conf`	Designing application-specific networks on chips with floorplan information. ICCAD Srinivasan Murali, Paolo Meloni, Federico Angiolini, David Atienza, Salvatore Carta, Luca Benini, Giovanni De Micheli, Luigi Raffo
2006	—	`conf`	Exploiting Binary Abstractions in Deciphering Gene Interactions. EMBC Sungroh Yoon, Abhishek Garg, Eui-Young Chung, Hyun Seok Park, Woong-Yang Park, Giovanni De Micheli
2006	—	`conf`	Mapping and configuration methods for multi-use-case networks on chips. ASP-DAC Srinivasan Murali, Martijn Coenen, Andrei Radulescu, Kees Goossens, Giovanni De Micheli
2006	C	`conf`	Mining Gene Sets for Measuring Similarities. ISCC Christine Nardini, Daniele Masotti, Sungroh Yoon, Enrico Macii, Michael D. Kuo, Giovanni De Micheli, Luca Benini
2006	—	`conf`	Nanoelectronics: Challenges and Opportunities. PATMOS Giovanni De Micheli
2006	—	`book`	Networks on chips - technology and tools. Luca Benini, Giovanni De Micheli
2006	C	`conf`	Reliability Support for On-Chip Memories Using Networks-on-Chip. ICCD Federico Angiolini, David Atienza, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2006	—	`conf`	Routing Aware Switch Hardware Customization for Networks on Chips. Nano-Net Paolo Meloni, Srinivasan Murali, Salvatore Carta, Massimo Camplani, Luigi Raffo, Giovanni De Micheli
2005	A	`conf`	A Complete Network-On-Chip Emulation Framework. DATE Nicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor
2005	—	`conf`	A novel approach for network on chip emulation. ISCAS (3) Nicolas Genko, David Atienza, Giovanni De Micheli, Luca Benini, Jose Manuel Mendias, Román Hermida, Francky Catthoor
2005	J	`jnl`	A robust self-calibrating transmission scheme for on-chip networks. IEEE Trans. Very Large Scale Integr. Syst. Frederic Worm, Paolo Ienne, Patrick Thiran, Giovanni De Micheli
2005	A	`conf`	An Application-Specific Design Methodology for STbus Crossbar Generation. DATE Srinivasan Murali, Giovanni De Micheli
2005	J	`jnl`	Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli
2005	J	`jnl`	Design, Synthesis, and Test of Networks on Chips. IEEE Des. Test Comput. Partha Pratim Pande, Cristian Grecu, André Ivanov, Resve A. Saleh, Giovanni De Micheli
2005	J	`jnl`	Discovering Coherent Biclusters from Gene Expression Data Using Zero-Suppressed Binary Decision Diagrams. IEEE ACM Trans. Comput. Biol. Bioinform. Sungroh Yoon, Christine Nardini, Luca Benini, Giovanni De Micheli
2005	J	`jnl`	Error control schemes for on-chip communication links: the energy-reliability tradeoff. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Davide Bertozzi, Luca Benini, Giovanni De Micheli
2005	—	`conf`	Exploration and Tuning of Custom NoC Topologies Using an FPGA-Based Framework. PARCO Nicolas Genko, David Atienza, Giovanni De Micheli
2005	J	`jnl`	Guest Editors' Introduction: The Network-on-Chip Paradigm in Practice and Research. IEEE Des. Test Comput. André Ivanov, Giovanni De Micheli
2005	J	`jnl`	IEEE Council for Electronic Design Automation: A new beginning. IEEE Des. Test Comput. Giovanni De Micheli, Al Dunlop
2005	—	`conf`	Mapping and physical planning of networks-on-chip architectures with quality-of-service guarantees. ASP-DAC Srinivasan Murali, Luca Benini, Giovanni De Micheli
2005	—	`ch.`	Network On-Chip Design for Gigascale Systems-on-Chip. The Industrial Information Technology Handbook Davide Bertozzi, Luca Benini, Giovanni De Micheli
2005	—	`ch.`	Network-on-Chip Design for Gigascale Systems-on-Chip. Embedded Systems Handbook Luca Benini, Davide Bertozzi, Giovanni De Micheli
2005	J	`jnl`	NoC Synthesis Flow for Customized Domain Specific Multiprocessor Systems-on-Chip. IEEE Trans. Parallel Distributed Syst. Davide Bertozzi, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, Giovanni De Micheli
2005	—	`conf`	Optimization of Reliability and Power Consumption in Systems on a Chip. PATMOS Tajana Simunic, Kresimir Mihic, Giovanni De Micheli
2005	—	`conf`	Performance driven reliable link design for networks on chips. ASP-DAC Rutuparna Tamhankar, Srinivasan Murali, Giovanni De Micheli
2005	—	`conf`	Plenary lecture [Second page is blank]. ECCTD Giovanni De Micheli
2005	—	`conf`	Prediction of regulatory modules comprising microRNAs and target genes. ECCB/JBI Sungroh Yoon, Giovanni De Micheli
2005	—	`conf`	Self-calibrating networks-on-chip. ISCAS (3) Frederic Worm, Paolo Ienne, Patrick Thiran, Giovanni De Micheli
2005	A	`conf`	xpipes Lite: A Synthesis Oriented Design Library For Networks on Chips. DATE Stergios Stergiou, Federico Angiolini, Salvatore Carta, Luigi Raffo, Davide Bertozzi, Giovanni De Micheli
2004	A	`conf`	Bandwidth-Constrained Mapping of Cores onto NoC Architectures. DATE Srinivasan Murali, Giovanni De Micheli
2004	—	`ch.`	Energy-Efficient Network-On-Chip Design. Ultra Low-Power Electronics and Design Davide Bertozzi, Luca Benini, Giovanni De Micheli
2004	C	`conf`	Enhanced pClustering and Its Applications to Gene Expression Data. BIBE Sungroh Yoon, Christine Nardini, Luca Benini, Giovanni De Micheli
2004	J	`jnl`	On-Chip Self-Calibrating Communication Techniques Robust to Electrical Parameter Variations. IEEE Des. Test Comput. Frederic Worm, Paolo Ienne, Patrick Thiran, Giovanni De Micheli
2004	J	`jnl`	Packetization and routing analysis of on-chip multiprocessor networks. J. Syst. Archit. Terry Tao Ye, Luca Benini, Giovanni De Micheli
2004	C	`conf`	Reliability and Power Management of Integrated Systems. DSD Kresimir Mihic, Tajana Simunic, Giovanni De Micheli
2004	A*	`conf`	Reliable communication in systems on chips. DAC Giovanni De Micheli
2004	A*	`conf`	SUNMAP: a tool for automatic topology selection and generation for NoCs. DAC Srinivasan Murali, Giovanni De Micheli
2004	J	`jnl`	Specification and analysis of power-managed systems. Proc. IEEE Alessandro Bogliolo, Luca Benini, Emanuele Lattanzi, Giovanni De Micheli
2004	A	`conf`	×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip. DATE Antoine Jalabert, Srinivasan Murali, Luca Benini, Giovanni De Micheli
2003	J	`jnl`	Application of symbolic computer algebra in high-level data-flow synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Armita Peymandoust, Giovanni De Micheli
2003	—	`conf`	Automatic Instruction Set Extension and Utilization for Embedded Processors. ASAP Armita Peymandoust, Laura Pozzi, Paolo Ienne, Giovanni De Micheli
2003	J	`jnl`	CASS Brings Publishing to Its DAC Partnership. IEEE Des. Test Comput. Giovanni De Micheli
2003	J	`jnl`	Complex instruction and software library mapping for embedded software using symbolic algebra. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Armita Peymandoust, Tajana Simunic, Giovanni De Micheli
2003	—	`ch.`	Energy-Reliability trade-Off for NoCs. Networks on Chip Davide Bertozzi, Luca Benini, Giovanni De Micheli
2003	—	`conf`	Heterogeneous Wireless Network Management. PACS Wajahat Qadeer, Tajana Simunic Rosing, John Ankcorn, Venky Krishnan, Giovanni De Micheli
2003	A	`conf`	Packetized On-Chip Interconnect Communication Analysis for MPSoC. DATE Terry Tao Ye, Luca Benini, Giovanni De Micheli
2003	—	`conf`	Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics. ASAP Terry Tao Ye, Giovanni De Micheli
2003	C	`conf`	Robust System Design with Uncertain Information. MEMOCODE Giovanni De Micheli
2002	—	`conf`	An Adaptive Low-Power Transmission Scheme for On-Chip Networks. ISSS Paolo Ienne, Patrick Thiran, Giovanni De Micheli, Frederic Worm
2002	A*	`conf`	Analysis of power consumption on switch fabrics in network routers. DAC Terry Tao Ye, Giovanni De Micheli, Luca Benini
2002	A*	`conf`	Complex library mapping for embedded software using symbolic algebra. DAC Armita Peymandoust, Giovanni De Micheli, Tajana Simunic
2002	A	`conf`	Contents provider-assisted dynamic voltage scaling for low energy multimedia applications. ISLPED Eui-Young Chung, Giovanni De Micheli, Luca Benini
2002	J	`jnl`	Dynamic Power Management for Nonstationary Service Requests. IEEE Trans. Computers Eui-Young Chung, Luca Benini, Alessandro Bogliolo, Yung-Hsiang Lu, Giovanni De Micheli
2002	J	`jnl`	Dynamic frequency scaling with buffer insertion for mixed workloads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
2002	A	`conf`	Low Power Embedded Software Optimization Using Symbolic Algebra. DATE Armita Peymandoust, Tajana Simunic, Giovanni De Micheli
2002	A	`conf`	Low Power Error Resilient Encoding for On-Chip Data Buses. DATE Davide Bertozzi, Luca Benini, Giovanni De Micheli
2002	A	`conf`	Networks on Chip: A New Paradigm for Systems on Chip Design. DATE Giovanni De Micheli, Luca Benini
2002	J	`jnl`	Networks on Chips: A New SoC Paradigm. Computer Luca Benini, Giovanni De Micheli
2002	—	`conf`	Physical synthesis for ASIC datapath circuits. ISCAS (3) Terry Tao Ye, Samit Chaudhuri, Fei Huang, Hamid Savoj, Giovanni De Micheli
2002	J	`jnl`	Power-aware operating systems for interactive systems. IEEE Trans. Very Large Scale Integr. Syst. Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
2002	—	`book`	Readings in hardware / software co-design. Giovanni De Micheli, Rolf Ernst, Wayne H. Wolf
2002	J	`jnl`	Value-sensitive automatic code specialization for embedded software. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Eui-Young Chung, Luca Benini, Giovanni De Micheli, Gabriele Luculli, Marco Carilli
2001	A	`conf`	Automatic source code specialization for energy reduction. ISLPED Eui-Young Chung, Luca Benini, Giovanni De Micheli
2001	—	`conf`	Cache-efficient memory layout of aggregate data structures. ISSS Preeti Ranjan Panda, Luc Séméria, Giovanni De Micheli
2001	J	`jnl`	Comparing System-Level Power Management Policies. IEEE Des. Test Comput. Yung-Hsiang Lu, Giovanni De Micheli
2001	A	`conf`	Component selection and matching for IP-based design. DATE Ting Zhang, Luca Benini, Giovanni De Micheli
2001	A*	`conf`	Dynamic Voltage Scaling and Power Management for Portable Systems. DAC Tajana Simunic, Luca Benini, Andrea Acquaviva, Peter W. Glynn, Giovanni De Micheli
2001	J	`jnl`	Energy-efficient design of battery-powered embedded systems. IEEE Trans. Very Large Scale Integr. Syst. Tajana Simunic, Luca Benini, Giovanni De Micheli
2001	J	`jnl`	Event-driven power management. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tajana Simunic, Luca Benini, Peter W. Glynn, Giovanni De Micheli
2001	J	`jnl`	Polynomial circuit models for component matching in high-level synthesis. IEEE Trans. Very Large Scale Integr. Syst. James Smith, Giovanni De Micheli
2001	—	`conf`	Powering Networks on Chips: Energy-Efficient and Reliable Interconnect Design for SoCs. ISSS Luca Benini, Giovanni De Micheli
2001	J	`jnl`	Resolution, optimization, and encoding of pointer variables for thebehavioral synthesis from C. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luc Séméria, Giovanni De Micheli
2001	—	`conf`	Source code transformation based on software cost analysis. ISSS Eui-Young Chung, Luca Benini, Giovanni De Micheli
2001	A	`conf`	Symbolic Algebra and Timing Driven Data-flow Synthesis. ICCAD Armita Peymandoust, Giovanni De Micheli
2001	J	`jnl`	Synthesis of hardware models in C with pointers and complex data structures. IEEE Trans. Very Large Scale Integr. Syst. Luc Séméria, Koichi Sato, Giovanni De Micheli
2001	J	`jnl`	Synthesis of power-managed sequential components based oncomputational kernel extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
2001	A*	`conf`	Using Symbolic Algebra in Algorithmic Level DSP Synthesis. DAC Armita Peymandoust, Giovanni De Micheli
2000	J	`jnl`	A multilevel engine for fast power simulation of realistic inputstreams. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000	J	`jnl`	A survey of design techniques for system-level dynamic power management. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
2000	A	`conf`	Data Path Placement with Regularity. ICCAD Terry Tao Ye, Giovanni De Micheli
2000	A	`conf`	Do our low-power tools have enough horse power? (panel session) (title only). ISLPED Giovanni De Micheli, Tony Correale, Pietro Erratico, Srini Raghvendra, Hugo De Man, Jerry Frankil, Vivek Tiwari
2000	A	`conf`	Dynamic Power Management of Laptop Hard Disk. DATE Tajana Simunic, Luca Benini, Peter W. Glynn, Giovanni De Micheli
2000	A*	`conf`	Dynamic power management for portable systems. MobiCom Tajana Simunic, Luca Benini, Peter W. Glynn, Giovanni De Micheli
2000	A	`conf`	Energy efficient design of portable wireless systems. ISLPED Tajana Simunic, Haris Vikalo, Peter W. Glynn, Giovanni De Micheli
2000	J	`jnl`	Glitch power minimization by selective gate freezing. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000	J	`jnl`	Hardware/Software Co-Design of Run-Time Schedulers for Real-Time Systems. Des. Autom. Embed. Syst. Vincent John Mooney III, Giovanni De Micheli
2000	—	`conf`	Low-power task scheduling for multiple devices. CODES Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
2000	A	`conf`	Operating-system directed power reduction. ISLPED Yung-Hsiang Lu, Luca Benini, Giovanni De Micheli
2000	A*	`ed.`	Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000. DAC Giovanni De Micheli
2000	A	`conf`	Quantitative Comparison of Power Management Algorithms. DATE Yung-Hsiang Lu, Eui-Young Chung, Tajana Simunic, Giovanni De Micheli, Luca Benini
2000	J	`jnl`	Regression-based RTL power modeling. ACM Trans. Design Autom. Electr. Syst. Alessandro Bogliolo, Luca Benini, Giovanni De Micheli
2000	—	`conf`	Requester-Aware Power Reduction. ISSS Yung-Hsiang Lu, Giovanni De Micheli, Luca Benini
2000	A	`conf`	Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C. DATE Luc Séméria, Koichi Sato, Giovanni De Micheli
2000	—	`conf`	Source Code Optimization and Profiling of Energy Consumption in Embedded Systems. ISSS Tajana Simunic, Giovanni De Micheli, Luca Benini, Mat Hans
2000	J	`jnl`	Synthesis of low-power selectively-clocked systems from high-level specification. ACM Trans. Design Autom. Electr. Syst. Luca Benini, Giovanni De Micheli
2000	J	`jnl`	System-level power optimization: techniques and tools. ACM Trans. Design Autom. Electr. Syst. Luca Benini, Giovanni De Micheli
1999	—	`conf`	Adaptive Hard Disk Power Management on Personal Computers. Great Lakes Symposium on VLSI Yung-Hsiang Lu, Giovanni De Micheli
1999	J	`jnl`	Automatic Synthesis of Large Telescopic Units Based on Near-Minimum Timed Supersetting. IEEE Trans. Computers Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1999	A*	`conf`	Cycle-Accurate Simulation of Energy Consumption in Embedded Systems. DAC Tajana Simunic, Luca Benini, Giovanni De Micheli
1999	A	`conf`	Dynamic Power Management for non-stationary service requests. DATE Eui-Young Chung, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1999	A	`conf`	Dynamic power management using adaptive learning tree. ICCAD Eui-Young Chung, Luca Benini, Giovanni De Micheli
1999	A	`conf`	Efficient switching activity computation during high-level synthesis of control-dominated designs. ISLPED Alessandro Bogliolo, Luca Benini, Bruno Riccò, Giovanni De Micheli
1999	A	`conf`	Energy-efficient design of battery-powered embedded systems. ISLPED Tajana Simunic, Luca Benini, Giovanni De Micheli
1999	—	`conf`	Event-Driven Power Management of Portable Systems. ISSS Tajana Simunic, Giovanni De Micheli, Luca Benini
1999	A	`conf`	Glitch Power Minimization by Gate Freezing. DATE Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999	A	`conf`	Hardware Synthesis from C/C++ Models. DATE Giovanni De Micheli
1999	A*	`conf`	Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms. DAC Luca Benini, Giovanni De Micheli, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1999	J	`jnl`	Policy optimization for dynamic power management. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Alessandro Bogliolo, Giuseppe A. Paleologo, Giovanni De Micheli
1999	A	`conf`	Polynomial Methods for Allocating Complex Components. DATE James Smith, Giovanni De Micheli
1999	J	`jnl`	Reducing switching activity on datapath buses with control-signal gating. IEEE J. Solid State Circuits Hema Kapadia, Luca Benini, Giovanni De Micheli
1999	—	`conf`	Software controlled power management. CODES Yung-Hsiang Lu, Tajana Simunic, Giovanni De Micheli
1999	J	`jnl`	Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers. ACM Trans. Design Autom. Electr. Syst. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999	A	`conf`	System-level power optimization: techniques and tools. ISLPED Luca Benini, Giovanni De Micheli
1998	B	`conf`	Acceleration of Satisfiability Algorithms by Reconfigurable Hardware. FPL Marco Platzner, Giovanni De Micheli
1998	A	`conf`	Address Bus Encoding Techniques for System-Level Power Optimization. DATE Luca Benini, Giovanni De Micheli, Donatella Sciuto, Enrico Macii, Cristina Silvano
1998	A*	`conf`	Automated Composition of Hardware Components. DAC James Smith, Giovanni De Micheli
1998	A	`conf`	Characterization-Free Behavioral Power Modeling. DATE Alessandro Bogliolo, Luca Benini, Giovanni De Micheli
1998	A*	`conf`	Computational Kernels and their Application to Sequential Power Optimization. DAC Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1998	—	`book`	Dynamic power management - design techniques and CAD tools. Luca Benini, Giovanni De Micheli
1998	A	`conf`	Dynamic power management of electronic systems. ICCAD Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1998	A	`conf`	Finding all simple disjunctive decompositions using irredundant sum-of-products forms. ICCAD Shin-ichi Minato, Giovanni De Micheli
1998	—	`conf`	Hardware-Softw are Run-Time Systems and Robotics: A Case Study Vincent John Mooney III. EUROMICRO Diego C. Ruspini, Oussama Khatib, Giovanni De Micheli
1998	J	`jnl`	Iterative remapping for logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Patrick Vuillod, Giovanni De Micheli
1998	A*	`conf`	Policy Optimization for Dynamic Power Management. DAC Giuseppe A. Paleologo, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1998	A	`conf`	Polynomial methods for component matching and verification. ICCAD James Smith, Giovanni De Micheli
1998	J	`jnl`	Power optimization of core-based systems by address bus encoding. IEEE Trans. Very Large Scale Integr. Syst. Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Stefano Quer
1998	—	`conf`	Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. Great Lakes Symposium on VLSI Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino
1998	—	`conf`	Reducing switching activity on datapath buses with control-signal gating. CICC Hema Kapadia, Giovanni De Micheli, Luca Benini
1998	J	`jnl`	Regression Models for Behavioral Power Estimation. Integr. Comput. Aided Eng. Luca Benini, Alessandro Bogliolo, Michele Favalli, Giovanni De Micheli
1998	A	`conf`	SpC: synthesis of pointers in C: application of pointer analysis to the behavioral synthesis from C. ICCAD Luc Séméria, Giovanni De Micheli
1998	J	`jnl`	Telescopic units: a new paradigm for performance optimization of VLSI designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Enrico Macii, Massimo Poncino, Giovanni De Micheli
1998	—	`conf`	Timed Supersetting and the Synthesis of Telescopic Units. Great Lakes Symposium on VLSI Luca Benini, Giovanni De Micheli, Antonio Lioy, Enrico Macii, Giuseppe Odasso, Massimo Poncino
1997	J	`jnl`	A survey of Boolean matching techniques for library binding. ACM Trans. Design Autom. Electr. Syst. Luca Benini, Giovanni De Micheli
1997	—	`conf`	Adaptive least mean square behavioral power modeling. ED&TC Alessandro Bogliolo, Luca Benini, Giovanni De Micheli
1997	—	`conf`	Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems. Great Lakes Symposium on VLSI Luca Benini, Giovanni De Micheli, Enrico Macii, Donatella Sciuto, Cristina Silvano
1997	J	`jnl`	Clock Skew Optimization for Peak Current Reduction. J. VLSI Signal Process. Luca Benini, Patrick Vuillod, Alessandro Bogliolo, Giovanni De Micheli
1997	J	`jnl`	Constrained software synthesis for embedded applications. J. Syst. Archit. Rajesh K. Gupta, Giovanni De Micheli
1997	A	`conf`	Fast power estimation for deterministic input streams. ICCAD Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1997	J	`jnl`	Gate-level power and current simulation of CMOS integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò
1997	A	`conf`	Generalized matching from theory to application. ICCAD Patrick Vuillod, Luca Benini, Giovanni De Micheli
1997	A*	`ed.`	Proceedings of the 34st Conference on Design Automation, Anaheim, California, USA, Anaheim Convention Center, June 9-13, 1997. DAC Ellen J. Yoffa, Giovanni De Micheli, Jan M. Rabaey
1997	A	`conf`	Re-mapping for low power under tight timing constraints. ISLPED Patrick Vuillod, Luca Benini, Giovanni De Micheli
1997	A	`conf`	Real time analysis and priority scheduler generation for hardware-software systems with a synthesized run-time system. ICCAD Vincent John Mooney III, Giovanni De Micheli
1997	J	`jnl`	Specification and analysis of timing constraints for embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rajesh K. Gupta, Giovanni De Micheli
1997	—	`conf`	Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks. ED&TC Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1997	A	`conf`	System-level power optimization of special purpose applications: the beach solution. ISLPED Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Stefano Quer
1996	J	`jnl`	A co-synthesis approach to embedded system design automation. Des. Autom. Embed. Syst. Rajesh K. Gupta, Giovanni De Micheli
1996	J	`jnl`	Analysis and synthesis of concurrent digital circuits using control-flow expressions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Claudionor José Nunes Coelho Jr., Giovanni De Micheli
1996	J	`jnl`	Automatic synthesis of low-power gated-clock finite-state machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Luca Benini, Giovanni De Micheli
1996	A	`conf`	Clock skew optimization for peak current reduction. ISLPED Patrick Vuillod, Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1996	—	`conf`	Design for Testability of Gated-Clock FSMs. ED&TC Michele Favalli, Luca Benini, Giovanni De Micheli
1996	C	`conf`	Distributed EDA Tool Integration: The PPP Paradigm. ICCD Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1996	A	`conf`	Gate-level current waveform simulation of CMOS integrated circuits. ISLPED Alessandro Bogliolo, Luca Benini, Giovanni De Micheli, Bruno Riccò
1996	J	`jnl`	Scheduling and control generation with environmental constraints based on automata representations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jerry Chih-Yuan Yang, Giovanni De Micheli, Maurizio Damiani
1996	—	`conf`	Synthesis from mixed specifications. EURO-DAC Giovanni De Micheli, Vincent John Mooney III, Claudionor Nunes Coelho, Toshiyuki Sakamoto
1996	—	`conf`	Synthesis of Low-Power Selectively-Clocked Systems from High-Level Specification. ISSS Luca Benini, Patrick Vuillod, Claudionor José Nunes Coelho Jr., Giovanni De Micheli
1995	J	`jnl`	Optimization of combinational logic circuits based on compatible gates. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli
1995	J	`jnl`	State assignment for low power dissipation. IEEE J. Solid State Circuits Luca Benini, Giovanni De Micheli
1995	—	`conf`	Transformation and synthesis of FSMs for low-power gated-clock implementation. ISLPD Luca Benini, Giovanni De Micheli
1994	C	`conf`	A Synthesis Framework Based on Trace and Automata Theory. ISCAS Jérôme Fron, Jerry Chih-Yuan Yang, Maurizio Damiani, Giovanni De Micheli
1994	J	`jnl`	Computer-aided hardware-software codesign. IEEE Micro Giovanni De Micheli
1994	—	`conf`	Constrained software generation for hardware-software systems. CODES Rajesh K. Gupta, Giovanni De Micheli
1994	A	`conf`	Decomposition methods for library binding of speed-independent asynchronous designs. ICCAD Polly Siegel, Giovanni De Micheli
1994	A	`conf`	Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints. ICCAD Claudionor José Nunes Coelho Jr., Giovanni De Micheli
1994	J	`jnl`	Program Implementation Schemes for Hardware-Software Systems. Computer Rajesh K. Gupta, Claudionor José Nunes Coelho Jr., Giovanni De Micheli
1994	—	`conf`	Redesigning hardware-software systems. CODES Claudionor José Nunes Coelho Jr., Jerry Chih-Yuan Yang, Vincent John Mooney III, Giovanni De Micheli
1994	J	`jnl`	Saving Power by Synthesizing Gated Clocks for Sequential Circuits. IEEE Des. Test Comput. Luca Benini, Polly Siegel, Giovanni De Micheli
1994	—	`conf`	Scheduling with Environmental Constraints based on Automata Representations. EDAC-ETC-EUROASIC Jerry Chih-Yuan Yang, Giovanni De Micheli, Maurizio Damiani
1993	J	`jnl`	Algorithms for technology mapping based on binary decision diagrams and on Boolean operations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Frédéric Mailhot, Giovanni De Micheli
1993	A*	`conf`	Automatic Technology Mapping for Generalized Fundamental-Mode Asynchronous Designs. DAC Polly Siegel, Giovanni De Micheli, David L. Dill
1993	J	`jnl`	Designing high-performance digital circuits using wave pipelining: algorithms and practical experiences. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Derek C. Wong, Giovanni De Micheli, Michael J. Flynn
1993	J	`jnl`	Don't care set specifications in combinational and synchronous logic circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Maurizio Damiani, Giovanni De Micheli
1993	J	`jnl`	Hardware-Software Cosynthesis for Digital Systems. IEEE Des. Test Comput. Rajesh K. Gupta, Giovanni De Micheli
1993	J	`jnl`	High-Level Synthesis of Digital Circuits. Adv. Comput. Giovanni De Micheli
1993	J	`jnl`	Interface optimization for concurrent systems under timing constraints. IEEE Trans. Very Large Scale Integr. Syst. Dave Filo, David C. Ku, Claudionor José Nunes Coelho Jr., Giovanni De Micheli
1993	A	`conf`	Modeling hierarchical combinational circuits. ICCAD Jerry R. Burch, David L. Dill, Elizabeth Wolf, Giovanni De Micheli
1993	A*	`conf`	Optimization of Combinational Logic Circuits Based on Compatible Gates. DAC Maurizio Damiani, Jerry Chih-Yuan Yang, Giovanni De Micheli
1992	J	`jnl`	A bipolar population counter using wave pipelining to achieve 2.5* normal clock frequency. IEEE J. Solid State Circuits Derek C. Wong, Giovanni De Micheli, Michael J. Flynn, Robert E. Huston
1992	J	`jnl`	Optimizing the control-unit through the resynchronization of operations. Integr. David Filo, David C. Ku, Giovanni De Micheli
1992	A*	`conf`	Recurrence Equations and the Optimization of Synchronous Logic Circuits. DAC Maurizio Damiani, Giovanni De Micheli
1992	J	`jnl`	Relative scheduling under timing constraints: algorithms for high-level synthesis of digital circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David C. Ku, Giovanni De Micheli
1992	A*	`conf`	Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components. DAC Rajesh K. Gupta, Claudionor José Nunes Coelho Jr., Giovanni De Micheli
1991	J	`jnl`	Circuit and architecture trade-offs for high-speed multiplication. IEEE J. Solid State Circuits Paul J. Song, Giovanni De Micheli
1991	J	`jnl`	Constrained resource sharing and conflict resolution in Hebe. Integr. David C. Ku, Giovanni De Micheli
1991	A*	`conf`	Control Optimization Based on Resynchronization of Operations. DAC David C. Ku, Dave Filo, Giovanni De Micheli
1991	J	`jnl`	Optimal synthesis of control logic from behavioral specifications. Integr. David C. Ku, Giovanni De Micheli
1991	J	`jnl`	Synchronous logic synthesis: algorithms for cycle-time minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli
1991	A*	`conf`	Technology Mapping for Electrically Programmable Gate Arrays. DAC Silvia Ercolani, Giovanni De Micheli
1991	—	`conf`	Technology mapping for a two-output RAM-based field programmable gate array. EURO-DAC David Filo, Jerry Chih-Yuan Yang, Frédéric Mailhot, Giovanni De Micheli
1990	J	`jnl`	Guest Editorial: High-Level Synthesis of Digital Circuits. IEEE Des. Test Comput. Giovanni De Micheli
1990	A	`conf`	Observability Don't Care Sets and Boolean Relations. ICCAD Maurizio Damiani, Giovanni De Micheli
1990	A	`conf`	Partitioning of Functional Models of Synchronous Digital Systems. ICCAD Rajesh K. Gupta, Giovanni De Micheli
1990	A*	`conf`	Relative Scheduling Under Timing Constraints. DAC David C. Ku, Giovanni De Micheli
1990	—	`conf`	Technology mapping using boolean matching and don't care sets. EURO-DAC Frédéric Mailhot, Giovanni De Micheli
1990	J	`jnl`	The Olympus Synthesis System. IEEE Des. Test Comput. Giovanni De Micheli, David C. Ku, Frédéric Mailhot, Thomas K. Truong
1989	A	`conf`	Inserting active delay elements to achieve wave pipelining. ICCAD Derek C. Wong, Giovanni De Micheli, Michael J. Flynn
1988	C	`conf`	Approaching a nanosecond: a 32 bit adder. ICCD Gary Bewick, Paul Song, Giovanni De Micheli, Michael J. Flynn
1988	C	`conf`	Automatic layout and optimization of static CMOS cells. ICCD Frédéric Mailhot, Giovanni De Micheli
1988	A*	`conf`	HERCULES - a System for High-Level Synthesis. DAC Giovanni De Micheli, David C. Ku
1987	J	`jnl`	Performance-Oriented Synthesis of Large-Scale Domino CMOS Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli
1986	J	`jnl`	Correction to "Optimal State Assignment for Finite State Machines". IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
1986	J	`jnl`	Symbolic Design of Combinational and Sequential Logic Circuits Implemented by Two-Level Logic Macros. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli
1985	J	`jnl`	Optimal State Assignment for Finite State Machines. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
1984	J	`jnl`	Correction to "Multiple Constrained Folding of Programmable Logic Arrays: Theory and Applications". IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli, Alberto L. Sangiovanni-Vincentelli
1983	J	`jnl`	Multiple Constrained Folding of Programmable Logic Arrays: Theory and Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli, Alberto L. Sangiovanni-Vincentelli
1983	A*	`conf`	PLEASURE: a computer program for simple/multiple constrained/unconstrained folding of Programmable Logic Arrays. DAC Giovanni De Micheli, Alberto L. Sangiovanni-Vincentelli
1983	J	`jnl`	Symmetric Displacement Algorithms for the Timing Analysis of Large Scale Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Giovanni De Micheli, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli