Giovanni Causapruno

13 papers C 1Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2019 J jnl
Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms.
Integr.
Mario Cofano, Marco Vacca, Giulia Santoro, Giovanni Causapruno, Giovanna Turvani, Mariagrazia Graziano
2018 J jnl
Parallel and Serial Computation in Nanomagnet Logic: An Overview.
IEEE Trans. Very Large Scale Integr. Syst.
Davide Giri, Giovanni Causapruno, Fabrizio Riente
2016 — conf
A Reconfigurable Array Architecture for NML.
ISVLSI
Giovanni Causapruno, Umberto Garlando, Fabrizio Cairo, Maurizio Zamboni, Mariagrazia Graziano
2016 — —
Architectural Solutions for NanoMagnet Logic.
Giovanni Causapruno
2016 J jnl
Reconfigurable Systolic Array: From Architecture to Physical Design for NML.
IEEE Trans. Very Large Scale Integr. Syst.
Giovanni Causapruno, Fabrizio Riente, Giovanna Turvani, Marco Vacca, Massimo Ruo Roch, Maurizio Zamboni, Mariagrazia Graziano
2015 J jnl
Interleaving in Systolic-Arrays: A Throughput Breakthrough.
IEEE Trans. Computers
Giovanni Causapruno, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni
2015 C conf
Logic-in-Memory architecture made real.
ISCAS
D. Pala, Giovanni Causapruno, Marco Vacca, Fabrizio Riente, Giovanna Turvani, Mariagrazia Graziano, Maurizio Zamboni
2015 — conf
Logic-in-Memory: A Nano Magnet Logic Implementation.
ISVLSI
Mario Cofano, Giulia Santoro, Marco Vacca, D. Pala, Giovanni Causapruno, Fabrizio Cairo, Fabrizio Riente, Giovanna Turvani, Massimo Ruo Roch, Mariagrazia Graziano, Maurizio Zamboni
2015 J jnl
Protein Alignment Systolic Array Throughput Optimization.
IEEE Trans. Very Large Scale Integr. Syst.
Giovanni Causapruno, Gianvito Urgese, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni
2014 — conf
A Framework for Network-On-Chip Comparison Based on OpenSPARC T2 Processor.
ApplePies
Giovanni Causapruno, A. Audero, Sergio Tota, Massimo Ruo Roch
2014 — conf
A standard cell approach for MagnetoElastic NML circuits.
NANOARCH
Davide Giri, Marco Vacca, Giovanni Causapruno, Wenjing Rao, Mariagrazia Graziano, Maurizio Zamboni
2014 — conf
High Speed VLSI Architecture for Finding the First W Maximum/Minimum Values.
ApplePies
Guoping Xiao, Waqar Ahmad, Syed Azhar Ali Zaidi, Massimo Ruo Roch, Giovanni Causapruno
2014 — ch.
NanoMagnet Logic: An Architectural Level Overview.
Field-Coupled Nanocomputing
Marco Vacca, Mariagrazia Graziano, Juanchi Wang, Fabrizio Cairo, Giovanni Causapruno, Gianvito Urgese, Andrea Biroli, Maurizio Zamboni