Giorgiomaria Cicero

15 papers A* 1A 3B 1Journal 7Unranked 3
YearRankTypeTitle / Venue / Authors
2026 J jnl
The use of the Simplex architecture to enhance safety in deep-learning-powered autonomous systems.
Eng. Appl. Artif. Intell.
Federico Nesti, Niko Salamini, Mauro Marinoni, Giorgiomaria Cicero, Gabriele Serra, Alessandro Biondi, Giorgio C. Buttazzo
2025 A conf
A Design Flow to Securely Isolate FPGA Bus Transactions in Heterogeneous SoCs.
RTAS
Niko Salamini, Sara Alonso Salazar, Gabriele Serra, Giorgiomaria Cicero, Pietro Fara, Federico Aromolo, Alessandro Biondi
2025 — conf
Integrating the Simplex Architecture to Enhance Safety in Deep Learning Autonomous Systems.
ICCPS
Niko Salamini, Federico Nesti, Mauro Marinoni, Giorgiomaria Cicero, Gabriele Serra, Alessandro Biondi, Giorgio C. Buttazzo
2025 J jnl
The Use of the Simplex Architecture to Enhance Safety in Deep-Learning-Powered Autonomous Systems.
CoRR
Federico Nesti, Niko Salamini, Mauro Marinoni, Giorgiomaria Cicero, Gabriele Serra, Alessandro Biondi, Giorgio C. Buttazzo
2023 J jnl
Supporting AI-powered real-time cyber-physical systems on heterogeneous platforms via hypervisor technology.
Real Time Syst.
Edoardo Cittadini, Mauro Marinoni, Alessandro Biondi, Giorgiomaria Cicero, Giorgio C. Buttazzo
2022 J jnl
An I/O Virtualization Framework With I/O-Related Memory Contention Control for Real-Time Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Niccolò Borgioli, Matteo Zini, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo
2022 A conf
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms.
RTAS
Gabriele Serra, Pietro Fara, Giorgiomaria Cicero, Francesco Restuccia, Alessandro Biondi
2022 J jnl
Profiling and controlling I/O-related memory contention in COTS heterogeneous platforms.
Softw. Pract. Exp.
Matteo Zini, Giorgiomaria Cicero, Daniel Casini, Alessandro Biondi
2021 B conf
A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving.
RTCSA
Luca Belluardo, Andrea Stevanato, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo
2021 A conf
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems.
RTAS
Daniel Casini, Alessandro Biondi, Giorgiomaria Cicero, Giorgio C. Buttazzo
2021 J jnl
SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms.
IEEE Access
Alessandro Biondi, Daniel Casini, Giorgiomaria Cicero, Niccolò Borgioli, Giorgio C. Buttazzo, Gaetano Patti, Luca Leonardi, Lucia Lo Bello, Marco Solieri, Paolo Burgio, Ignacio Sanudo Olmedo, Angelo Ruocco, Luca Palazzi, Marko Bertogna, Alessandro Cilardo, Nicola Mazzocca, Antonino Mazzeo
2020 J jnl
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems.
IEEE Embed. Syst. Lett.
Alessandro Biondi, Federico Nesti, Giorgiomaria Cicero, Daniel Casini, Giorgio C. Buttazzo
2020 A* conf
AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC.
DAC
Francesco Restuccia, Alessandro Biondi, Mauro Marinoni, Giorgiomaria Cicero, Giorgio C. Buttazzo
2019 — conf
Towards the Hypervision of Hardware-based Control Flow Integrity for Arm Platforms.
ITASEC
Giulia Ferri, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo
2018 — conf
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone.
ICIT
Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo, Anup Patel