Giorgio Di Natale

227 papers A 24B 26C 45Misc 5Journal 60Unranked 65

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Automatic Assertion Mining in Assertion-Based Verification: Techniques, Challenges, and Future Directions. CoRR Mohammad Reza Heidari Iman, Giorgio Di Natale, Katell Morin-Allory
2026	J	`jnl`	On the Evaluation of FPGA-Based Physical Unclonable Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Daniele Lombardi, Mario Barbareschi, Valentina Casola, Elena-Ioana Vatajelu, Giorgio Di Natale
2025	C	`conf`	A Fuzzy Logic-Based System for Detecting Trustable Physical Unclonable Functions. IOLTS Mohammad Reza Heidari Iman, Sergio Vinagrero Gutierrez, Elena-Ioana Vatajelu, Giorgio Di Natale
2025	C	`conf`	A Survey on Automatic Assertion Miners. DDECS Mohammad Reza Heidari Iman, Giorgio Di Natale, Katell Morin-Allory
2025	C	`conf`	An Innovative Data Mining Technique for Automatic Anomaly Detection in Physical Unclonable Functions. DDECS Mohammad Reza Heidari Iman, Sergio Vinagrero Gutierrez, Elena-Ioana Vatajelu, Giorgio Di Natale
2025	J	`jnl`	Countermeasures Against Fault Injection Attacks in Processors: A Review. Inf. Roua Boulifa, Giorgio Di Natale, Paolo Maistri
2025	B	`conf`	Early Result Capture: Racing Conditions in Pipeline due to Clock Glitches. ETS Roua Boulifa, Paolo Maistri, Giorgio Di Natale
2025	J	`jnl`	Enhancing DFT Security in Chiplet-Based Systems With Encryption and Integrity Checking. IEEE J. Emerg. Sel. Topics Circuits Syst. Juan Suzano, Anthony Philippe, Fady Abouzeid, Giorgio Di Natale, Philippe Roche
2025	B	`conf`	European Test Symposium Teams: an Anniversary Snapshot. ETS Maksim Jenihhin, Jaan Raik, Artur Jutman, Natalia Cherezova, Raimund Ubar, Liviu Miclea, Szilárd Enyedi, I. Stefan, Ovidiu Stan, Cosmina Corches, Z. Peng, Petru Eles, Rolf Drechsler, S. Eggersglüß, Görschwin Fey, Andreas Glowatz, Daniel Tille, Georges G. E. Gielen, Anthony Coyette, Wim Dobbelaere, Ronny Vanhooren, P.-Y. Chuang, Erik Jan Marinissen, Giorgio Di Natale, M. Barragan, Paolo Maistri, S. Mir, Vatajelu I. Vatajelu, Paolo Bernardi, S. Di Carlo, Paolo Prinetto, Matteo Sonza Reorda, Massimo Violante, Haralampos-G. Stratigopoulos, M. K. Michael, Stelios Neophytou, Stavros Hadjitheophanous, Kyriakos Christou, M. Skitsas, Alberto Bosio, Bastien Deveautour, P. Girard, Marcello Traiola, Arnaud Virazel, F. Fernandes Dos Santos, Angeliki Kritikakou, Gioele Casagranda, Marzio Vallero, Flavio Vella, Paolo Rech, Letícia Maria Bolzani Poehls, Milos Krstic, Marko S. Andjelkovic, F. Vargas, Grigor Tshagharyan, Gurgen Harutyunyan, Valery A. Vardanian, Samvel K. Shoukourian, Yervant Zorian, Jennifer Dworak, Kundan Nepal, Theodore W. Manikas, Mottaqiallah Taouil, Moritz Fieback, Anteneh Gebregiorgis, Rajendra Bishnoi, Said Hamdioui, Abhijit Chatterjee, A. Saha, Suhasini Komarraju, K. Ma, Chandramouli N. Amarnath, Mehdi Baradaran Tahoori, Mahta Mayahinia, Maryam Rajabalipanah, Katayoon Basharkhah, N. Nosrati, Zahra Jahanpeima, Zain Navabi, Hans-Joachim Wunderlich, Sybille Hellebrand
2025	—	`conf`	Improving RO-PUFs on FPGAs: A Filtering Approach for Improved Reliability and Entropy. ATS Vasilii Kulagin, Giorgio Di Natale, Elena-Ioana Vatajelu
2025	A	`conf`	Improving Software Reliability with Rust: Implementation for Enhanced Control Flow Checking Methods. DATE Jacopo Sini, Mohammadreza Amel Solouki, Massimo Violante, Giorgio Di Natale
2025	—	`conf`	Laser Fault Injection on RO-Based PUFs Implemented on FPGA. DFT Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, Jean-Max Dutertre, David Hély, Vincent Beroulle, Giorgio Di Natale
2025	A	`conf`	Late Breaking Results: Automatic Anomaly Detection Method in Physical Unclonable Functions using Data Mining Techniques. DATE Mohammad Reza Heidari Iman, Sergio Vinagrero Gutierrez, Elena-Ioana Vatajelu, Giorgio Di Natale
2025	B	`conf`	Optimizing RO-PUFs: A Filtering Approach to Reliability and Entropy Trade-offs. ETS Vasilii Kulagin, Giorgio Di Natale, Elena-Ioana Vatajelu
2025	B	`conf`	Physical Unclonable Functions (PUFs): Foundations, Evaluation, and Testing for Secure Hardware Systems. ETS Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2025	C	`conf`	Pulsed ElectroMagnetic Fault Injection Attack on a Time Measurement-based Arbiter-PUF. DSD Azzadine Thajte, Sami El Amraoui, Paolo Maistri, Régis Leveugle, Giorgio Di Natale, Laurent Fesquet
2025	C	`conf`	Real-Time Fault Analysis in RISC-V Processors: A Case Study Using the Internal State Monitor. IOLTS Roua Boulifa, Yongxin Sun, Giorgio Di Natale, Paolo Maistri
2025	B	`conf`	Reliability Under Stress: The Impact of Localized Aging on RO-PUF Architectures in FPGAs. ETS Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, David Hély, Vincent Beroulle, Giorgio Di Natale
2025	—	`conf`	Special Session Paper: Application of Functional Verification Techniques in Hardware Trust. DFT Mohammad Reza Heidari Iman, Rolf Drechsler, Chandan Kumar Jha, Ali Azarpeyvand, Tara Ghasempouri, Sharjeel Imtiaz, Jaan Raik, Samuele Germiniani, Daniele Nicoletti, Graziano Pravadelli, Giorgio Di Natale
2025	C	`conf`	TIMA-PUF: Time Measurement Based Arbiter PUF. IOLTS Azzadine Thajte, Laurent Fesquet, Giorgio Di Natale
2024	—	`conf`	Autonomous FPGA Reconfigurability in Embedded Systems. EWDTS Hugo Boulissière, Adrien Prost-Boucle, Elena-Ioana Vatajelu, Giorgio Di Natale
2024	B	`conf`	IEEE 1838 compliant scan encryption and integrity for 2.5/3D ICs. ETS Juan Suzano, Antoine Chastand, Emanuele Valea, Giorgio Di Natale, Anthony Philippe, Fady Abouzeid, Philippe Roche
2024	—	`conf`	Internal State Monitoring in RISC-V Microarchitectures for Security Purpose. LATS Roua Boulifa, Giorgio Di Natale, Paolo Maistri
2024	B	`conf`	Modeling Thermal Effects For Biasing PUFs. ETS Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, David Hély, Vincent Beroulle, Giorgio Di Natale
2024	—	`conf`	Non-Invasive Attack on Ring Oscillator-Based PUFs Through Localized X-Ray Irradiation. HOST Nasr-Eddine Ouldei Tebina, Aghiles Douadi, Luc Salvo, Vincent Beroulle, Nacer-Eddine Zergainoh, Guillaume Hubert, Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Maistri
2024	J	`jnl`	On Hardware Security and Trust for Chiplet-Based 2.5D and 3D ICs: Challenges and Innovations. IEEE Access Juan Suzano, Fady Abouzeid, Giorgio Di Natale, Anthony Philippe, Philippe Roche
2024	J	`jnl`	On the Relation Between Reliability and Entropy in Physical Unclonable Functions. IEEE Des. Test Vasilii Kulagin, Sergio Vinagrero Gutierrez, Tobias Kilian, Daniel Tille, Ulf Schlichtmann, Giorgio Di Natale, Elena-Ioana Vatajelu
2024	A	`conf`	Security Layers and Related Services within the Horizon Europe NEUROPULS Project. DATE Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2024	J	`jnl`	Side Channel and Fault Analyses on Memristor-Based Logic In-Memory. IEEE Des. Test Pietro Inglese, Elena-Ioana Vatajelu, Giorgio Di Natale
2023	C	`conf`	A Study of High Temperature Effects on Ring Oscillator Based Physical Unclonable Functions. IOLTS Aghiles Douadi, Giorgio Di Natale, Paolo Maistri, Elena-Ioana Vatajelu, Vincent Beroulle
2023	B	`conf`	EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. ETS Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023	C	`conf`	Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack. IOLTS Maryam Esmaeilian, Aghiles Douadi, Zahra Kazemi, Vincent Beroulle, Amir-Pasha Mirbaha, Mahdi Fazeli, Elena-Ioana Vatajelu, Paolo Maistri, Giorgio Di Natale
2023	J	`jnl`	Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle. ACM J. Emerg. Technol. Comput. Syst. Farimah Farahmandi, Ankur Srivastava, Giorgio Di Natale, Mark Tehranipoor
2023	J	`jnl`	NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. CoRR Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023	C	`conf`	On-Line Method to Limit Unreliability and Bit-Aliasing in RO-PUF. IOLTS Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2023	C	`conf`	Open Automation Framework for Complex Parametric Electrical Simulations. DDECS Sergio Vinagrero Gutierrez, Pietro Inglese, Giorgio Di Natale, Elena-Ioana Vatajelu
2023	J	`jnl`	Python Framework for Modular and Parametric SPICE Netlists Generation. CoRR Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2023	J	`jnl`	Security layers and related services within the Horizon Europe NEUROPULS project. CoRR Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2023	J	`jnl`	Using Approximate Circuits Against Hardware Trojans. IEEE Des. Test Honorio Martín, Sophie Dupuis, Giorgio Di Natale, Luis Entrena
2022	—	`conf`	An Efficient Approach to Model Strong PUF with Multi-Layer Perceptron using Transfer Learning. ISQED Amir Ali Pour, David Hély, Vincent Beroulle, Giorgio Di Natale
2022	A	`conf`	Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure. ITC Michele Portolan, Antonios Pavlidis, Giorgio Di Natale, Eric Faehn, Haralampos-G. Stratigopoulos
2022	J	`jnl`	DETON: DEfeating hardware Trojan horses in microprocessors through software ObfuscatioN. J. Syst. Archit. Luca Cassano, Mattia Iamundo, Tomas Antonio Lopez, Alessandro Nazzari, Giorgio Di Natale
2022	C	`conf`	Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope? DDECS Cristiana Bolchini, Alberto Bosio, Luca Cassano, Bastien Deveautour, Giorgio Di Natale, Antonio Miele, Ian O'Connor, Elena-Ioana Vatajelu
2022	J	`jnl`	Digital-to-Analog Hardware Trojan Attacks. IEEE Trans. Circuits Syst. I Regul. Pap. Mohamed Elshamy, Giorgio Di Natale, Alhassan Sayed, Antonios Pavlidis, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. Stratigopoulos
2022	B	`conf`	Elaborating on Sub-Space Modeling as an Enrollment Solution for Strong PUF. DCOSS Amir Ali Pour, David Hély, Vincent Beroulle, Giorgio Di Natale
2022	J	`jnl`	Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions. IEEE Des. Test Michele Portolan, Emanuele Valea, Paolo Maistri, Giorgio Di Natale
2022	J	`jnl`	Helper Data Masking for Physically Unclonable Function-Based Key Generation Algorithms. IEEE Access Amir Ali Pour, Fatemeh Afghah, David Hély, Vincent Beroulle, Giorgio Di Natale, Ashwija Reddy Korenda, Bertrand Cambou
2022	J	`jnl`	Nonlinear Code-Based Low-Overhead Fine-Grained Control Flow Checking. IEEE Trans. Computers Gilad Dar, Giorgio Di Natale, Osnat Keren
2022	C	`conf`	On the optimization of Software Obfuscation against Hardware Trojans in Microprocessors. DDECS Luca Cassano, Elia Lazzeri, Nikita Litovchenko, Giorgio Di Natale
2022	B	`conf`	On-Line Reliability Estimation of Ring Oscillator PUF. ETS Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2022	—	`conf`	Secure PUF-based Authentication and Key Exchange Protocol using Machine Learning. ISVLSI Amir Ali Pour, Fatemeh Afghah, David Hély, Vincent Beroulle, Giorgio Di Natale
2022	C	`conf`	Software Product Reliability Based on Basic Block Metrics Recomposition. IOLTS Tiziano Fiorucci, Giorgio Di Natale, Jean-Marc Daveau, Philippe Roche
2022	—	`conf`	Sub-Space Modeling: An Enrollment Solution for XOR Arbiter PUF using Machine Learning. ISQED Amir Ali Pour, David Hély, Vincent Beroulle, Giorgio Di Natale
2021	C	`conf`	Automated Dysfunctional Model Extraction for Model Based Safety Assessment of Digital Systems. IOLTS Tiziano Fiorucci, Jean-Marc Daveau, Giorgio Di Natale, Philippe Roche
2021	—	`conf`	Design Space Exploration Applied to Security. DTIS Antoine Linarès, David Hély, Frank Lhermet, Giorgio Di Natale
2021	A	`conf`	Identification of Hardware Devices based on Sensors and Switching Activity: a Preliminary Study. DATE Honorio Martín, Elena-Ioana Vatajelu, Giorgio Di Natale
2021	—	`conf`	On the Limitations of Concatenating Boolean Operations in Memristive-Based Logic-In-Memory Solutions. DTIS Pietro Inglese, Elena-Ioana Vatajelu, Giorgio Di Natale
2021	A	`conf`	Scramble Cache: An Efficient Cache Architecture for Randomized Set Permutation. DATE Amine Jaamoum, Thomas Hiscock, Giorgio Di Natale
2021	A	`conf`	Security EDA Extension through P1687.1 and 1687 Callbacks. ITC Michele Portolan, Vincent Reynaud, Paolo Maistri, Régis Leveugle, Giorgio Di Natale
2020	B	`conf`	Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. ETS Mohamed Elshamy, Giorgio Di Natale, Antonios Pavlidis, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos
2020	J	`jnl`	Holding Conferences Online due to COVID-19: The DATE Experience. IEEE Des. Test Giorgio Di Natale, Cristiana Bolchini
2020	—	`conf`	Latest Trends in Hardware Security and Privacy. DFT Giorgio Di Natale, Francesco Regazzoni, Vincent Albanese, Frank Lhermet, Yann Loisel, Abderrahmane Sensaoui, Samuel Pagliarini
2020	A	`conf`	Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. ICCAD Francesco Regazzoni, Shivam Bhasin, Amir Alipour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul D. Franzon, David Hély, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena-Ioana Vatajelu, Ville Yli-Mäyry
2020	B	`conf`	Nonlinear Codes for Control Flow Checking. ETS Giorgio Di Natale, Osnat Keren
2020	B	`conf`	PUF Enrollment and Life Cycle Management: Solutions and Perspectives for the Test Community. ETS Amir Alipour, Vincent Beroulle, Bertrand Cambou, Jean-Luc Danger, Giorgio Di Natale, David Hély, Sylvain Guilley, Naghmeh Karimi
2019	—	`conf`	A Comprehensive Approach to a Trusted Test Infrastructure. IVSW Marc Merandat, Vincent Reynaud, Emanuele Valea, Jérôme Quévremont, Nicolas Valette, Paolo Maistri, Régis Leveugle, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre, Giorgio Di Natale
2019	J	`jnl`	A Survey on Security Threats and Countermeasures in IEEE Test Standards. IEEE Des. Test Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2019	B	`conf`	Alternatives to Fault Injections for Early Safety/Security Evaluations. ETS Michele Portolan, Alessandro Savino, Régis Leveugle, Stefano Di Carlo, Alberto Bosio, Giorgio Di Natale
2019	C	`conf`	Encryption-Based Secure JTAG. DDECS Emanuele Valea, Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2019	C	`conf`	HATE: a HArdware Trojan Emulation Environment for Microprocessor-based Systems. IOLTS Cristiana Bolchini, Luca Cassano, Ivan Montalbano, Giampiero Repole, Andrea Zanetti, Giorgio Di Natale
2019	A	`conf`	Hidden-Delay-Fault Sensor for Test, Reliability and Security. DATE Giorgio Di Natale, Elena-Ioana Vatajelu, Kalpana Senthamarai Kannan, Lorena Anghel
2019	J	`jnl`	High-Entropy STT-MTJ-Based TRNG. IEEE Trans. Very Large Scale Integr. Syst. Elena-Ioana Vatajelu, Giorgio Di Natale
2019	J	`jnl`	Memory-Aware Design Space Exploration for Reliability Evaluation in Computing Systems. J. Electron. Test. Maha Kooli, Giorgio Di Natale, Alberto Bosio
2019	C	`conf`	On the Encryption of the Challenge in Physically Unclonable Functions. IOLTS Elena-Ioana Vatajelu, Giorgio Di Natale, Mohd Syafiq Mispan, Basel Halak
2019	—	`conf`	On the Reliability of the Ring Oscillator Physically Unclonable Functions. IVSW Honorio Martín, Elena-Ioana Vatajelu, Giorgio Di Natale, Osnat Keren
2019	J	`jnl`	Preventing Scan Attacks on Secure Circuits Through Scan Chain Encryption. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2019	—	`conf`	Providing Confidentiality and Integrity in Ultra Low Power IoT Devices. DTIS Emanuele Valea, Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Sophie Dupuis, Bruno Rouzeyre
2019	—	`conf`	Rebooting Computing: The Challenges for Test and Reliability. DFT Alberto Bosio, Ian O'Connor, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Elena I. Vatajelu, Giorgio Di Natale, Lorena Anghel, Surya Nagarajan, Moritz Fieback, Said Hamdioui
2019	J	`jnl`	SECCS: SECure Context Saving for IoT Devices. CoRR Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2019	Misc	`conf`	Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN). VTS Elena-Ioana Vatajelu, Giorgio Di Natale, Lorena Anghel
2019	J	`jnl`	Stream vs block ciphers for scan encryption. Microelectron. J. Emanuele Valea, Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2019	J	`jnl`	SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems. IEEE Trans. Computers Alessandro Vallero, Alessandro Savino, Athanasios Chatzidimitriou, Manolis Kaliorakis, Maha Kooli, Marc Riera, Martí Anglada, Giorgio Di Natale, Alberto Bosio, Ramon Canal, Antonio González, Dimitris Gizopoulos, Riccardo Mariani, Stefano Di Carlo
2018	—	`conf`	A New Secure Stream Cipher for Scan Chain Encryption. IVSW Mathieu Da Silva, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Giorgio Di Natale, Bruno Rouzeyre
2018	C	`conf`	A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide Obfuscation. IOLTS Honorio Martín, Luis Entrena, Sophie Dupuis, Giorgio Di Natale
2018	J	`jnl`	A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions. IEEE Trans. Circuits Syst. I Regul. Pap. Mario Barbareschi, Giorgio Di Natale, Lionel Torres, Antonino Mazzeo
2018	J	`jnl`	Assessing body built-in current sensors for detection of multiple transient faults. Microelectron. Reliab. Raphael Andreoni Camponogara Viera, Jean-Max Dutertre, Marie-Lise Flottes, Olivier Potin, Giorgio Di Natale, Bruno Rouzeyre, Rodrigo Possamai Bastos
2018	—	`conf`	Encryption of test data: which cipher is better? PRIME Mathieu Da Silva, Emanuele Valea, Marie-Lise Flottes, Sophie Dupuis, Giorgio Di Natale, Bruno Rouzeyre
2018	J	`jnl`	Guest Editorial: IEEE Transactions on Emerging Topics in Computing Special Issue on Design & Technology of Integrated Systems in Deep Submicron Era. IEEE Trans. Emerg. Top. Comput. Giorgio Di Natale, Marco Ottavi
2018	C	`conf`	Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model. FDTC Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Stephan De Castro, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre
2018	C	`conf`	Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies. VLSI-SoC Lorena Anghel, Denys Ly, Giorgio Di Natale, Benoît Miramond, Elena-Ioana Vatajelu, Elisa Vianello
2018	J	`jnl`	Protection Against Hardware Trojans With Logic Testing: Proposed Solutions and Challenges Ahead. IEEE Des. Test Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2018	—	`conf`	SI ECCS: SECure context saving for IoT devices. DTIS Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2018	C	`conf`	The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks. IOLTS Jean-Max Dutertre, Vincent Beroulle, Philippe Candelier, Louis-Barthelemy Faber, Marie-Lise Flottes, Philippe Gendrier, David Hély, Régis Leveugle, Paolo Maistri, Giorgio Di Natale, Athanasios Papadimitriou, Bruno Rouzeyre
2018	J	`jnl`	Towards a Dependable True Random Number Generator With Self-Repair Capabilities. IEEE Trans. Circuits Syst. I Regul. Pap. Honorio Martín, Giorgio Di Natale, Luis Entrena
2017	J	`jnl`	Computing reliability: On the differences between software testing and software fault injection techniques. Microprocess. Microsystems Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio, Pascal Benoit, Lionel Torres
2017	A	`ed.`	Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017 DATE David Atienza, Giorgio Di Natale
2017	—	`conf`	Do we need a holistic approach for the design of secure IoT systems? Conf. Computing Frontiers Mauro Conti, Giorgio Di Natale, Annelie Heuser, Thomas Pöppelmann, Nele Mentens
2017	—	`conf`	Experimentations on scan chain encryption with PRESENT. IVSW Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2017	—	`conf`	Hacking the Control Flow error detection mechanism. IVSW Giorgio Di Natale, Marie-Lise Flottes, Sophie Dupuis, Bruno Rouzeyre
2017	C	`conf`	Reliability of computing systems: From flip flops to variables. IOLTS Giorgio Di Natale, Maha Kooli, Alberto Bosio, Michele Portolan, Régis Leveugle
2017	J	`jnl`	Report on DATE 2017 in Lausanne. IEEE Des. Test David Atienza, Giorgio Di Natale
2017	B	`conf`	Scan chain encryption for the test, diagnosis and debug of secure circuits. ETS Mathieu Da Silva, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre, Paolo Prinetto, Marco Restifo
2017	—	`conf`	Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memories. IVSW Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016	Misc	`conf`	Cache- and register-aware system reliability evaluation based on data lifetime analysis. VTS Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio
2016	C	`conf`	Cache-aware reliability evaluation through LLVM-based analysis and fault injection. IOLTS Maha Kooli, Giorgio Di Natale, Alberto Bosio
2016	A	`conf`	Cross-layer system reliability assessment framework for hardware faults. ITC Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio González, Maha Kooli, Alberto Bosio, Giorgio Di Natale
2016	B	`conf`	ETS 2016 foreword. ETS Said Hamdioui, Giorgio Di Natale, Bram Kruseman, Maria K. Michael, Haralampos-G. D. Stratigopoulos
2016	J	`jnl`	Editorial. IEEE Trans. Emerg. Top. Comput. Giorgio Di Natale, Stefano Zanero
2016	C	`conf`	Faster-than-at-speed execution of functional programs: An experimental analysis. VLSI-SoC Paolo Bernardi, Alberto Bosio, Giorgio Di Natale, Andrea Guerriero, Federico Venini
2016	J	`jnl`	Frontside Versus Backside Laser Injection: A Comparative Study. ACM J. Emerg. Technol. Comput. Syst. Stephan De Castro, Jean-Max Dutertre, Bruno Rouzeyre, Giorgio Di Natale, Marie-Lise Flottes
2016	—	`conf`	Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique. ISVLSI Papa-Sidi Ba, Sophie Dupuis, Palanichamy Manikandan, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2016	—	`conf`	Improving Stress Quality for SoC Using Faster-than-At-Speed Execution of Functional Programs. VLSI-SoC (Selected Papers) Paolo Bernardi, Alberto Bosio, Giorgio Di Natale, Andrea Guerriero, Ernesto Sánchez, Federico Venini
2016	J	`jnl`	Introduction to Special Issue on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE). Microprocess. Microsystems Lilian Bossuet, Giorgio Di Natale, Paris Kitsos
2016	C	`conf`	Revisiting software-based soft error mitigation techniques via accurate error generation and propagation models. IOLTS Mojtaba Ebrahimi, Maryam Rashvand, Firas Kaddachi, Mehdi Baradaran Tahoori, Giorgio Di Natale
2016	J	`jnl`	Ring oscillators analysis for security purposes in Spartan-6 FPGAs. Microprocess. Microsystems Mario Barbareschi, Giorgio Di Natale, Lionel Torres
2016	—	`conf`	SEcube™: An open-source security platform in a single SoC. DTIS Antonio Varriale, Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto, Pascal Trotta, Tiziana Margaria
2016	J	`jnl`	STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. ACM J. Emerg. Technol. Comput. Syst. Elena-Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo Prinetto
2016	C	`conf`	STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation. IOLTS Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016	Misc	`conf`	Security primitives (PUF and TRNG) with STT-MRAM. VTS Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016	C	`conf`	System-level reliability evaluation through cache-aware software-based fault injection. DDECS Firas Kaddachi, Maha Kooli, Giorgio Di Natale, Alberto Bosio, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori
2016	A	`conf`	Towards a highly reliable SRAM-based PUFs. DATE Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016	—	`conf`	Using outliers to detect stealthy hardware trojan triggering? IVSW Papa-Sidy Ba, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015	—	`conf`	3D DFT Challenges and Solutions. ISVLSI Yassine Fkih, Pascal Vivet, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale, Juergen Schloeffel
2015	C	`conf`	Challenges in designing trustworthy cryptographic co-processors. ISCAS Ricardo Chaves, Giorgio Di Natale, Lejla Batina, Shivam Bhasin, Baris Ege, Apostolos P. Fournaris, Nele Mentens, Stjepan Picek, Francesco Regazzoni, Vladimir Rozic, Nicolas Sklavos, Bohan Yang
2015	J	`jnl`	Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview. Microprocess. Microsystems Alessandro Vallero, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Maha Kooli, Alessandro Savino, Gianfranco Politano, Alberto Bosio, Giorgio Di Natale, Dimitris Gizopoulos, Stefano Di Carlo
2015	—	`conf`	DTIS 2015 foreword. DTIS Paolo Prinetto, Giorgio Di Natale
2015	—	`conf`	Digital Right Management for IP Protection. ISVLSI Jérôme Rampon, Renaud Perillat, Lionel Torres, Pascal Benoit, Giorgio Di Natale, Mario Barbareschi
2015	—	`conf`	Figure of Merits of 28nm Si Technologies for Implementing Laser Attack Resistant Security Dedicated Circuits. ISVLSI Stephan De Castro, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Jean-Max Dutertre
2015	—	`conf`	Hardware Trojan prevention using layout-level design approach. ECCTD Papa-Sidi Ba, Palanichamy Manikandan, Sophie Dupuis, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015	A	`conf`	New testing procedure for finding insertion sites of stealthy hardware trojans. DATE Sophie Dupuis, Papa-Sidi Ba, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2015	A	`conf`	STT MRAM-Based PUFs. DATE Elena-Ioana Vatajelu, Giorgio Di Natale, Marco Indaco, Paolo Prinetto
2015	—	`conf`	STT-MRAM-Based Strong PUF Architecture. ISVLSI Elena-Ioana Vatajelu, Giorgio Di Natale, Lionel Torres, Paolo Prinetto
2015	B	`conf`	Session-less based thermal-aware 3D-SIC test scheduling. ETS Marie-Lise Flottes, Joao Azevedo, Giorgio Di Natale, Bruno Rouzeyre
2014	B	`ed.`	19th IEEE European Test Symposium, ETS 2014, Paderborn, Germany, May 26-30, 2014 ETS Giorgio Di Natale
2014	—	`conf`	2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT Architectures. ISVLSI Yassine Fkih, Pascal Vivet, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale, Juergen Schloeffel
2014	B	`conf`	A novel adaptive fault tolerant flip-flop architecture based on TMR. ETS Luca Cassano, Alberto Bosio, Giorgio Di Natale
2014	C	`conf`	A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans. IOLTS Sophie Dupuis, Papa-Sidi Ba, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2014	—	`conf`	A survey on simulation-based fault injection tools for complex systems. DTIS Maha Kooli, Giorgio Di Natale
2014	Misc	`conf`	Built-in self-test for manufacturing TSV defects before bonding. VTS Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Hakim Zimouche
2014	C	`conf`	Cross-Layer Early Reliability Evaluation for the Computing cOntinuum. DSD Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Arnaud Grasset, Riccardo Mariani, Frank Reichenbach
2014	C	`conf`	Cross-layer early reliability evaluation: Challenges and promises. IOLTS Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Antonio González, Ramon Canal, Riccardo Mariani, M. Pipponzi, Arnaud Grasset, Philippe Bonnot, Frank Reichenbach, Gulzaib Rafiq, Trond Loekstad
2014	C	`conf`	Customized cell detector for laser-induced-fault detection. IOLTS Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2014	—	`conf`	DTIS 2014 foreword. DTIS Ioannis Voyiatzis, Michel Renovell, Mohamed Masmoudi, Paolo Prinetto, Giorgio Di Natale
2014	—	`conf`	Fault injection tools based on Virtual Machines. ReCoSoC Maha Kooli, Pascal Benoit, Giorgio Di Natale, Lionel Torres, Volkmar Sieh
2014	A	`conf`	Hacking and protecting IC hardware. DATE Said Hamdioui, Jean-Luc Danger, Giorgio Di Natale, Fethulah Smailbegovic, Gerard van Battum, Mark Tehranipoor
2014	J	`jnl`	Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS. Microelectron. Reliab. Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale, Alexandre Sarafianos
2014	—	`conf`	Laser attacks on integrated circuits: From CMOS to FD-SOI. DTIS Jean-Max Dutertre, Stephan De Castro, Alexandre Sarafianos, Noemie Boher, Bruno Rouzeyre, Mathieu Lisart, Joel Damiens, Philippe Candelier, Marie-Lise Flottes, Giorgio Di Natale
2014	—	`conf`	Laser-Induced Fault Effects in Security-Dedicated Circuits. VLSI-SoC (Selected Papers) Vincent Beroulle, Philippe Candelier, Stephan De Castro, Giorgio Di Natale, Jean-Max Dutertre, Marie-Lise Flottes, David Hély, Guillaume Hubert, Régis Leveugle, Feng Lu, Paolo Maistri, Athanasios Papadimitriou, Bruno Rouzeyre, Clément Tavernier, Pierre Vanhauwaert
2014	C	`conf`	Laser-induced fault effects in security-dedicated circuits. VLSI-SoC Régis Leveugle, Paolo Maistri, Pierre Vanhauwaert, Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Guillaume Hubert, Stephan De Castro, Jean-Max Dutertre, Alexandre Sarafianos, Noemie Boher, Mathieu Lisart, Joel Damiens, Philippe Candelier, Clément Tavernier
2014	—	`conf`	Layout-aware laser fault injection simulation and modeling: From physical level to gate level. DTIS Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Guillaume Hubert
2014	J	`jnl`	Test Versus Security: Past and Present. IEEE Trans. Emerg. Top. Comput. Jean DaRolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede
2014	J	`jnl`	Testing Methods for PUF-Based Secure Key Storage Circuits. J. Electron. Test. Mafalda Cortez, Gijs Roelofs, Said Hamdioui, Giorgio Di Natale
2014	A	`conf`	Testing PUF-based secure key storage circuits. DATE Mafalda Cortez, Gijs Roelofs, Said Hamdioui, Giorgio Di Natale
2014	J	`jnl`	Thwarting Scan-Based Attacks on Secure-ICs With On-Chip Comparison. IEEE Trans. Very Large Scale Integr. Syst. Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013	—	`conf`	A 3D IC BIST for pre-bond test of TSVs using ring oscillators. NEWCAS Yassine Fkih, Pascal Vivet, Bruno Rouzeyre, Marie-Lise Flottes, Giorgio Di Natale
2013	—	`conf`	A BIST method for TSVs pre-bond test. IDT Hakim Zimouche, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013	J	`jnl`	A New Recovery Scheme Against Short-to-Long Duration Transient Faults in Combinational Logic. J. Electron. Test. Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Feng Lu, Bruno Rouzeyre
2013	—	`conf`	A bulk built-in sensor for detection of fault attacks. HOST Rodrigo Possamai Bastos, Frank Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2013	J	`jnl`	A novel differential scan attack on advanced DFT structures. ACM Trans. Design Autom. Electr. Syst. Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013	—	`conf`	A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults. PATMOS Rodrigo Possamai Bastos, Frank Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre
2013	C	`conf`	A smart test controller for scan chains in secure circuits. IOLTS Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013	C	`conf`	Laser-Induced Fault Simulation. DSD Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013	J	`jnl`	Multilevel Ionizing-Induced Transient Fault Simulator. Inf. Secur. J. A Glob. Perspect. Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013	J	`jnl`	On the Effectiveness of Hardware Trojan Horse Detection via Side-Channel Analysis. Inf. Secur. J. A Glob. Perspect. Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2013	J	`jnl`	Secure JTAG Implementation Using Schnorr Protocol. J. Electron. Test. Amitabh Das, Jean DaRolt, Santosh Ghosh, Stefaan Seys, Sophie Dupuis, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede
2013	J	`jnl`	Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection. Microelectron. Reliab. Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale
2013	J	`jnl`	TRUDEVICE: A COST Action on Trustworthy Manufacturing and Utilization of Secure Devices. Inf. Secur. J. A Glob. Perspect. Giorgio Di Natale
2012	—	`conf`	A New Scan Attack on RSA in Presence of Industrial Countermeasures. COSADE Jean DaRolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede
2012	—	`conf`	A scan-based attack on Elliptic Curve Cryptosystems in presence of industrial Design-for-Testability structures. DFT Jean DaRolt, Amitabh Das, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede
2012	Misc	`conf`	Are advanced DfT structures sufficient for preventing scan-attacks? VTS Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2012	J	`jnl`	Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode. Microelectron. Reliab. Rodrigo Possamai Bastos, Frank Sill Torres, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2012	—	`ch.`	On Countermeasures Against Fault Attacks on the Advanced Encryption Standard. Fault Analysis in Cryptography Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2012	B	`conf`	On-chip test comparison for protecting confidential data in secure ICs. ETS Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2012	J	`jnl`	Scan attacks on side-channel and fault attack resistant public-key implementations. J. Cryptogr. Eng. Jean DaRolt, Amitabh Das, Santosh Ghosh, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Ingrid Verbauwhede
2012	J	`jnl`	Statistical Reliability Estimation of Microprocessor-Based Systems. IEEE Trans. Computers Alessandro Savino, Stefano Di Carlo, Gianfranco Politano, Alfredo Benso, Alberto Bosio, Giorgio Di Natale
2011	—	`conf`	A New Bulk Built-In Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies. DFT Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2011	—	`conf`	New security threats against chips containing scan chain structures. HOST Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2011	C	`conf`	Power consumption traces realignment to improve differential power analysis. DDECS Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Miroslav Valka, Denis Réal
2011	B	`conf`	Scan Attacks and Countermeasures in Presence of Scan Response Compactors. ETS Jean DaRolt, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2011	—	`conf`	Timing issues for an efficient use of concurrent error detection codes. LATW Rodrigo Possamai Bastos, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010	C	`conf`	Ensuring high testability without degrading security: Embedded tutorial on "test and security". DDECS Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010	—	`conf`	Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers. DELTA Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010	B	`conf`	Evaluation of concurrent error detection techniques on the Advanced Encryption Standard. ETS Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010	C	`conf`	Evaluation of concurrent error detection techniques on the advanced encryption standard. IOLTS Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010	J	`jnl`	Self-Test Techniques for Crypto-Devices. IEEE Trans. Very Large Scale Integr. Syst. Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre
2009	J	`jnl`	A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard. J. Electron. Test. Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre
2009	—	`conf`	Execution time reduction of Differential Power Analysis experiments. LATW Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2008	C	`conf`	A Modular Memory BIST for Optimized Memory Repair. IOLTS Philipp Öhler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand
2008	B	`conf`	A Reliable Architecture for the Advanced Encryption Standard. ETS Giorgio Di Natale, M. Doulcier, Marie-Lise Flottes, Bruno Rouzeyre
2008	—	`conf`	An Integrated Validation Environment for Differential Power Analysis. DELTA Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2008	—	`conf`	LIFTING: A Flexible Open-Source Fault Simulator. ATS Alberto Bosio, Giorgio Di Natale
2008	J	`jnl`	March Test Generation Revealed. IEEE Trans. Computers Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2008	—	`conf`	On-Line Instruction-Checking in Pipelined Microprocessors. ATS Stefano Di Carlo, Giorgio Di Natale, Riccardo Mariani
2007	—	`conf`	A Dependable Parallel Architecture for SBoxes. ReCoSoC Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2007	C	`conf`	A Novel Parity Bit Scheme for SBox in AES Circuits. DDECS Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2007	C	`conf`	An On-Line Fault Detection Scheme for SBoxes in Secure Circuits. IOLTS Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2007	C	`conf`	Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. IOLTS Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale
2007	J	`jnl`	March AB, a state-of-the-art march test for realistic static linked faults and dynamic faults in SRAMs. IET Comput. Digit. Tech. Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006	B	`conf`	A 22n March Test for Realistic Static Linked Faults in SRAMs. ETS Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006	C	`conf`	A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs. DDECS Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006	—	`conf`	ATPG for Dynamic Burn-In Test in Full-Scan Circuits. ATS Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006	—	`conf`	Automatic March Tests Generation for Multi-Port SRAMs. DELTA Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006	A	`conf`	Automatic march tests generations for static linked faults in SRAMs. DATE Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006	—	`conf`	Memory Fault Simulator for Static-Linked Faults. ATS Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2006	B	`conf`	Single-Event Upset Analysis and Protection in High Speed Circuits. ETS Mohammad Hosseinabady, Pejman Lotfi-Kamran, Giorgio Di Natale, Stefano Di Carlo, Alfredo Benso, Paolo Prinetto
2005	B	`conf`	Automatic March tests generation for static and dynamic faults in SRAMs. ETS Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2005	A	`conf`	March AB, March AB1: new March tests for unlinked dynamic memory faults. ITC Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2003	C	`conf`	A Watchdog Processor to Detect Data and Control Flow Errors. IOLTS Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2003	A	`conf`	Data Critically Estimation In Software Applications. ITC Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri
2003	—	`conf`	Exhaustive Test of Several Dependable Memory Architectures Designed by GRAAL Tool. Asian Test Symposium Fabrizio Bertuccelli, Franco Bigongiari, Andrea S. Brogna, Giorgio Di Natale, Paolo Prinetto, Roberto Saletti
2003	C	`conf`	FAUST: FAUlt-injection Script-based Tool. IOLTS Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, I. Solcia, Luca Tagliaferri
2003	J	`jnl`	Online Self-Repair of FIR Filters. IEEE Des. Test Comput. Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2003	J	`jnl`	Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures. IEEE Commun. Mag. Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2003	—	`—`	Software-implemented system dependability for safety critical applications. Giorgio Di Natale
2002	A	`conf`	An Optimal Algorithm for the Automatic Generation of March Tests. DATE Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2002	J	`jnl`	An on-line BIST RAM architecture with self-repair capabilities. IEEE Trans. Reliab. Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto
2002	—	`conf`	Specification and Design of a New Memory Fault Simulator. Asian Test Symposium Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2002	A	`conf`	Static Analysis of SEU Effects on Software Applications. ITC Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2001	—	`conf`	Control-Flow Checking via Regular Expressions. Asian Test Symposium Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri
2001	A	`conf`	GRAAL: a tool for highly dependable SRAMs generation. ITC Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Franco Bigongiari
2001	—	`conf`	Memory Read Faults: Taxonomy and Automatic Test Generation. Asian Test Symposium Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2001	J	`jnl`	Online and Offline BIST in IP-Core Design. IEEE Des. Test Comput. Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2001	A	`conf`	SEU effect analysis in an open-source router via a distributed fault injection environment. DATE Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
2001	—	`conf`	Validation of a Software Dependability Tool via Fault Injection Experiments. IOLTW Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Luca Tagliaferri, Paolo Prinetto
2000	—	`conf`	A Family of Self-Repair SRAM Cores. IOLTW Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2000	A	`conf`	A programmable BIST architecture for clusters of multiple-port SRAMs. ITC Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
2000	—	`conf`	An effective distributed BIST architecture for RAMs. ETW Monica Lobetti Bodoni, Alfredo Benso, Silvia Chiusano, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto