Gianluca Giustolisi

72 papers C 12Journal 26Unranked 34
YearRankTypeTitle / Venue / Authors
2026 — conf
Highly-Integrated Light-Sensing System with RF Harvesting and Transmission in Commercial N-Type IGZO Flexible Technology.
ISSCC
Marco Privitera, Muhammad Zahid Naveed, Andrea Ballo, Gianluca Giustolisi, Alfio Dario Grasso, Massimo Alioto
2025 — conf
A 3-V, 72-µW and 0.042-mm
ICICDT
Muhammad Zahid Naveed, Marco Privitera, Alfio Dario Grasso, Gianluca Giustolisi
2025 — conf
A 6-bit SAR ADC in TFT Flexible-Substrate.
PRIME
Muhammad Zahid Naveed, Marco Privitera, Gianluca Giustolisi, Alfio Dario Grasso
2025 — conf
A Comparative Analysis of 60-GHz LNAs for Low-Power mm-Wave Receivers.
PRIME
Minoo Eghtesadi, Andrea Ballo, Manfredi Caruso, Salvatore Pennisi, Gianluca Giustolisi, Egidio Ragonese
2025 — conf
Comparison of Self-Biased Differential Input Stages for OTAs in 0.6-µm Flexible-Substrate Technology.
ICICDT
Muhammad Omer Shah, Marco Privitera, Gianluca Giustolisi, Salvatore Pennisi
2024 — conf
A 28-nm CMOS 60-GHz LNA for OOK Low-Power Receivers.
PRIME
Minoo Eghtesadi, Gianluca Giustolisi, Salvatore Pennisi, Egidio Ragonese
2024 — conf
A Three-Stage Operational Transconductance Amplifier in TFT Flexible-Substrate Process.
DCIS
Gianluca Giustolisi, Alfio Dario Grasso, Muhammad Zahid Naveed, Marco Privitera
2022 J jnl
A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs.
IEEE Access
Francesco Centurelli, Gianluca Giustolisi, Salvatore Pennisi, Giuseppe Scotti
2022 J jnl
A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers.
IEEE Access
Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo, Giuseppe Scotti
2022 J jnl
Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-Adders.
IEEE Access
Gianluca Giustolisi, Gaetano Palumbo
2022 — conf
Design Methodology of the Output Power Stage of a Step-Down DC-DC Converter.
PRIME
Angelo Lucio Bella, Gianluca Giustolisi, Manuela La Rosa, Giovanni Sicurella
2021 J jnl
Design of CMOS three-stage amplifiers for near-to-minimum settling-time.
Microelectron. J.
Gianluca Giustolisi, Gaetano Palumbo
2021 J jnl
Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gianluca Giustolisi, Gaetano Palumbo
2021 C conf
Design of Three-Stage OTAs from Settling-Time and Slew-Rate Constraints.
ISCAS
Gianluca Giustolisi, Gaetano Palumbo
2019 J jnl
Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies.
Microelectron. J.
Gianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi
2019 J jnl
In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gianluca Giustolisi, Gaetano Palumbo
2019 J jnl
Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area.
IEEE Trans. Circuits Syst. II Express Briefs
Andrea Ballo, Alfio Dario Grasso, Gianluca Giustolisi, Gaetano Palumbo
2018 — conf
A Clock Boosted Charge Pump with Reduced Rise Time.
ICECS
Andrea Ballo, Gianluca Giustolisi, Alfio Dario Grasso, Gaetano Palumbo
2018 J jnl
Bessel-like compensation of three-stage operational transconductance amplifiers.
Int. J. Circuit Theory Appl.
Gianluca Giustolisi, Gaetano Palumbo
2018 — conf
Design of CMOS OTAs with Settling-Time Constraints.
ICECS
Gianluca Giustolisi, Gaetano Palumbo
2018 J jnl
Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017.
Integr.
Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi
2018 C conf
Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads.
ISCAS
Gianluca Giustolisi, Gaetano Palumbo
2018 C conf
Settling-time oriented OTA design through the approximation of the ideal delay.
ISCAS
Gianluca Giustolisi, Gaetano Palumbo
2017 J jnl
Robust design of CMOS amplifiers oriented to settling-time specification.
Int. J. Circuit Theory Appl.
Gianluca Giustolisi, Gaetano Palumbo
2016 C conf
Verilog-a modeling of Silicon Photo-Multipliers.
ISCAS
Gianluca Giustolisi, Gaetano Palumbo, Paolo Finocchiaro, Alfio Pappalardo
2015 J jnl
Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes.
IEEE Trans. Instrum. Meas.
Gianluca Giustolisi, Alfio Dario Grasso, Gaetano Palumbo
2015 J jnl
Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gianluca Giustolisi, Gaetano Palumbo
2014 — conf
Monolithic quenching-and-reset circuit for single-photon avalanche diodes.
ICECS
Gianluca Giustolisi, Alfio Dario Grasso, Gaetano Palumbo
2013 — conf
A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers.
ECCTD
Gianluca Giustolisi, Gaetano Palumbo, Paolo Finocchiaro, Alfio Pappalardo
2012 J jnl
An Accurate Ultra-Compact I-V Model for Nanometer MOS Transistors With Applications on Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
2012 J jnl
Behavioral modeling of statistical phenomena of single-photon avalanche diodes.
Int. J. Circuit Theory Appl.
Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo
2012 C conf
Logic gates dynamic modeling by means of an ultra-compact MOS model.
ISCAS
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
2012 J jnl
Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale
2011 — conf
An ultra-compact MOS model in nanometer technologies.
ECCTD
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
2011 — conf
Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model.
ECCTD
Elio Consoli, Gianluca Giustolisi, Gaetano Palumbo
2011 C conf
Verilog-A modeling of SPAD statistical phenomena.
ISCAS
Gianluca Giustolisi, Rosario Mita, Gaetano Palumbo
2008 C conf
Low-voltage LDO Compensation Strategy based on Current Amplifiers.
ISCAS
Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale
2008 — conf
Modeling of EMI propagation in switched-capacitor ΣΔ A/D converter.
ICECS
David Cristaldi, Gianluca Giustolisi
2007 J jnl
High-Drive and Linear CMOS Class-AB Pseudo-Differential Amplifier.
IEEE Trans. Circuits Syst. II Express Briefs
Gianluca Giustolisi, Alfio Dario Grasso, Salvatore Pennisi
2007 — conf
LDO compensation strategy based on current buffer/amplifiers.
ECCTD
Gianluca Giustolisi, Gaetano Palumbo, Ester Spitale
2007 J jnl
Resistance of Feedback Amplifiers: A Novel Representation.
IEEE Trans. Circuits Syst. II Express Briefs
Arnaldo D'Amico, Christian Falconi, Gianluca Giustolisi, Gaetano Palumbo
2007 C conf
Rosenstark-like Representation of Feedback Amplifier Resistance.
ISCAS
Christian Falconi, Arnaldo D'Amico, Gianluca Giustolisi, Gaetano Palumbo
2007 C conf
Two-Stage OTA Design Based on Settling-Time Constraints.
ISCAS
Gianluca Giustolisi
2006 C conf
Analysis of power supply gain of CMOS bandgap references.
ISCAS
Christian Falconi, Gianluca Giustolisi
2006 — conf
NMOS Low Drop-Out Regulator with Dynamic Biasing.
ICECS
Gianluca Giustolisi, Gaetano Palumbo, Christian Falconi, Arnaldo D'Amico
2005 — conf
Analysis and optimization of a low-voltage class-AB output stage.
ICECS
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2005 — conf
Comparison of methods for predicting distortion in class-AB stages.
ICECS
Gianluca Giustolisi, Gaetano Palumbo
2005 J jnl
Design and Comparison of Very Low-Voltage CMOS Output Stages.
IEEE Trans. Circuits Syst. I Regul. Pap.
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2005 — conf
Guidelines for designing class-AB output stages.
ECCTD
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2005 — conf
Statistical analysis of CMOS current reference.
ECCTD
Gianluca Giustolisi, Gaetano Palumbo, Maurizio Gaibotti, Michelangelo Pisasale
2004 J jnl
Exploiting the high-frequency performance of low-voltage low-power SC filters.
IEEE Trans. Circuits Syst. II Express Briefs
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2004 — conf
Sigma-Delta A/D fuzzy converter.
ISCAS (4)
Gianluca Giustolisi, Gaetano Palumbo
2003 — conf
A 1-V CMOS output stage with high linearity.
ISCAS (1)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2003 J jnl
A low-voltage low-power voltage reference based on subthreshold MOSFETs.
IEEE J. Solid State Circuits
Gianluca Giustolisi, Gaetano Palumbo, M. Criscione, F. Cutri
2003 — conf
A new method for evaluating harmonic distortion in push-pull output stages.
ISCAS (1)
Gianluca Giustolisi, Gaetano Palumbo
2003 — conf
A novel 1-V class-AB transconductor for improving speed performance in SC applications.
ISCAS (1)
Gianluca Giustolisi, Gaetano Palumbo
2003 J jnl
Analysis, modelling and optimization of a gain boosted telescopic amplifier.
Int. J. Circuit Theory Appl.
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2003 — conf
CMOS implementation of an extended CNN cell to deal with complex dynamics.
ISCAS (5)
Gianluca Giustolisi, Alessandro Rizzo
2003 — conf
Design of low-voltage low-power SC filters for high-frequency applications.
ISCAS (1)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2002 — conf
Analysis and optimization of gain-boosted telescopic amplifiers.
ISCAS (1)
Walter Aloisi, Gianluca Giustolisi, Gaetano Palumbo
2002 — conf
Analysis of power supply noise attenuation in a PTAT current source.
ISCAS (1)
Gianluca Giustolisi, Gaetano Palumbo
2002 J jnl
Current-mode A/D fuzzy converter.
IEEE Trans. Fuzzy Syst.
Gianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi
2002 — conf
Statistical analysis of the resolution in a current-mode ADC.
ICECS
Gianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi
2001 — conf
A fuzzy controller for step-up DC/DC converters.
ICECS
M. Criscione, Gianluca Giustolisi, A. Lionetto, M. Muscarà, Gaetano Palumbo
2001 J jnl
Analysis and optimization of a novel CMOS multiplier.
Int. J. Circuit Theory Appl.
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
2001 — conf
Detailed frequency analysis of power supply rejection in Brokaw bandgap.
ISCAS (1)
Gianluca Giustolisi, Gaetano Palumbo
2000 J jnl
1.2-V CMOS op-amp with a dynamically biased output stage.
IEEE J. Solid State Circuits
Gianluca Giustolisi, Giuseppe Palmisano, T. Segreto
2000 C conf
A fuzzy membership function circuit in SC technique.
ISCAS
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
2000 J jnl
CMRR frequency response of CMOS operational transconductance amplifiers.
IEEE Trans. Instrum. Meas.
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
2000 C conf
High-linear class AB transconductor for high-frequency applications.
ISCAS
Gianluca Giustolisi, Giuseppe Palmisano, Salvatore Pennisi
1998 — conf
A 1.5 V CMOS voltage multiplier.
ICECS
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo
1998 — conf
A Novel 1.5-V Cmos Mixer.
Great Lakes Symposium on VLSI
Gianluca Giustolisi, Giuseppe Palmisano, Gaetano Palumbo, C. Strano