Gi-Joon Nam - RankMe

85 papers A* 6A 21B 1Misc 2Journal 24Unranked 25

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	MaskOpt: A Large-Scale Mask Optimization Dataset to Advance AI in Integrated Circuit Manufacturing. CoRR Yuting Hu, Lei Zhuang, Hua Xiang, Jinjun Xiong, Gi-Joon Nam
2024	J	`jnl`	Human Hair Reconstruction with Strand-Aligned 3D Gaussians. CoRR Egor Zakharov, Vanessa Sklyarova, Michael Julian Black, Gi-Joon Nam, Justus Thies, Otmar Hilliges
2023	—	`conf`	Cloud-Bursting and Autoscaling for Python-Native Scientific Workflows Using Ray. ISC Workshops Tingkai Liu, Marquita Ellis, Carlos H. A. Costa, Claudia Misale, Sara Kokkila Schumacher, Jinwook Jung, Gi-Joon Nam, Volodymyr V. Kindratenko
2023	—	`conf`	Machine Learning Techniques for Pre-CTS Identification of Timing Critical Flip-Flops. ISVLSI Chunkai Fu, Ben Trombley, Hua Xiang, Gi-Joon Nam, Jiang Hu
2023	A*	`conf`	SyncTREE: Fast Timing Analysis for Integrated Circuit Design through a Physics-informed Tree-based Graph Neural Network. NeurIPS Yuting Hu, Jiajie Li, Florian Klemme, Gi-Joon Nam, Tengfei Ma, Hussam Amrouch, Jinjun Xiong
2022	A	`conf`	A Stochastic Approach to Handle Non-Determinism in Deep Learning-Based Design Rule Violation Predictions. ICCAD Rongjian Liang, Hua Xiang, Jinwook Jung, Jiang Hu, Gi-Joon Nam
2022	J	`jnl`	Design Rule Violation Prediction at Sub-10-nm Process Nodes Using Customized Convolutional Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu
2021	A	`conf`	Fault-Criticality Assessment for AI Accelerators using Graph Convolutional Networks. DATE Arjun Chaudhuri, Jonti Talukdar, Jinwook Jung, Gi-Joon Nam, Krishnendu Chakrabarty
2021	A	`conf`	FlowTuner: A Multi-Stage EDA Flow Tuner Exploiting Parameter Knowledge Transfer. ICCAD Rongjian Liang, Jinwook Jung, Hua Xiang, Lakshmi N. Reddy, Alexey Lvov, Jiang Hu, Gi-Joon Nam
2020	A	`conf`	BISTLock: Efficient IP Piracy Protection using BIST. ITC Siyuan Chen, Jinwook Jung, Peilin Song, Krishnendu Chakrabarty, Gi-Joon Nam
2020	J	`jnl`	Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md. Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks
2020	—	`conf`	DRC Hotspot Prediction at Sub-10nm Process Nodes Using Customized Convolutional Network. ISPD Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu
2020	A*	`conf`	Latch Clustering for Timing-Power Co-Optimization. DAC Chau-Chin Huang, Gustavo E. Téllez, Gi-Joon Nam, Yao-Wen Chang
2020	A	`conf`	Routing-Free Crosstalk Prediction. ICCAD Rongjian Liang, Zhiyao Xie, Jinwook Jung, Vishnavi Chauha, Yiran Chen, Jiang Hu, Hua Xiang, Gi-Joon Nam
2020	A	`conf`	Self-Aligned Double-Patterning Aware Legalization. DATE Hua Xiang, Gi-Joon Nam, Gustavo E. Téllez, Shyam Ramji, Xiaoqing Xu
2019	—	`conf`	Graceful Register Clustering by Effective Mean Shift Algorithm for Power and Timing Balancing. ISPD Ya-Chu Chang, Tung-Wei Lin, Iris Hui-Ru Jiang, Gi-Joon Nam
2019	J	`jnl`	Integrated Latch Placement and Cloning for Timing Optimization. ACM Trans. Design Autom. Electr. Syst. Jinwook Jung, Gi-Joon Nam, Woohyun Chung, Youngsoo Shin
2018	J	`jnl`	DATC RDF: An Open Design Flow from Logic Synthesis to Detailed Routing. CoRR Jinwook Jung, Iris Hui-Ru Jiang, Jianli Chen, Shih-Ting Lin, Yih-Lang Li, Victor N. Kravets, Gi-Joon Nam
2018	A	`conf`	DATC RDF: an academic flow from logic synthesis to detailed routing. ICCAD Jinwook Jung, Iris Hui-Ru Jiang, Jianli Chen, Shih-Ting Lin, Yih-Lang Li, Victor N. Kravets, Gi-Joon Nam
2018	—	`conf`	End-to-End Industrial Study of Retiming. ISVLSI Cunxi Yu, Chau-Chin Huang, Gi-Joon Nam, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Maciej J. Ciesielski, Giovanni De Micheli
2018	J	`jnl`	Guest Editors' Introduction: Hardware Accelerators for Data Centers. IEEE Des. Test Mustafa Ozdal, Gi-Joon Nam, Debbie Marr
2018	—	`conf`	Interconnect Optimization Considering Multiple Critical Paths. ISPD Jiang Hu, Ying Zhou, Yaoguang Wei, Stephen T. Quay, Lakshmi N. Reddy, Gustavo E. Téllez, Gi-Joon Nam
2018	J	`jnl`	OWARU: Free Space-Aware Timing-Driven Incremental Placement With Critical Path Smoothing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin
2018	—	`conf`	On Coloring and Colorability Analysis of Integrated Circuits with Triple and Quadruple Patterning Techniques. ISPD Alexey Lvov, Gustavo E. Téllez, Gi-Joon Nam
2017	A	`conf`	DATC RDF: Robust design flow database: Invited paper. ICCAD Jinwook Jung, Pei-Yu Lee, Yan-Shiun Wu, Nima Karimpour Darav, Iris Hui-Ru Jiang, Victor N. Kravets, Laleh Behjat, Yih-Lang Li, Gi-Joon Nam
2017	J	`jnl`	ExtraV: Boosting Graph Processing Near Storage with a Coherent Accelerator. Proc. VLDB Endow. Jinho Lee, Heesu Kim, Sungjoo Yoo, Kiyoung Choi, H. Peter Hofstee, Gi-Joon Nam, Mark Nutter, Damir A. Jamsek
2016	A	`conf`	OWARU: free space-aware timing-driven incremental placement. ICCAD Jinwook Jung, Gi-Joon Nam, Lakshmi N. Reddy, Iris Hui-Ru Jiang, Youngsoo Shin
2016	A	`conf`	OpenDesign flow database: the infrastructure for VLSI design and design automation research. ICCAD Jinwook Jung, Iris Hui-Ru Jiang, Gi-Joon Nam, Victor N. Kravets, Laleh Behjat, Yih-Lang Li
2015	J	`jnl`	Feature detection for image analytics via FPGA acceleration. IBM J. Res. Dev. Hua-Yu Chang, Iris Hui-Ru Jiang, H. Peter Hofstee, Damir A. Jamsek, Gi-Joon Nam
2015	A	`conf`	Toward Metrics of Design Automation Research Impact. ICCAD Andrew B. Kahng, Mulong Luo, Gi-Joon Nam, Siddhartha Nath, David Z. Pan, Gabriel Robins
2015	J	`jnl`	TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Filipp Akopyan, Jun Sawada, Andrew Cassidy, Rodrigo Alvarez-Icaza, John V. Arthur, Paul Merolla, Nabil Imam, Yutaka Y. Nakamura, Pallab Datta, Gi-Joon Nam, Brian Taba, Michael P. Beakes, Bernard Brezzo, Jente B. Kuang, Rajit Manohar, William P. Risk, Bryan L. Jackson, Dharmendra S. Modha
2014	—	`conf`	Applying VLSI EDA to energy distribution system design. ASP-DAC Sani R. Nassif, Gi-Joon Nam, Jerry Hayes, Sani Fakhouri
2014	J	`jnl`	New Algorithmic Techniques for Complex EDA Problems. VLSI Design Shantanu Dutt, Dinesh P. Mehta, Gi-Joon Nam
2014	—	`conf`	Opportunities in power distribution network system optimization: from EDA perspective. ISPD Gi-Joon Nam, Sani R. Nassif
2014	A	`conf`	Smart grid load balancing techniques via simultaneous switch/tie-line/wire configurations. ICCAD Iris Hui-Ru Jiang, Gi-Joon Nam, Hua-Yu Chang, Sani R. Nassif, Jerry Hayes
2013	—	`conf`	Wire delay variability in nanoscale technology and its impact on physical design. ISQED Sani R. Nassif, Gi-Joon Nam, Shayak Banerjee
2012	J	`jnl`	An accurate sparse-matrix based framework for statistical static timing analysis. Integr. Anand Ramalingam, Ashish Kumar Singh, Sani R. Nassif, Gi-Joon Nam, Michael Orshansky, David Z. Pan
2012	A*	`conf`	Guiding a physical design closure system to produce easier-to-route designs with more predictable timing. DAC Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Cliff C. N. Sze, Natarajan Viswanathan, Nancy Y. Zhou
2012	A	`conf`	Placement: Hot or Not? ICCAD Charles J. Alpert, Zhuo Li, Gi-Joon Nam, Chin Ngai Sze, Natarajan Viswanathan, Samuel I. Ward
2011	—	`conf`	Floorplanning challenges in early chip planning. SoCC Jeonghee Shin, John A. Darringer, Guojie Luo, Merav Aharoni, Alexey Lvov, Gi-Joon Nam, Michael B. Healy
2011	A	`conf`	Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power. ICCAD Seungwhun Paik, Gi-Joon Nam, Youngsoo Shin
2011	J	`jnl`	Physical Synthesis with Clock-Network Optimization for Large Systems on Chips. IEEE Micro David A. Papa, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Natarajan Viswanathan, Gi-Joon Nam, Igor L. Markov
2011	—	`conf`	The ISPD-2011 routability-driven placement contest and benchmark suite. ISPD Natarajan Viswanathan, Charles J. Alpert, Cliff C. N. Sze, Zhuo Li, Gi-Joon Nam, Jarrod A. Roy
2010	A	`conf`	Design-hierarchy aware mixed-size placement for routability optimization. ICCAD Yi-Lin Chuang, Gi-Joon Nam, Charles J. Alpert, Yao-Wen Chang, Jarrod A. Roy, Natarajan Viswanathan
2010	A*	`conf`	Detecting tangled logic structures in VLSI netlists. DAC Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li, Gi-Joon Nam, Charles B. Winn
2010	J	`jnl`	Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gi-Joon Nam, Prashant Saxena
2010	—	`conf`	ITOP: integrating timing optimization within placement. ISPD Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy, Zhuo Li, Charles J. Alpert, Shyam Ramji, Chris Chu
2010	A	`conf`	New placement prediction and mitigation techniques for local routing congestion. ICCAD Taraneh Taghavi, Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Andrew D. Huber, Shyam Ramji
2010	—	`conf`	What makes a design difficult to route. ISPD Charles J. Alpert, Zhuo Li, Michael D. Moffitt, Gi-Joon Nam, Jarrod A. Roy, Gustavo E. Téllez
2009	A	`conf`	CRISP: Congestion reduction by iterated spreading during placement. ICCAD Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov
2009	—	`conf`	Ispd2009 clock network synthesis contest. ISPD Cliff N. Sze, Phillip J. Restle, Gi-Joon Nam, Charles J. Alpert
2009	—	`ed.`	Proceedings of the 2009 International Symposium on Physical Design, ISPD 2009, San Diego, California, USA, March 29 - April 1, 2009 ISPD Gi-Joon Nam, Prashant Saxena
2008	J	`jnl`	Guest Editorial. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David Z. Pan, Gi-Joon Nam
2008	—	`ch.`	Placement. Handbook of Algorithms for Physical Design Automation Gi-Joon Nam, Paul G. Villarrubia
2008	—	`ed.`	Proceedings of the 2008 International Symposium on Physical Design, ISPD 2008, Portland, Oregon, USA, April 13-16, 2008 ISPD David Z. Pan, Gi-Joon Nam
2008	J	`jnl`	RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov
2008	—	`conf`	RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm. ISPD David A. Papa, Tao Luo, Michael D. Moffitt, Chin Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov
2008	—	`conf`	The ISPD global routing benchmark suite. ISPD Gi-Joon Nam, Cliff C. N. Sze, Mehmet Can Yildiz
2007	J	`jnl`	Diffusion-Based Placement Migration With Application on Legalization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Haoxing Ren, David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam
2007	—	`conf`	Hippocrates: First-Do-No-Harm Detailed Placement. ASP-DAC Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia
2007	—	`ch.`	ISPD 2005/2006 Placement Benchmarks. Modern Circuit Placement Gi-Joon Nam, Charles J. Alpert, Paul G. Villarrubia
2007	—	`conf`	ISPD placement contest updates and ISPD 2007 global routing contest. ISPD Gi-Joon Nam, Mehmet Can Yildiz, David Z. Pan, Patrick H. Madden
2007	—	`book`	Modern Circuit Placement, Best Practices and Results Gi-Joon Nam, Jason Cong
2007	Misc	`conf`	Performance modeling for early analysis of multi-core systems. CODES+ISSS Reinaldo A. Bergamaschi, Indira Nair, Gero Dittmann, Hiren D. Patel, Geert Janssen, Nagu R. Dhanwada, Alper Buyuktosunoglu, Emrah Acar, Gi-Joon Nam, Dorothy Kucar, Pradip Bose, John A. Darringer, Guoling Han
2007	A*	`conf`	RQL: Global Placement via Relaxed Quadratic Spreading and Linearization. DAC Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu
2007	J	`jnl`	Techniques for Fast Physical Synthesis. Proc. IEEE Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz
2007	—	`conf`	The nuts and bolts of physical synthesis. SLIP Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz
2006	J	`jnl`	A Fast Hierarchical Quadratic Placement Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gi-Joon Nam, Sherief Reda, Charles J. Alpert, Paul Villarrubia, Andrew B. Kahng
2006	A	`conf`	An accurate sparse matrix based framework for statistical static timing analysis. ICCAD Anand Ramalingam, Gi-Joon Nam, Ashish Kumar Singh, Michael Orshansky, Sani R. Nassif, David Z. Pan
2006	—	`conf`	ISPD 2006 Placement Contest: Benchmark Suite and Results. ISPD Gi-Joon Nam
2005	—	`conf`	A semi-persistent clustering technique for VLSI circuit placement. ISPD Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, Sherief Reda, Paul Villarrubia
2005	—	`conf`	Placement stability metrics. ASP-DAC Charles J. Alpert, Gi-Joon Nam, Paul Villarribua, Mehmet Can Yildiz
2005	—	`conf`	The ISPD2005 placement contest and benchmark suite. ISPD Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Bruce Winter, Mehmet Can Yildiz
2005	J	`jnl`	Two-dimensional position detection system with MEMS accelerometers, readout circuitry, and microprocessor for padless mouse applications. IEEE Trans. Very Large Scale Integr. Syst. Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake
2004	J	`jnl`	A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints. IEEE Trans. Computers Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar
2003	J	`jnl`	Effective free space management for cut-based placement via analytical constraint generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia
2002	J	`jnl`	A new FPGA detailed routing approach via search-based Booleansatisfiability. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
2002	A	`conf`	Free space management for cut-based placement. ICCAD Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia
2002	B	`conf`	Hybrid Routing for FPGAs by Integrating Boolean Satisfiability with Geometric Search. FPL Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
2001	—	`—`	A Boolean -based layout approach and its application to FPGA routing. Gi-Joon Nam
2001	A	`conf`	A boolean satisfiability-based incremental rerouting approach with application to FPGAs. DATE Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
2001	—	`conf`	A comparative study of two Boolean formulations of FPGA detailed routing constraints. ISPD Gi-Joon Nam, Fadi A. Aloul, Karem A. Sakallah, Rob A. Rutenbar
2001	A*	`conf`	Two-Dimensional Position Detection System with MEMS Accelerometer for MOUSE Applications. DAC Seungbae Lee, Gi-Joon Nam, Junseok Chae, Hanseup Kim, Alan J. Drake
1999	Misc	`conf`	Satisfiability-Based Detailed FPGA Routing. VLSI Design Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar
1999	A	`conf`	Satisfiability-Based Layout Revisited: Detailed Routing of Complex FPGAs vis Search-Based Boolean SAT. FPGA Gi-Joon Nam, Karem A. Sakallah, Rob A. Rutenbar