| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2015 | J | jnl |
Future Gener. Comput. Syst.
|
| 2013 | J | jnl |
CoRR
|
| 2013 | J | jnl |
EURETILE 2010-2012 summary: first three years of activity of the European Reference Tiled Experiment
CoRR
|
| 2007 | — | conf |
SoC
|
| 2006 | — | conf |
SoC
|
| 2001 | J | jnl |
ACM Trans. Design Autom. Electr. Syst.
|
| 1997 | J | jnl |
Proc. IEEE
|
| 1997 | J | jnl |
Proc. IEEE
|
| 1997 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 1997 | — | conf |
ED&TC
|
| 1996 | — | conf |
ED&TC
|
| 1995 | — | ed. |
Code Generation for Embedded Processors
|
| 1995 | J | jnl |
J. VLSI Signal Process.
|
| 1995 | J | jnl |
J. VLSI Signal Process.
|
| 1995 | — | conf |
ISSS
|
| 1995 | — | conf |
Workshop on Languages, Compilers, & Tools for Real-Time Systems
|
| 1994 | J | jnl |
J. VLSI Signal Process.
|
| 1994 | — | conf |
HLSS
|
| 1994 | — | conf |
Code Generation for Embedded Processors
|
| 1994 | — | conf |
HLSS
|
| 1994 | A | conf |
ICCAD
|
| 1994 | — | conf |
HLSS
|
| 1994 | — | conf |
EDAC-ETC-EUROASIC
|
| 1994 | J | jnl |
Integr.
|
| 1994 | — | conf |
EDAC-ETC-EUROASIC
|
| 1994 | — | conf |
Code Generation for Embedded Processors
|
| 1993 | — | book |
High-level synthesis for real-time digital signal processing.
|
| 1992 | A | conf |
ICCAD
|
| 1992 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 1992 | — | conf |
Synthesis for Control Dominated Circuits
|
| 1992 | — | conf |
Great Lakes Symposium on VLSI
|
| 1992 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 1991 | A | conf |
ICCAD
|
| 1990 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 1990 | J | jnl |
J. VLSI Signal Process.
|
| 1990 | J | jnl |
Proc. IEEE
|
| 1990 | C | conf |
ICCD
|
| 1990 | — | conf |
EURO-DAC
|
| 1990 | A | conf |
ICCAD
|
| 1989 | A* | conf |
DAC
|
| 1988 | J | jnl |
IEEE Trans. Acoust. Speech Signal Process.
|
| 1985 | Misc | conf |
ICASSP
|