Gerhard Schrom

17 papers A* 1A 3C 1Journal 4Unranked 8

Year	Rank	Type	Title / Venue / Authors
2019	—	`conf`	A Low-Latency 16-Phase Pulse Width Modulator with Phase Angle Control for 140MHz Fully Integrated Voltage Regulators on 22nm Tri-Gate CMOS. MWSCAS Gerhard Schrom, Sarath Makala, Ravi Sankar Vunnam, Raghuraman Narayanan, Fabrice Paillet
2019	A	`conf`	Efficiency Measurement Method for Fully Integrated Voltage Regulators used in 4 ITC Gerhard Schrom, Michael J. Hill, Sarath Makala, Ravi Sankar Vunnam, Arun Krishnamoorthy, Ryan Ferguson
2015	—	`conf`	Broadwell: A family of IA 14nm processors. VLSIC Ankireddy Nalamalpu, Nasser A. Kurd, Anant Deval, Christopher Mozak, Jonathan Douglas, Ashish Khanna, Fabrice Paillet, Gerhard Schrom, Boyd Phelps
2011	—	`conf`	Integrated inductors with magnetic materials for on-chip power conversion. Hot Chips Symposium Donald S. Gardner, Gerhard Schrom, Fabrice Paillet, Tanay Karnik, Shekhar Borkar
2010	—	`conf`	A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS. ISSCC Jason Howard, Saurabh Dighe, Yatin Vasant Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson
2008	J	`jnl`	A Band-Limited Active Damping Circuit With 13 dB Power Supply Resonance Reduction. IEEE J. Solid State Circuits Jianping Xu, Peter Hazucha, Zuoguo Wu, Paolo A. Aseron, Mingwei Huang, Fabrice Paillet, Gerhard Schrom, James W. Tschanz, Vivek De, Tanay Karnik, Greg Taylor
2007	J	`jnl`	High Voltage Tolerant Linear Regulator With Fast Digital Control for Biasing of Integrated DC-DC Converters. IEEE J. Solid State Circuits Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik
2007	—	`conf`	Low Voltage Buffered Bandgap Reference. ISQED Peter Hazucha, Fabrice Paillet, Sung Tae Moon, David J. Rennie, Gerhard Schrom, Donald S. Gardner, Kenneth Ikeda, Gell Gellman, Tanay Karnik
2007	—	`conf`	On-Die Supply-Resonance Suppression Using Band-Limited Active Damping. ISSCC Jianping Xu, Peter Hazucha, Mingwei Huang, Paolo A. Aseron, Fabrice Paillet, Gerhard Schrom, James W. Tschanz, Cangsang Zhao, Vivek De, Tanay Karnik, Greg Taylor
2006	—	`conf`	A Linear Regulator with Fast Digital Control for Biasing Integrated DC-DC Converters. ISSCC Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik
2006	C	`conf`	High-frequency DC-DC conversion : fact or fiction. ISCAS Tanay Karnik, Peter Hazucha, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner
2005	J	`jnl`	A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package. IEEE J. Solid State Circuits Peter Hazucha, Gerhard Schrom, Jaehong Hahn, Bradley A. Bloechel, Paul Hack, Gregory E. Dermer, Siva G. Narendra, Donald S. Gardner, Tanay Karnik, Vivek De, Shekhar Borkar
2005	—	`conf`	Cascode buffer for monolithic voltage conversion operating at high input supply voltages. ISCAS (1) Volkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva G. Narendra
2005	A	`conf`	Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage. ISLPED Ali Keshavarzi, Gerhard Schrom, Stephen Tang, Sean Ma, Keith A. Bowman, Sunit Tyagi, Kevin Zhang, Tom Linton, Nagib Hakim, Steven G. Duvall, John Brews, Vivek De
2004	A*	`conf`	Design optimizations for microprocessors at low temperature. DAC Arman Vassighi, Ali Keshavarzi, Siva G. Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De
2004	A	`conf`	Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation. ISLPED Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De
1995	J	`jnl`	VISTA-user interface, task level, and tool integration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Stefan Halama, Christoph Pichler, Gerhard Rieger, Gerhard Schrom, Thomas Simlinger, Siegfried Selberherr