Georgios K. Konstadinidis

15 papers C 1Journal 8Unranked 5
YearRankTypeTitle / Venue / Authors
2016 J jnl
SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor.
IEEE J. Solid State Circuits
Georgios K. Konstadinidis, Hongping Penny Li, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister, Jeffrey Brooks, Ha Pham, Sebastian Turullols, Yifan Yanggong, Robert T. Golla, Alan P. Smith, Ali Vahidsafa
2015 — conf
4.2 A 20nm 32-Core 64MB L3 cache SPARC M7 processor.
ISSCC
Penny Li, Jinuk Luke Shin, Georgios K. Konstadinidis, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister
2015 — conf
4.3 Fine-grained adaptive power management of the SPARC M7 processor.
ISSCC
Venkatram Krishnaswamy, Jeffrey Brooks, Georgios K. Konstadinidis, Curtis McAllister, Ha Pham, Sebastian Turullols, Jinuk Luke Shin, Yifan Yanggong, Haowei Zhang
2015 J jnl
M7: Oracle's Next-Generation Sparc Processor.
IEEE Micro
Kathirgamar Aingaran, Sumti Jairath, Georgios K. Konstadinidis, Serena Leung, Paul Loewenstein, Curtis McAllister, Stephen Phillips, Zoran Radovic, Ram Sivaramakrishnan, David Smentek, Thomas Wicki
2014 J jnl
A 3.6 GHz 16-Core SPARC SoC Processor in 28 nm.
IEEE J. Solid State Circuits
Jason Hart, Hoyeol Cho, Yuefei Ge, Gregory Gruber, Dawei Huang, Changku Hwang, Daisy Jian, Timothy Johnson, Georgios K. Konstadinidis, Venkatram Krishnaswamy, Lance Kwong, Robert P. Masleid, Rakesh Mehta, Umesh Nawathe, Aparna Ramachandran, Harikaran Sathianathan, Yongning Sheng, Jinuk Luke Shin, Sebastian Turullols, Zuxu Qin, King C. Yen
2013 — conf
3.6GHz 16-core SPARC SoC processor in 28nm.
ISSCC
Jason Hart, Steve Butler, Hoyeol Cho, Yuefei Ge, Gregory Gruber, Dawei Huang, Changku Hwang, Daisy Jian, Timothy Johnson, Georgios K. Konstadinidis, Lance Kwong, Robert P. Masleid, Umesh Nawathe, Aparna Ramachandran, Yongning Sheng, Jinuk Luke Shin, Sebastian Turullols, Zuxu Qin, King C. Yen
2013 J jnl
The Next Generation 64b SPARC Core in a T4 SoC Processor.
IEEE J. Solid State Circuits
Jinuk Luke Shin, Robert T. Golla, Hongping Penny Li, Sudesna Dash, Youngmoon Choi, Alan P. Smith, Harikaran Sathianathan, Mayur Joshi, Heechoul Park, Mohamed Elgebaly, Sebastian Turullols, Song Kim, Robert P. Masleid, Georgios K. Konstadinidis, Mary Jo Doherty, Greg Grohoski, Curtis McAllister
2012 — conf
The next-generation 64b SPARC core in a T4 SoC processor.
ISSCC
Jinuk Luke Shin, Heechoul Park, Hongping Penny Li, Alan P. Smith, Youngmoon Choi, Harikaran Sathianathan, Sudesna Dash, Sebastian Turullols, Song Kim, Robert P. Masleid, Georgios K. Konstadinidis, Robert T. Golla, Mary Jo Doherty, Greg Grohoski, Curtis McAllister
2009 J jnl
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor.
IEEE J. Solid State Circuits
Georgios K. Konstadinidis, Marc Tremblay, Shailender Chaudhry, Mamun Rashid, Peter F. Lai, Yukio Otaguro, Yannis Orginos, Sudhendra Parampalli, Mark Steigerwald, Shriram Gundala, Rambabu Pyapali, Leonard Rarick, Ilyas Elkin, Yuefei Ge, Ishwar Parulkar
2008 — conf
Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs® Processor.
ISSCC
Georgios K. Konstadinidis, Mamun Rashid, Peter F. Lai, Yukio Otaguro, Yannis Orginos, Sudhendra Parampalli, Mark Steigerwald, Shriram Gundala, Rambabu Pyapali, Leonard Rarick, Ilyas Elkin, Yuefei Ge, Ishwar Parulkar
2005 J jnl
Introduction to the Special Issue on the ISSCC2004.
IEEE J. Solid State Circuits
Georgios K. Konstadinidis, Anantha P. Chandrakasan, Sreedhar Natarajan, Thucydides Xanthopoulos
2002 J jnl
Implementation of a third-generation 1.1-GHz 64-bit microprocessor.
IEEE J. Solid State Circuits
Georgios K. Konstadinidis, Kevin Normoyle, Samson Wong, Sutikshan Bhutani, Harry Stuimer, Timothy Johnson, Alan P. Smith, Daniel Y. Cheung, Fabrizio Romano, Shifeng Yu, Sung-Hun Oh, Victor Melamed, Sridhar Narayanan, David Bunsey, Cong Khieu, Kevin J. Wu, Ralf Schmitt, Andy Dumlao, Massimo Sutera, Jade Chau, K. James Lin, William S. Coates
2002 C conf
Timing Window Applications in UltraSPARC-IIIi? Microprocessor Design.
ICCD
Rita Yu Chen, Paul Yip, Georgios K. Konstadinidis, Andrew Demas, Fabian Klass, Robert E. Mains, Margaret Schmitt, Dina Bistry
1994 — —
Concurrent multipath power delay optimization for high speed digital VLSI systems.
Georgios K. Konstadinidis
1992 J jnl
Optimization of buffer stages in bipolar VLSI systems.
IEEE J. Solid State Circuits
Georgios K. Konstadinidis, Horst H. Berger