George S. Taylor

18 papers A* 4A 1C 6Journal 4Unranked 3

Year	Rank	Type	Title / Venue / Authors
2003	J	`jnl`	Balanced self-checking asynchronous logic for smart card applications. Microprocess. Microsystems Simon W. Moore, Ross J. Anderson, Robert Mullins, George S. Taylor, Jacques J. A. Fournier
2003	A	`conf`	Security Evaluation of Asynchronous Circuits. CHES Jacques J. A. Fournier, Simon W. Moore, Huiyun Li, Robert Mullins, George S. Taylor
2002	—	`conf`	Improving Smart Card Security Using Self-Timed Circuits. ASYNC Simon W. Moore, Robert Mullins, Paul A. Cunningham, Ross J. Anderson, George S. Taylor
2002	—	`conf`	Point to Point GALS Interconnect. ASYNC George S. Taylor, Simon W. Moore, Robert Mullins, Peter Robinson
2000	—	`conf`	An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems. ASYNC George S. Taylor, Simon W. Moore, Steve Wilcox, Peter Robinson
2000	C	`conf`	Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems. ICCD Simon W. Moore, George S. Taylor, Paul A. Cunningham, Robert D. Mullins, Peter Robinson
1998	J	`jnl`	Reduced complexity two-phase micropipeline latch controller. IEEE J. Solid State Circuits George S. Taylor, Gerard M. Blair
1989	J	`jnl`	A VLSI chip set for a multiprocessor workstation. I. An RISC microprocessor with coprocessor interface and support for symbolic processing. IEEE J. Solid State Circuits David D. Lee, Shing I. Kong, Mark D. Hill, George S. Taylor, David A. Hodges, Randy H. Katz, David A. Patterson
1987	C	`conf`	Fast multiply and divide for a VLSI floating-point unit. IEEE Symposium on Computer Arithmetic Bidyut Kumar Bose, Li-fan Pei, George S. Taylor, David A. Patterson
1986	A*	`conf`	An In-Cache Address Translation Mechanism. ISCA David A. Wood, Susan J. Eggers, Garth A. Gibson, Mark D. Hill, Joan M. Pendleton, Scott A. Ritchie, George S. Taylor, Randy H. Katz, David A. Patterson
1986	A*	`conf`	Evaluation of the SPUR Lisp Architecture. ISCA George S. Taylor, Paul N. Hilfinger, James R. Larus, David A. Patterson, Benjamin G. Zorn
1985	C	`conf`	Radix 16 SRT dividers with overlapped quotient selection stages: A 225 nanosecond double precision divider for the S-1 Mark IIB. IEEE Symposium on Computer Arithmetic George S. Taylor
1985	J	`jnl`	The Magic VLSI Layout System. IEEE Des. Test John K. Ousterhout, Gordon T. Hamachi, Robert N. Mayo, Walter S. Scott, George S. Taylor
1984	A*	`conf`	Magic's incremental design-rule checker. DAC George S. Taylor, John K. Ousterhout
1984	A*	`conf`	Magic: A VLSI layout system. DAC John K. Ousterhout, Gordon T. Hamachi, Robert N. Mayo, Walter S. Scott, George S. Taylor
1983	C	`conf`	Arithmetic on the ELXSI System 6400. IEEE Symposium on Computer Arithmetic George S. Taylor
1981	C	`conf`	Compatible hardware for division and square root. IEEE Symposium on Computer Arithmetic George S. Taylor
1981	C	`conf`	VAX hardware for the proposed IEEE floating-point standard. IEEE Symposium on Computer Arithmetic George S. Taylor, David A. Patterson