George Alexiou

43 papers B 1C 8Journal 13Unranked 21

Year	Rank	Type	Title / Venue / Authors
2019	J	`jnl`	Implementation Guidelines of WDSRAM and Comparison with Typical SRAM Using Nanoscale Hierarchical Implementation Model. J. Circuits Syst. Comput. Theodoros Simopoulos, George Alexiou, Themistoklis Haniotakis
2018	—	`conf`	A 1Kx32 bit WDSRAM page with rapid write access. DTIS Theodoros Simopoulos, Themistoklis Haniotakis, George Alexiou
2018	—	`conf`	Edge Caching Architecture for Media Delivery over P2P Networks. CAMAD Yannis Nikoloudakis, Evangelos K. Markakis, George Alexiou, Stavroula Bourazani, George Mastorakis, Evangelos Pallis, Ilias Politis, Charalabos Skianis, Constandinos X. Mavromoustakis
2017	J	`jnl`	Computing, Caching, and Communication at the Edge: The Cornerstone for Building a Versatile 5G Ecosystem. IEEE Commun. Mag. Evangelos K. Markakis, Kimon Karras, Anargyros Sideris, George Alexiou, Evangelos Pallis
2017	J	`jnl`	EXEGESIS: Extreme Edge Resource Harvesting for a Virtualized Fog Environment. IEEE Commun. Mag. Evangelos K. Markakis, Kimon Karras, Nikolaos Zotos, Anargyros Sideris, Theoharris Moysiadis, Angelo Corsaro, George Alexiou, Charalabos Skianis, George Mastorakis, Constandinos X. Mavromoustakis, Evangelos Pallis
2017	—	`conf`	Multi field SRAM access via intra-encoders and crossbar addressing scheme. MOCAST Theodoros Simopoulos, Lazaros Spyridopoulos, George Alexiou, Nikos Konofaos
2016	—	`conf`	A virtual network functions brokering mechanism. TEMU Evangelos K. Markakis, Anargyros Sideris, George Alexiou, Athina Bourdena, Evangelos Pallis, George Mastorakis, Constandinos X. Mavromoustakis
2016	J	`jnl`	BlogSearch: Semantic Services for Aggregating and Searching Blog Articles. Int. J. Semantic Comput. Nikos Papadakis, Haridimos Kondylakis, Anastasios Kalaentzis, Ioannis Komporakis, Ioannis A. Deligiannis, Malvina Steiakaki, George Alexiou, Xanthoula Atsalaki
2015	C	`conf`	RDF Resource Search and Exploration with LinkZoo. DATA Marios Meimaris, George Alexiou, Katerina Gkirtzou, George Papastefanatos, Theodore Dalamagas
2015	J	`jnl`	Schema-agnostic vs Schema-based Configurations for Blocking Methods on Homogeneous Data. Proc. VLDB Endow. George Papadakis, George Alexiou, George Papastefanatos, Georgia Koutrika
2014	—	`conf`	A broadcast aware P2P mechanism for improving BitTorrent content delivery. CAMAD Evangelos K. Markakis, Charalampos Skiannis, Anargyros Sideris, George Alexiou, Evangelos Pallis
2014	—	`conf`	Automated Generation of the Register Set of a SOC and its Verification Environment. Panhellenic Conference on Informatics K. Poulos, Kostas Adaos, George Alexiou
2014	—	`conf`	Implementation of a Low Leakage Standard Cell Library based on materials from UMC 65nm technology. Panhellenic Conference on Informatics Theodoros Simopoulos, Themistoklis Haniotakis, George Alexiou
2014	—	`conf`	LinkZoo: A Linked Data Platform for Collaborative Management of Heterogeneous Resources. ESWC (Satellite Events) Marios Meimaris, George Alexiou, George Papastefanatos
2014	—	`conf`	MPEG-DASH over IDVB-T: The QoE unfairness issue. CAMAD Anargyros Sideris, Evangelos K. Markakis, A. Trigonis, George Alexiou, Evangelos Pallis, Charalabos Skianis
2014	—	`conf`	QoE fairness, HTTP Adaptive Streaming and IDVB-T: The AWM approach. TEMU Anargyros Sideris, Evangelos K. Markakis, A. Trigonis, George Alexiou, Evangelos Pallis, Charalabos Skianis
2012	—	`conf`	IMS-enabled interactive broadcasting network utilizing peer to peer constellations. TEMU Evangelos K. Markakis, Anargyros Sideris, Petros Anapliotis, George Alexiou, Harry Skianis, Evangelos Pallis
2012	B	`conf`	Intelligent and Semantic Real-Time Process of the Greek LOD for Enhancing Citizen Awareness in Public Expenditures. WISE Michalis Vafopoulos, Marios Meimaris, Agis Papantoniou, Ioannis Anagnostopoulos, Ioannis Xidias, George Alexiou, Giorgos Vafeiadis, Vassilis Loumos
2010	—	`conf`	Low Power Single Electron Or/Nor Gate Operating at 10GHz. ISVLSI Thomas Tsiolakis, George Alexiou, Nikolaos Konofaos
2010	—	`conf`	Welcome to ISQED 2010. ISQED Kamesh V. Gadepally, Lalitha Immaneni, Pallab Chatterjee, George Alexiou, Ali Iranmanesh
2009	C	`conf`	Design, Simulation and Performance Evaluation of a NAND Based Single-electron 2-4 Decoder. DSD Thomas Tsiolakis, Nikos Konofaos, George Alexiou
2008	C	`conf`	A Novel System-on-Chip Architecture for Efficient Image Processing. IEEE International Workshop on Rapid System Prototyping V. Mariatos, Kostas Adaos, George Alexiou
2008	—	`conf`	Design and Simulation of NAND Gates Made of Single Electron Devices. Panhellenic Conference on Informatics Thomas Tsiolakis, George Alexiou, Nikolaos Konofaos
2007	—	`conf`	A wireless infrared sensor network for the estimation of the position and orientation of a moving target. MobiMedia Nikos Petrellis, Nikos Konofaos, George Alexiou
2007	C	`conf`	Design and Implementation of a Reconfigurable, Embedded Real-Time Face Detection System. IEEE International Workshop on Rapid System Prototyping V. Mariatos, Kostas Adaos, George Alexiou
2007	C	`conf`	Utilising noise effects on infrared pattern reception for position estimation on a grid plane. ETFA Nikos Petrellis, Nikos Konofaos, George Alexiou
2006	J	`jnl`	A core generator for arithmetic cores and testing structures with a network interface. J. Syst. Archit. Dimitris Bakalis, Kostas Adaos, Dimitrios Lymperopoulos, Maciej Bellos, Haridimos T. Vergos, George Alexiou, Dimitris Nikolos
2006	—	`conf`	Position Estimation on a Grid, Based on Infrared Pattern Reception Features. IWUC Nikos Petrellis, Nikos Konofaos, George Alexiou
2002	J	`jnl`	On the design of low power BIST for multipliers with Booth encoding and Wallace tree summation. J. Syst. Archit. Dimitris Bakalis, Emmanouil Kalligeros, Dimitris Nikolos, Haridimos T. Vergos, George Alexiou
2001	C	`conf`	EUDOXUS: A WWW-based Generator of Reusable Arithmetic Cores. IEEE International Workshop on Rapid System Prototyping Dimitris Bakalis, Kostas Adaos, George Alexiou, Dimitris Nikolos, Dimitrios Lymperopoulos
2000	—	`conf`	Development of reusable serial FIR filters with reprogrammable coefficients designed for serial dataflow architectures. ICECS Kostas Adaos, George Alexiou, Nick Kanopoulos
2000	—	`conf`	Low Power BIST for Wallace Tree-Based Fast Multipliers. ISQED Dimitris Bakalis, Dimitris Nikolos, George Alexiou, Emmanouil Kalligeros, Haridimos T. Vergos
1999	C	`conf`	Development of a Reusable E1 Transceiver Suitable for Rapid Prototyping. IEEE International Workshop on Rapid System Prototyping A. Vasilliou, Konstantinos Gounaris, Kostas Adaos, D. Mitsainas, George Alexiou, Dimitris Nikolos
1999	—	`conf`	Low Power Dissipation in BIST Schemes for Modified Booth Multipliers. DFT Xrysovalantis Kavousianos, Dimitris Bakalis, Haridimos T. Vergos, Dimitris Nikolos, George Alexiou
1998	J	`jnl`	A dual rail circuits synthesis environment for the implementation of multiple output boolean functions. Int. J. Circuit Theory Appl. Theodore Karoubalis, George Alexiou, Nick Kanopoulos
1998	C	`conf`	An Extensible, Low Cost Rapid Prototyping Environment Based on a Reconfigurable Set of FPGAs. International Workshop on Rapid System Prototyping Kostas Adaos, George Alexiou, Nick Kanopoulos
1996	J	`jnl`	A New Method for SC Circuit Synthesis Based on the voltage Inversion Concept. J. Circuits Syst. Comput. Theodore L. Deliyannis, Ioannis Haritantis, George Alexiou, Costas Psychalinos, A. Limperis, Michael C. Layos
1995	J	`jnl`	A new efficient dcvs circuit synthesis technique used for an improved implementation of a serial/parallel multiplier. Int. J. Circuit Theory Appl. Theodore Karoubalis, Kostas Adaos, George Alexiou, Nick Kanopoulos
1995	—	`conf`	Optimal synthesis of differential cascode voltage switch (DCVS) logic circuits using ordered binary decision diagrams (OBDDs). EURO-DAC Theodore Karoubalis, George Alexiou, Nick Kanopoulos
1994	—	`conf`	Design and Implementation of a High-Performance, Modular, Sorting Engine. EDAC-ETC-EUROASIC George Alexiou, Dimitrios Stiliadis, Nick Kanopoulos
1994	J	`jnl`	On the design of a high-performance, expandable, sorting engine. Integr. George Alexiou, Dimitrios Stiliadis, Nick Kanopoulos
1992	J	`jnl`	A new serial/parallel two's complement multiplier for vlsi digital signal processing. Int. J. Circuit Theory Appl. George Alexiou, Nick Kanopoulos
1990	J	`jnl`	Multiprocessor vision system. Microprocess. Microsystems Nikolaos G. Bourbakis, Mike P. Papazoglou, George Alexiou