Georg Ellguth

31 papers A* 2A 1C 6Journal 15Unranked 7
YearRankTypeTitle / Venue / Authors
2024 — conf
EdgeVision SoC: PPA-Impact of RTL-level Modifications.
SOCC
Mikail Yayla, Clifford Leon Dmello, Georg Ellguth, Uwe Steeb, Tim Leuchter, Marcus Pietzsch, Holger Eisenreich
2022 J jnl
A 16-Channel Fully Configurable Neural SoC With 1.52 $\mu$W/Ch Signal Acquisition, 2.79 $\mu$W/Ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 nm FDSOI.
IEEE Trans. Biomed. Circuits Syst.
Seyed Mohammad Ali Zeinolabedin, Franz Marcus Schüffny, Richard George, Florian Kelber, Heiner Bauer, Stefan Scholze, Stefan Hänzsche, Marco Stolba, Andreas Dixius, Georg Ellguth, Dennis Walter, Sebastian Höppner, Christian Mayr
2021 J jnl
Hardware Implementation of an OPC UA Server for Industrial Field Devices.
CoRR
Heiner Bauer, Sebastian Höppner, Chris Paul Iatrou, Zohra Charania, Stephan Hartmann, Saif-Ur Rehman, Andreas Dixius, Georg Ellguth, Dennis Walter, Johannes Uhlig, Felix Neumärker, Marc Berthel, Marco Stolba, Florian Kelber, Leon Urbas, Christian Mayr
2021 J jnl
Hardware Implementation of an OPC UA Server for Industrial Field Devices.
IEEE Trans. Very Large Scale Integr. Syst.
Heiner Bauer, Sebastian Höppner, Chris Paul Iatrou, Zohra Charania, Stephan Hartmann, Saif-Ur Rehman, Andreas Dixius, Georg Ellguth, Dennis Walter, Johannes Uhlig, Felix Neumärker, Marc Berthel, Marco Stolba, Florian Kelber, Leon Urbas, Christian Mayr
2021 J jnl
The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing.
CoRR
Sebastian Höppner, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Marco Stolba, Florian Kelber, Bernhard Vogginger, Felix Neumärker, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Thomas Hocker, Dennis Walter, Gengting Liu, Jim D. Garside, Steve B. Furber, Christian Mayr
2019 J jnl
Dynamic Power Management for Neuromorphic Many-Core Systems.
CoRR
Sebastian Höppner, Bernhard Vogginger, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Felix Neumaerker, Stephan Hartmann, Stefan Schiefer, Georg Ellguth, Love Cederstroem, Luis A. Plana, Jim D. Garside, Steve B. Furber, Christian Mayr
2019 J jnl
Dynamic Power Management for Neuromorphic Many-Core Systems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sebastian Höppner, Bernhard Vogginger, Yexin Yan, Andreas Dixius, Stefan Scholze, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Georg Ellguth, Love Cederstroem, Luis A. Plana, Jim D. Garside, Steve B. Furber, Christian Mayr
2019 C conf
Performance Analysis of a Comparator Based Mixed-Signal Control Loop in 28 nm CMOS.
VLSI-SoC
Florian Protze, Martin Kreißig, Frank Ellinger, Sebastian Höppner, Stephan Hartmann, Stefan Hänzsche, Stefan Scholze, Georg Ellguth, Christian Mayr
2017 A* conf
A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications.
DAC
Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
2017 C conf
Dynamic voltage and frequency scaling for neuromorphic many-core systems.
ISCAS
Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
2017 C conf
Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems.
ISCAS
Sebastian Höppner, Yexin Yan, Bernhard Vogginger, Andreas Dixius, Johannes Partzsch, Prateek Joshi, Felix Neumärker, Stephan Hartmann, Stefan Schiefer, Stefan Scholze, Georg Ellguth, Love Cederstroem, Matthias Eberlein, Christian Mayr, Steve Temple, Luis A. Plana, Jim D. Garside, Simon Davidson, David R. Lester, Steve B. Furber
2016 J jnl
A Biological-Realtime Neuromorphic System in 28 nm CMOS Using Low-Leakage Switched Capacitor Circuits.
IEEE Trans. Biomed. Circuits Syst.
Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2016 — conf
A database accelerator for energy-efficient query processing and optimization.
NORCAS
Sebastian Haas, Oliver Arnold, Stefan Scholze, Sebastian Höppner, Georg Ellguth, Andreas Dixius, Annett Ungethüm, Eric Mier, Benedikt Noethen, Emil Matús, Stefan Schiefer, Love Cederstroem, Fabian Pilz, Christian Mayr, René Schüffny, Wolfgang Lehner, Gerhard P. Fettweis
2016 A* conf
An MPSoC for energy-efficient database query processing.
DAC
Sebastian Haas, Oliver Arnold, Benedikt Nöthen, Stefan Scholze, Georg Ellguth, Andreas Dixius, Sebastian Höppner, Stefan Schiefer, Stephan Hartmann, Stephan Henker, Thomas Hocker, Jörg Schreiter, Holger Eisenreich, Jens-Uwe Schlüßler, Dennis Walter, Tobias Seifert, Friedrich Pauls, Mattis Hasler, Yong Chen, Hermann Hensel, Sadia Moriam, Emil Matús, Christian Mayr, René Schüffny, Gerhard P. Fettweis
2015 J jnl
An Energy Efficient Multi-Gbit/s NoC Transceiver Architecture With Combined AC/DC Drivers and Stoppable Clocking in 65 nm and 28 nm CMOS.
IEEE J. Solid State Circuits
Sebastian Höppner, Dennis Walter, Thomas Hocker, Stephan Henker, Stefan Hänzsche, Daniel Sausner, Georg Ellguth, Jens-Uwe Schluessler, Holger Eisenreich, René Schüffny
2014 — conf
10.7 A 105GOPS 36mm
ISSCC
Benedikt Noethen, Oliver Arnold, Esther P. Adeva, Tobias Seifert, Erik Fischer, Steffen Kunze, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Stephan Hartmann, Sebastian Höppner, Stefan Schiefer, J.-U. Schlusler, Stefan Scholze, Dennis Walter, René Schüffny
2014 J jnl
A 12-b 4-MS/s SAR ADC With Configurable Redundancy in 28-nm CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs
Stefan Hänzsche, Sebastian Höppner, Georg Ellguth, René Schüffny
2014 J jnl
A Biological-Realtime Neuromorphic System in 28 nm CMOS using Low-Leakage Switched Capacitor Circuits.
CoRR
Christian Mayr, Johannes Partzsch, Marko Noack, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2014 C conf
A compact on-chip IR-drop measurement system in 28 nm CMOS technology.
ISCAS
Sebastian Dietel, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stefan Hänzsche, Stephan Henker, René Schüffny, Tim Brauninger, Ulrich Fiedler
2014 J jnl
Switched-Capacitor Realization of Presynaptic Short-Term-Plasticity and Stop-Learning Synapses in 28 nm CMOS.
CoRR
Marko Noack, Johannes Partzsch, Christian Mayr, Stefan Hänzsche, Stefan Scholze, Sebastian Höppner, Georg Ellguth, René Schüffny
2013 J jnl
A Compact Clock Generator for Heterogeneous GALS MPSoCs in 65-nm CMOS Technology.
IEEE Trans. Very Large Scale Integr. Syst.
Sebastian Höppner, Holger Eisenreich, Stephan Henker, Dennis Walter, Georg Ellguth, René Schüffny
2013 J jnl
A Fast-Locking ADPLL With Instantaneous Restart Capability in 28-nm CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs
Sebastian Höppner, Stefan Hänzsche, Georg Ellguth, Dennis Walter, Holger Eisenreich, René Schüffny
2012 J jnl
A 32 GBit/s communication SoC for a waferscale neuromorphic system.
Integr.
Stefan Scholze, Holger Eisenreich, Sebastian Höppner, Georg Ellguth, Stephan Henker, Mario Ander, Stefan Hänzsche, Johannes Partzsch, Christian Mayr, René Schüffny
2012 — conf
A 335Mb/s 3.9mm
ISSCC
Markus Winter, Steffen Kunze, Esther P. Adeva, Björn Mennenga, Emil Matús, Gerhard P. Fettweis, Holger Eisenreich, Georg Ellguth, Sebastian Höppner, Stefan Scholze, René Schüffny, Tomoyoshi Kobori
2012 C conf
A power management architecture for fast per-core DVFS in heterogeneous MPSoCs.
ISCAS
Sebastian Höppner, Chenming Shao, Holger Eisenreich, Georg Ellguth, Mario Ander, René Schüffny
2012 — conf
A source-synchronous 90Gb/s capacitively driven serial on-chip link over 6mm in 65nm CMOS.
ISSCC
Dennis Walter, Sebastian Höppner, Holger Eisenreich, Georg Ellguth, Stephan Henker, Stefan Hänzsche, René Schüffny, Markus Winter, Gerhard P. Fettweis
2012 J jnl
On-Chip Measurement and Compensation of Timing Imbalances in High-Speed Serial NoC Links.
Int. J. Embed. Real Time Commun. Syst.
Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny
2011 — conf
Mismatch characterization of high-speed NoC links using asynchronous sub-sampling.
SoC
Sebastian Höppner, Dennis Walter, Georg Ellguth, René Schüffny
2010 C conf
A low-power cell-based-design multi-port register file in 65nm CMOS technology.
ISCAS
Johannes Uhlig, Sebastian Höppner, Georg Ellguth, René Schüffny
2010 A conf
Low power design of the X-GOLD
DATE
Wolfgang Raab, Jörg Berthold, J. A. Ulrich Hachmann, Dominik Langen, Michael Schreiner, Holger Eisenreich, Jens-Uwe Schluessler, Georg Ellguth
2009 — conf
Current conveyor based amplifier and adaptive buffer for use in an analog frontend.
ICECS
Georg Ellguth, Stephan Henker, Christian Mayr, René Schüffny