Gaurav Narang

14 papers A 4Misc 1Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2025 J jnl
Energy-Efficient DNN Inferencing on ReRAM-Based PIM Accelerators Using Heterogeneous Operation Units.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gaurav Narang, Janardhan Rao Doppa, Partha Pratim Pande
2025 J jnl
GINA: Exploiting Graph Neural Network Layer Features for Energy Efficient Inferencing in NVM-based PIM Accelerators.
ACM Trans. Embed. Comput. Syst.
Gaurav Narang, Chukwufumnanya Ogbogu, Biresh Kumar Joardar, Janardhan Rao Doppa, Krishnendu Chakrabarty, Partha Pratim Pande
2025 J jnl
HePGA: A Heterogeneous Processing-in-Memory based GNN Training Accelerator.
CoRR
Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar, Janardhan Rao Doppa, Krishnendu Chakrabarty, Partha Pratim Pande
2025 A conf
Odin: Learning to Optimize Operation Unit Configuration for Energy-efficient DNN Inferencing.
DATE
Gaurav Narang, Janardhan Rao Doppa, Partha Pratim Pande
2024 A conf
Dataflow-Aware PIM-Enabled Manycore Architecture for Deep Learning Workloads.
DATE
Harsh Sharma, Gaurav Narang, Janardhan Rao Doppa, Ümit Y. Ogras, Partha Pratim Pande
2024 J jnl
Dataflow-Aware PIM-Enabled Manycore Architecture for Deep Learning Workloads.
CoRR
Harsh Sharma, Gaurav Narang, Janardhan Rao Doppa, Ümit Y. Ogras, Partha Pratim Pande
2024 A conf
Heterogeneous Manycore In-Memory Computing Architectures.
ICCAD
Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar, Janardhan Rao Doppa, Partha Pratim Pande
2024 J jnl
HuNT: Exploiting Heterogeneous PIM Devices to Design a 3-D Manycore Architecture for DNN Training.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chukwufumnanya Ogbogu, Gaurav Narang, Biresh Kumar Joardar, Janardhan Rao Doppa, Krishnendu Chakrabarty, Partha Pratim Pande
2024 J jnl
TEFLON: Thermally Efficient Dataflow-aware 3D NoC for Accelerating CNN Inferencing on Manycore PIM Architectures.
ACM Trans. Embed. Comput. Syst.
Gaurav Narang, Chukwufumnanya Ogbogu, Janardhan Rao Doppa, Partha Pratim Pande
2023 J jnl
Dynamic Power Management in Large Manycore Systems: A Learning-to-Search Framework.
ACM Trans. Design Autom. Electr. Syst.
Gaurav Narang, Aryan Deshwal, Raid Ayoub, Michael Kishinevsky, Janardhan Rao Doppa, Partha Pratim Pande
2023 A conf
Uncertainty-Aware Online Learning for Dynamic Power Management in Large Manycore Systems.
ISLPED
Gaurav Narang, Raid Ayoub, Michael Kishinevsky, Janardhan Rao Doppa, Partha Pratim Pande
2016 — conf
Heterogeneous memory assembly exploration using a floorplan and interconnect aware framework.
SoCC
Prakhar Raj Gupta, G. S. Visweswaran, Gaurav Narang, Anuj Grover
2015 — conf
Floorplan and congestion aware framework for optimal SRAM selection for memory subsystems.
SoCC
Gaurav Narang, Alexander Fell, Prakhar Raj Gupta, Anuj Grover
2015 Misc conf
Statistical Analysis of 64Mb SRAM for Optimizing Yield and Write Performance.
VLSID
Gaurav Narang, Pragya Sharma, Mansi Jain, Anuj Grover