Gary William Grewal

33 papers A* 1A 2B 1C 2Misc 6Journal 9Unranked 12

Year	Rank	Type	Title / Venue / Authors
2023	C	`conf`	A Deterministic Parallel Routing Approach for Accelerating Pathfinder-based Algorithms. VLSI-SoC Umair F. Siddiqi, Gary William Grewal, Shawki Areibi
2023	—	`conf`	FPGA Placement: Dynamic Decision Making Via Machine Learning. SBCCI Timothy Martin, Charlotte Barnes, Gary William Grewal, Shawki Areibi
2022	—	`conf`	Integrating Machine-Learning Probes into the VTR FPGA Design Flow. SBCCI Timothy Martin, Charlotte Barnes, Gary William Grewal, Shawki Areibi
2020	J	`jnl`	Machine Learning for Congestion Management and Routability Prediction within FPGA Placement. ACM Trans. Design Autom. Electr. Syst. Hannah Szentimrey, Abeer Y. Al-Hyari, Jérémy Foxcroft, Timothy Martin, David Noel, Gary William Grewal, Shawki Areibi
2018	J	`jnl`	Corrigendum to "An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization". Int. J. Reconfigurable Comput. Omar Ahmed, Shawki Areibi, Robert Collier, Gary William Grewal
2017	A	`conf`	A Machine Learning Framework for FPGA Placement (Abstract Only). FPGA Gary William Grewal, Shawki Areibi, Matthew Westrik, Ziad Abuowaimer, Betty Zhao
2016	J	`jnl`	An Efficient Evolutionary Task Scheduling/Binding Framework for Reconfigurable Systems. Int. J. Reconfigurable Comput. Ahmed Al-Wattar, Shawki Areibi, Gary William Grewal
2016	—	`conf`	Historical Data Integration a Study of WWI Canadian Soldiers. ICDM Workshops Luiza Antonie, Harshavardhan Gadgil, Gary William Grewal, Kris Inwood
2015	J	`jnl`	Efficient Mapping and Allocation of Execution Units to Task Graphs using an Evolutionary Framework. SIGARCH Comput. Archit. News Ahmed Al-Wattar, Shawki Areibi, Gary William Grewal
2015	—	`conf`	Scalable analytic placement for FPGA on GPGPU. ReConFig Ryan Pattison, Christian Fobel, Gary William Grewal, Shawki Areibi
2014	B	`conf`	A scalable, serially-equivalent, high-quality parallel placement methodology suitable for modern multicore and GPU architectures. FPL Christian Fobel, Gary William Grewal, Deborah A. Stacey
2014	—	`conf`	Comparing Classifiers in Historical Census Linkage. ICDM Workshops Laura Richards, Luiza Antonie, Shawki Areibi, Gary William Grewal, Kris Inwood, J. Andrew Ross
2014	—	`conf`	Forward-scaling, serially equivalent parallelism for FPGA placement. ACM Great Lakes Symposium on VLSI Christian Fobel, Gary William Grewal, Deborah A. Stacey
2013	J	`jnl`	An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization. Int. J. Reconfigurable Comput. Omar Ahmed, Shawki Areibi, Robert Collier, Gary William Grewal
2013	J	`jnl`	Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm. Int. J. Reconfigurable Comput. Omar Ahmed, Shawki Areibi, Gary William Grewal
2012	J	`jnl`	An Empirical Investigation on System and Statement Level Parallelism Strategies for Accelerating Scatter Search Using Handel-C and Impulse-C. VLSI Design Maxwell Walton, Omar Ahmed, Gary William Grewal, Shawki Areibi
2012	A	`conf`	Depictions of genotypic space for evaluating the suitability of different recombination operators. GECCO Robert Collier, Christian Fobel, Gary William Grewal, Mark Wineberg
2010	—	`conf`	An investigation of parallel memetic algorithms for VLSI circuit partitioning on multi-core computers. CCECE Ed Armstrong, Gary William Grewal, Shawki Areibi, Gerarda A. Darlington
2010	—	`conf`	Hardware acceleration of Scatter Search. HPCS Maxwell Walton, Gary William Grewal, Gerarda A. Darlington
2006	—	`conf`	Clustering Hanan Points to Reduce Vlsi Interconnect Routing Times. CCECE Shouvik Chowdhury, Gary William Grewal, Dilip K. Banerji
2004	—	`conf`	A Fast Hierarchical Approach to FPGA Placement. ESA/VLSI Peng Du, Gary William Grewal, Shawki Areibi, Dilip K. Banerji
2004	Misc	`conf`	An Approximate Solution for Steiner Trees in Multicast Routing. IC-AI Gary William Grewal, Ming Xu, Charlie Obimbo
2004	Misc	`conf`	Shrubbery: A New Algorithm for Quickly Growing High-Quality Steiner Trees. VLSI Design Gary William Grewal, Thomas Charles Wilson, Ming Xu, Dilip K. Banerji
2003	Misc	`conf`	Hierarchical Genetic Algorithms Applied to Datapath Synthesis. IC-AI Gary William Grewal, Mike O'Cleirigh, Charlie Obimbo
2003	J	`jnl`	Mapping Reference Code to Irregular DSPS within the Retargetable, Optimizing Compiler Cogen(T). Int. J. Comput. Intell. Appl. Gary William Grewal, Thomas Charles Wilson
2002	Misc	`conf`	An Enhanced Genetic Algorithm Approach to the Channel Assignment Problem in Mobile Cellular Networks. AI Gary William Grewal, Thomas Charles Wilson, Christopher W. Nell
2001	J	`jnl`	An Enhanced Genetic Algorithm for Solving the High-Level Synthesis Problems of Scheduling, Allocation, and Binding. Int. J. Comput. Intell. Appl. Gary William Grewal, Thomas Charles Wilson
2001	A*	`conf`	Mapping reference code to irregular DSPs within the retargetable, optimizing compiler COGEN(T). MICRO Gary William Grewal, Thomas Charles Wilson
1997	Misc	`conf`	An Enhanced Genetic Solution for Scheduling, Module Allocation, and Binding in VLSI Design. VLSI Design Gary William Grewal, Thomas Charles Wilson
1997	Misc	`conf`	Shake And Bake: A Method of Mapping Code to Irregular DSPs. VLSI Design Thomas Charles Wilson, Gary William Grewal
1996	—	`conf`	A Global Mode Instruction Minimization Technique for Embedded DSPs. Great Lakes Symposium on VLSI Gary William Grewal
1994	C	`conf`	An ILP Solution for Simultaneous Scheduling, Allocation, and Binding in Multiple Block Synthesis. ICCD Thomas Charles Wilson, Gary William Grewal, Dilip K. Banerji
1994	—	`conf`	An ILP-based approach to code generation. Code Generation for Embedded Processors Thomas Charles Wilson, Gary William Grewal, Shawn Henshall, Dilip K. Banerji