Gary D. Hachtel

71 papers A* 11A 20B 5C 3Journal 20Unranked 8
YearRankTypeTitle / Venue / Authors
2006 — book
Abstraction Refinement for Large Scale Model Checking
Chao Wang, Gary D. Hachtel, Fabio Somenzi
2006 J jnl
Compositional SCC Analysis for Language Emptiness.
Formal Methods Syst. Des.
Chao Wang, Roderick Bloem, Gary D. Hachtel, Kavita Ravi, Fabio Somenzi
2006 J jnl
Improving Ariadne's Bundle by Following Multiple Threads in Abstraction Refinement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chao Wang, Bing Li, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi
2006 — book
Logic synthesis and verification algorithms.
Gary D. Hachtel, Fabio Somenzi
2004 C conf
Fine-Grain Abstraction and Sequential Don't Cares for Large Scale Model Checking.
ICCD
Chao Wang, Gary D. Hachtel, Fabio Somenzi
2004 A* conf
Refining the SAT decision ordering for bounded model checking.
DAC
Chao Wang, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi
2003 A conf
Improving Ariadneýs Bundle by Following Multiple Threads in Abstraction Refinement.
ICCAD
Chao Wang, Bing Li, HoonSang Jin, Gary D. Hachtel, Fabio Somenzi
2003 A conf
The Compositional Far Side of Image Computation.
ICCAD
Chao Wang, Gary D. Hachtel, Fabio Somenzi
2002 B conf
Sharp Disjunctive Decomposition for Language Emptiness Checking.
FMCAD
Chao Wang, Gary D. Hachtel
2001 B conf
Divide and Compose: SCC Refinement for Language Emptiness.
CONCUR
Chao Wang, Roderick Bloem, Gary D. Hachtel, Kavita Ravi, Fabio Somenzi
2000 B conf
Border-Block Triangular Form and Conjunction Schedule in Image Computation.
FMCAD
In-Ho Moon, Gary D. Hachtel, Fabio Somenzi
2000 A conf
Iterative Abstraction-Based CTL Model Checking.
DATE
Jae-Young Jang, In-Ho Moon, Gary D. Hachtel
1998 A conf
Approximate reachability don't cares for CTL model checking.
ICCAD
In-Ho Moon, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi, Jun Yuan, Carl Pixley
1998 A* conf
Incremental CTL Model Checking Using BDD Subsetting.
DAC
Abelardo Pardo, Gary D. Hachtel
1997 J jnl
A Symbolic Algorithms for Maximum Flow in 0-1 Networks.
Formal Methods Syst. Des.
Gary D. Hachtel, Fabio Somenzi
1997 J jnl
Algebraic Decision Diagrams and Their Applications.
Formal Methods Syst. Des.
R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi
1997 A* conf
Automatic Abstraction Techniques for Propositional µ-calculus Model Checking.
CAV
Abelardo Pardo, Gary D. Hachtel
1997 J jnl
Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi
1996 J jnl
Algorithms for approximate FSM traversal based on state space decomposition.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi
1996 J jnl
Automatic state space decomposition for approximate FSM traversal based on circuit analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi
1996 — book
Logic synthesis and verification algorithms.
Gary D. Hachtel, Fabio Somenzi
1996 J jnl
Markovian analysis of large finite state machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi
1996 B conf
Modular Verification of Multipliers.
FMCAD
Kavita Ravi, Abelardo Pardo, Gary D. Hachtel, Fabio Somenzi
1996 A conf
Symbolic computation of logic implications for technology-dependent low-power synthesis.
ISLPED
R. Iris Bahar, M. Burns, Gary D. Hachtel, Enrico Macii, H. Shin, Fabio Somenzi
1996 A conf
Tearing based automatic abstraction for CTL model checking.
ICCAD
Woohyuk Lee, Abelardo Pardo, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi
1996 B conf
VIS.
FMCAD
Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
1996 A* conf
VIS: A System for Verification and Synthesis.
CAV
Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli, Fabio Somenzi, Adnan Aziz, Szu-Tsung Cheng, Stephen A. Edwards, Sunil P. Khatri, Yuji Kukimoto, Abelardo Pardo, Shaz Qadeer, Rajeev K. Ranjan, Shaker Sarwary, Thomas R. Shiple, Gitanjali Swamy, Tiziano Villa
1995 — conf
CMOS dynamic power estimation based on collapsible current source transistor modeling.
ISLPD
Abelardo Pardo, R. Iris Bahar, Srilatha Manne, Peter Feldmann, Gary D. Hachtel, Fabio Somenzi
1995 A* conf
Computing the Maximum Power Cycles of a Sequential Circuit.
DAC
Srilatha Manne, Abelardo Pardo, R. Iris Bahar, Gary D. Hachtel, Fabio Somenzi, Enrico Macii, Massimo Poncino
1994 — conf
A State Space Decomposition Algorithm for Approximate FSM Traversal.
EDAC-ETC-EUROASIC
Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi
1994 C conf
A Structural Approach to State Space Decomposition for Approximate Reachability Analysis.
ICCD
Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Massimo Poncino, Fabio Somenzi
1994 A conf
A symbolic method to reduce power consumption of circuits containing false paths.
ICCAD
R. Iris Bahar, Gary D. Hachtel, Enrico Macii, Fabio Somenzi
1994 — conf
An ADD-based algorithm for shortest path back-tracing of large graphs.
Great Lakes Symposium on VLSI
R. Iris Bahar, Gary D. Hachtel, Abelardo Pardo, Massimo Poncino, Fabio Somenzi
1994 J jnl
Exact and heuristic algorithms for the minimization of incompletely specified state machines.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
June-Kyung Rho, Gary D. Hachtel, Fabio Somenzi, Reily M. Jacoby
1994 J jnl
Exact calculation of synchronizing sequences based on binary decision diagrams.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Carl Pixley, Seh-Woong Jeong, Gary D. Hachtel
1994 J jnl
Extended BDDs: Trading off Canonicity for Structure in Verification Algorithms.
Formal Methods Syst. Des.
Bernard Plessier, Gary D. Hachtel, Fabio Somenzi
1994 A* conf
Probabilistic Analysis of Large Finite State Machines.
DAC
Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi
1994 A conf
Re-encoding sequential circuits to reduce power dissipation.
ICCAD
Gary D. Hachtel, Mariano Hermida de la Rica, Abelardo Pardo, Massimo Poncino, Fabio Somenzi
1994 — conf
Symbolic Algorithms to Calculate Steady-State Probabilities of a Finite State Machine.
EDAC-ETC-EUROASIC
Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi
1994 — conf
Timing Analysis of Combinational Circuits using ADD's.
EDAC-ETC-EUROASIC
R. Iris Bahar, Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Fabio Somenzi
1993 A conf
A symbolic algorithm for maximum flow in 0-1 networks.
ICCAD
Gary D. Hachtel, Fabio Somenzi
1993 A conf
Algebraic decision diagrams and their applications.
ICCAD
R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi
1993 A* conf
Algorithms for Approximate FSM Traversal.
DAC
Hyunwoo Cho, Gary D. Hachtel, Enrico Macii, Bernard Plessier, Fabio Somenzi
1993 J jnl
Redundancy identification/removal and test generation for sequential circuits using implicit state enumeration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi
1992 A* conf
Exact Calculation of Synchronization Sequences Based on Binary Decision Diagrams.
DAC
Carl Pixley, Seh-Woong Jeong, Gary D. Hachtel
1992 J jnl
On properties of algebraic transformations and the synthesis of multifault-irredundant circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gary D. Hachtel, Reily M. Jacoby, Kurt Keutzer, Christopher R. Morrison
1991 A conf
Don't Care Sequences and the Optimization of Interacting Finite State Machines.
ICCAD
June-Kyung Rho, Gary D. Hachtel, Fabio Somenzi
1991 — conf
Exact and heuristic algorithms for the minimization of incompletely specified state machines.
EURO-DAC
Gary D. Hachtel, June-Kyung Rho, Fabio Somenzi, Reily M. Jacoby
1991 A conf
Extended BDD's: Trading off Canonicity for Structure in Verification Algorithms.
ICCAD
Seh-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi
1991 A conf
Fast Sequential ATPG Based on Implicit State Enumeration.
ITC
Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi
1991 J jnl
MUSE: a multilevel symbolic encoding algorithm for state assignment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xuejun Du, Gary D. Hachtel, Bill Lin, A. Richard Newton
1991 C conf
Redundancy Identification and Removal Based on Implicit State Enumeration.
ICCD
Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi
1991 A conf
Variable Ordering and Selection for FSM Traversal.
ICCAD
Seon-Woong Jeong, Bernard Plessier, Gary D. Hachtel, Fabio Somenzi
1990 A conf
ATPG Aspects of FSM Verification.
ICCAD
Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi
1990 J jnl
Multilevel logic synthesis.
Proc. IEEE
Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli
1990 — conf
Results on the Interface between Formal Verification and ATPG.
CAV (DIMACS/AMS volume)
Hyunwoo Cho, Gary D. Hachtel, Seh-Woong Jeong, Bernard Plessier, Eric M. Schwarz, Fabio Somenzi
1989 J jnl
Linear complexity algorithms for hierarchical routing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gary D. Hachtel, Christopher R. Morrison
1989 A conf
New ATPG techniques for logic optimization.
ICCAD
Reily M. Jacoby, P. Moceyunas, Hyunwoo Cho, Gary D. Hachtel
1989 A conf
On optimal extraction of combinational logic and don't care sets from hardware description languages.
ICCAD
Glenn Colón-Bonet, Eric M. Schwarz, D. G. Bostick, Gary D. Hachtel, Michael R. Lightner
1989 A conf
On properties of algebraic transformation and the multifault testability of multilevel logic.
ICCAD
Gary D. Hachtel, Reily M. Jacoby, Kurt Keutzer, Christopher R. Morrison
1988 A conf
BEATNP: a tool for partitioning Boolean networks.
ICCAD
Hyunwoo Cho, Gary D. Hachtel, M. Nash, L. Setiono
1988 J jnl
Multi-level logic minimization using implicit don't cares.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Karen A. Bartlett, Robert K. Brayton, Gary D. Hachtel, Reily M. Jacoby, Christopher R. Morrison, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli, Albert R. Wang
1988 A conf
Performance enhancements in BOLD using 'implications'.
ICCAD
Gary D. Hachtel, Reily M. Jacoby, P. Moceyunas, Christopher R. Morrison
1988 J jnl
Verification algorithms for VLSI synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gary D. Hachtel, Reily M. Jacoby
1986 A* conf
SOCRATES: a system for automatically synthesizing and optimizing combinational logic.
DAC
David Gregory, Karen A. Bartlett, Aart J. de Geus, Gary D. Hachtel
1986 J jnl
Synthesis and Optimization of Multilevel Logic under Timing Constraints.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Karen A. Bartlett, William W. Cohen, Aart J. de Geus, Gary D. Hachtel
1984 — conf
A Theory and Algorithmic Frame for Switch Level Simulation.
IMACS European Simulation Meeting
Michael R. Lightner, Gary D. Hachtel, Richard H. Byrd, Michel Heydemann
1984 — book
Logic Minimization Algorithms for VLSI Synthesis
Robert K. Brayton, Gary D. Hachtel, Curtis T. McMullen, Alberto L. Sangiovanni-Vincentelli
1982 J jnl
An Algorithm for Optimal PLA Folding.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli
1982 A* conf
Implication algorithms for MOS switch level functional macromodeling implication and testing.
DAC
Michael R. Lightner, Gary D. Hachtel
1982 A* conf
Techniques for programmable logic array folding.
DAC
Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli