Garrett S. Rose

163 papers A* 2A 2B 7C 13Misc 4Journal 54Unranked 77

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	An Exploration of a Heterogeneous Neural Configuration of SNNs. ACM Great Lakes Symposium on VLSI George Evans, Karan P. Patel, Catherine D. Schuman, Garrett S. Rose, Srutarshi Banerjee, Hritom Das
2025	J	`jnl`	Guest Editorial: Selected Papers From IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2024. IEEE Trans. Very Large Scale Integr. Syst. Himanshu Thapliyal, Jürgen Becker, Garrett S. Rose, Tosiron Adegbija, Selçuk Köse
2025	J	`jnl`	Harnessing Unipolar Threshold Switches for Enhanced Rectification. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Md. Mazharul Islam, Shamiul Alam, Garrett S. Rose, Aly E. Fathy, Sumeet Kumar Gupta, Ahmedullah Aziz
2025	—	`conf`	In-Memory Template Matching with Approximated PCC Computation Leveraging Memristive System. ISQED Sree Nirmillo Biswash Tushar, Sk Hasibul Alam, Graham Buchanan, Rocco Febbo, Hritom Das, Garrett S. Rose
2025	J	`jnl`	In-Sensor Motion Recognition with Memristive System and Light Sensing Surfaces. CoRR Hritom Das, Imran Fahad, SNB Tushar, Sk Hasibul Alam, Graham Buchanan, Danny Scott, Garrett S. Rose, Sai Swaminathan
2025	J	`jnl`	MTJ/CMOS-Based CLB Design for Low-Power and CPA-Resistant Secure Nonvolatile FPGA. IEEE Trans. Very Large Scale Integr. Syst. Milad Tanavardi Nasab, Himanshu Thapliyal, Garrett S. Rose
2024	—	`conf`	A Memristive Reconfigurable Neuromorphic Array for Neuro-Inspired Dynamic Architectures. ISVLSI Hritom Das, Nishith N. Chakraborty, Manu Rathore, Sk Hasibul Alam, Catherine D. Schuman, Garrett S. Rose
2024	C	`conf`	AnSpiCS-Net: Reconfigurable Network-on-Chip for Analog Spiking Recurrent Neural Networks. ISCAS Manu Rathore, Garrett S. Rose
2024	—	`conf`	Embracing the Hairball: An Investigation of Recurrence in Spiking Neural Networks for Control. NICE Catherine D. Schuman, Charles P. Rizzo, Garrett S. Rose, James S. Plank
2024	—	`conf`	Evaluation of Neuron Parameters on the Performance of Spiking Neural Networks and Neuromorphic Hardware. ISVLSI Catherine D. Schuman, Hritom Das, Garrett S. Rose, James S. Plank
2024	J	`jnl`	Hardware software co-design for leveraging STDP in a memristive neuroprocessor. Neuromorph. Comput. Eng. Nishith N. Chakraborty, Shelah Ameli, Hritom Das, Catherine D. Schuman, Garrett S. Rose
2024	—	`conf`	Hardware-Application Co-Design to Evaluate the Performance of an STDP-based Reservoir Computer. ISVLSI Hritom Das, Karan P. Patel, Shelah Ameli, Nishith N. Chakraborty, Catherine D. Schuman, Garrett S. Rose
2024	C	`conf`	HfO2-Based Synaptic Spiking Neural Network Evaluation to Optimize Design and Testing Cost. ISCAS SNB Tushar, Hritom Das, Garrett S. Rose
2024	—	`conf`	In-Memory Computation Using CMOS-Integrated Resistive RAM for Robotic Navigation. ICONS Jeelka Solanki, Jacob Pelton, Rocco Febbo, Maximilian Liehr, Andrew DeCandia, Karsten Beckmann, Garrett S. Rose, Nathaniel C. Cady
2024	—	`conf`	In-Sensor Motion Recognition with Memristive System and Light Sensing Surfaces. ISVLSI Hritom Das, Imran Fahad, SNB Tushar, Sk Hasibul Alam, Graham Buchanan, Danny Scott, Garrett S. Rose, Sai Swaminathan
2024	—	`conf`	Leveraging Sparsity of SRNNs for Reconfigurable and Resource-Efficient Network-on-Chip. NICE Manu Rathore, Garrett S. Rose
2024	—	`conf`	Maximizing Efficiency of SNN-Based Reservoir Computing via NoC-Assisted Dimensionality Reduction. ISVLSI Manu Rathore, Garrett S. Rose
2024	—	`conf`	Message from the Technical Program Chairs; ISVLSI 2024. ISVLSI Garrett S. Rose, Tosiron Adegbija, Selçuk Köse
2024	Misc	`conf`	SpiCS-Net: Circuit Switched Network on Chip for Area-Efficient Spiking Recurrent Neural Networks. VLSID Manu Rathore, Garrett S. Rose
2023	—	`conf`	A Mixed-Signal Short-Term Plasticity Implementation for a Current-Controlled Memristive Synapse. ACM Great Lakes Symposium on VLSI Nishith N. Chakraborty, Hritom Das, Garrett S. Rose
2023	—	`conf`	A Runtime-Reconfigurable Hardware Encoder for Spiking Neural Networks. ACM Great Lakes Symposium on VLSI Sk Hasibul Alam, Adam Z. Foshie, Garrett S. Rose
2023	J	`jnl`	A Single Chip SPAD Based Vision Sensing System With Integrated Memristive Spiking Neuromorphic Processing. IEEE Access Mst Shamim Ara Shawkat, Md Musabbir Adnan, Rocco D. Febbo, John J. Murray, Garrett S. Rose
2023	—	`conf`	Algorithm and Application Impacts of Programmable Plasticity in Spiking Neuromorphic Hardware. ICONS Shelah Ameli, Adam Z. Foshie, Drew Friend, James S. Plank, Garrett S. Rose, Catherine D. Schuman
2023	J	`jnl`	An Efficient and Accurate Memristive Memory for Array-Based Spiking Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. Hritom Das, Rocco D. Febbo, Sree Nirmillo Biswash Tushar, Nishith N. Chakraborty, Maximilian Liehr, Nathaniel C. Cady, Garrett S. Rose
2023	J	`jnl`	An Efficient and Accurate Memristive Memory for Array-based Spiking Neural Networks. CoRR Hritom Das, Rocco D. Febbo, Sree Nirmillo Biswash Tushar, Nishith N. Chakraborty, Maximilian Liehr, Nathaniel C. Cady, Garrett S. Rose
2023	—	`conf`	Energy Efficient and High-Performance Synaptic Operating Point Evaluation for SNN Applications. MWSCAS Nishith N. Chakraborty, SNB Tushar, Hritom Das, Garrett S. Rose
2023	J	`jnl`	Enhanced Read Resolution in Reconfigurable Memristive Synapses for Spiking Neural Networks. CoRR Hritom Das, Nishith N. Chakraborty, Catherine D. Schuman, Garrett S. Rose
2023	Misc	`conf`	Evaluating Neuron Models through Application-Hardware Co-Design. ACSSC Catherine D. Schuman, Hritom Das, James S. Plank, Ahmedullah Aziz, Garrett S. Rose
2023	J	`jnl`	Functional Specification of the RAVENS Neuroprocessor. CoRR Adam Z. Foshie, James S. Plank, Garrett S. Rose, Catherine D. Schuman
2023	—	`conf`	Homeostatic Plasticity in a Leaky Integrate and Fire Neuron Using Tunable Leak. MWSCAS Nishith N. Chakraborty, Hritom Das, Garrett S. Rose
2023	J	`jnl`	Optimizations for a Current-Controlled Memristor- Based Neuromorphic Synapse Design. IEEE J. Emerg. Sel. Topics Circuits Syst. Hritom Das, Rocco D. Febbo, Charles P. Rizzo, Nishith N. Chakraborty, James S. Plank, Garrett S. Rose
2023	J	`jnl`	Optimizations for a Current-Controlled Memristor-based Neuromorphic Synapse Design. CoRR Hritom Das, Rocco D. Febbo, Charles Rizzo, Nishith N. Chakraborty, James S. Plank, Garrett S. Rose
2023	—	`conf`	RFAM: RESET-Failure-Aware-Model for HfO2-based Memristor to Enhance the Reliability of Neuromorphic Design. ACM Great Lakes Symposium on VLSI Hritom Das, Manu Rathore, Rocco Febbo, Maximilian Liehr, Nathaniel C. Cady, Garrett S. Rose
2023	J	`jnl`	Reimagining Sense Amplifiers: Harnessing Phase Transition Materials for Current and Voltage Sensing. CoRR Md. Mazharul Islam, Shamiul Alam, Mohammad Adnan Jahangir, Garrett S. Rose, Suman Datta, Vijaykrishnan Narayanan, Sumeet Kumar Gupta, Ahmedullah Aziz
2023	—	`conf`	Reliability Analysis of Memristive Reservoir Computing Architecture. ACM Great Lakes Symposium on VLSI Manu Rathore, Rocco D. Febbo, Adam Z. Foshie, Sree Nirmillo Biswash Tushar, Hritom Das, Garrett S. Rose
2023	—	`conf`	Spike-Driven Synaptic Plasticity for a Memristive Neuromorphic Core. MWSCAS Nishith N. Chakraborty, Hritom Das, Garrett S. Rose
2023	—	`conf`	Spike-Timing-Dependent Plasticity for a Hafnium-Oxide Memristive Synapse. MWSCAS Nishith N. Chakraborty, Hritom Das, Garrett S. Rose
2023	J	`jnl`	Spike-based Neuromorphic Computing for Next-Generation Computer Vision. CoRR Md Sakib Hasan, Catherine D. Schuman, Zhongyang Zhang, Tauhidur Rahman, Garrett S. Rose
2022	—	`conf`	A Compact Model for the Variable Switching Dynamics of HfO2 Memristors. MWSCAS Manu Rathore, Ryan Weiss, Mst Shamim Ara Shawkat, Garrett S. Rose, Maximilian Liehr, Minhaz Abedin, Sarah Rafiq, Nathaniel C. Cady
2022	—	`conf`	A Framework to Enable Top-Down Co-Design of Neuromorphic Systems for Real-World Applications. NICE Catherine D. Schuman, James S. Plank, Robert M. Patton, Thomas E. Potok, Garrett S. Rose
2022	J	`jnl`	A Generalized Workflow for Creating Machine Learning-Powered Compact Models for Multi-State Devices. IEEE Access Jack Hutchins, Shamiul Alam, Andre Zeumault, Karsten Beckmann, Nathaniel C. Cady, Garrett S. Rose, Ahmedullah Aziz
2022	—	`conf`	Benchmark Comparisons of Spike-based Reconfigurable Neuroprocessor Architectures for Control Applications. ACM Great Lakes Symposium on VLSI Adam Z. Foshie, Charles Rizzo, Hritom Das, Chaohui Zheng, James S. Plank, Garrett S. Rose
2022	J	`jnl`	Disclosure of a Neuromorphic Starter Kit. CoRR James S. Plank, Bryson Gullett, Adam Z. Foshie, Garrett S. Rose, Catherine D. Schuman
2022	J	`jnl`	Introduction to the Special Issue on Hardware-Assisted Security for Emerging Internet of Things. ACM J. Emerg. Technol. Comput. Syst. Saraju P. Mohanty, Jim Plusquellic, Garrett S. Rose, Wei Zhang, Maria K. Michael
2022	—	`conf`	On-Chip Interface for Event based Sensor and Spiking Neuromorphic Processing. MWSCAS Md Musabbir Adnan, Mst Shamim Ara Shawkat, Rocco D. Febbo, Garrett S. Rose
2022	C	`conf`	Programmable Refractory Period Implementations in a Mixed-Signal Integrate-And-Fire Neuron. ISCAS Nishith N. Chakraborty, Garrett S. Rose, Min H. Kao
2022	—	`conf`	STDP Based Online Learning for a Current-Controlled Memristive Synapse. MWSCAS Ryan Weiss, Hritom Das, Nishith N. Chakraborty, Garrett S. Rose
2022	J	`jnl`	The Case for RISP: A Reduced Instruction Spiking Processor. CoRR James S. Plank, Chaohui Zheng, Bryson Gullett, Nicholas D. Skuda, Charles Rizzo, Catherine D. Schuman, Garrett S. Rose
2022	J	`jnl`	Unsupervised Digit Recognition Using Cosine Similarity In A Neuromemristive Competitive Learning System. ACM J. Emerg. Technol. Comput. Syst. Bon Woong Ku, Catherine D. Schuman, Md Musabbir Adnan, Tiffany M. Mintz, Raphael C. Pooser, Kathleen E. Hamilton, Garrett S. Rose, Sung Kyu Lim
2022	—	`conf`	Variation-aware Design Space Exploration of Mott Memristor-based Neuristors. ISVLSI Shamiul Alam, Md. Mazharul Islam, Akhilesh Jaiswal, Nathaniel C. Cady, Garrett S. Rose, Ahmedullah Aziz
2021	—	`conf`	A Multi-Context Neural Core Design for Reconfigurable Neuromorphic Arrays. ISVLSI Adam Z. Foshie, Nishith N. Chakraborty, John J. Murray, Tanner J. Fowler, Mst Shamim Ara Shawkat, Garrett S. Rose
2021	J	`jnl`	A system design perspective on neuromorphic computer processors. Neuromorph. Comput. Eng. Garrett S. Rose, Mst Shamim Ara Shawkat, Adam Z. Foshie, John J. Murray, Md Musabbir Adnan
2021	—	`conf`	Capacitor-Less Memristive Integrate-and-Fire Neuron with Stochastic Behavior. MWSCAS Samuel D. Brown, Md Musabbir Adnan, Mst Shamim Ara Shawkat, Garrett S. Rose
2021	J	`jnl`	Design of a Robust Memristive Spiking Neuromorphic System with Unsupervised Learning in Hardware. ACM J. Emerg. Technol. Comput. Syst. Md Musabbir Adnan, Sagarvarma Sayyaparaju, Samuel D. Brown, Mst Shamim Ara Shawkat, Catherine D. Schuman, Garrett S. Rose
2021	J	`jnl`	Design of an Enhanced Reconfigurable Chaotic Oscillator using G4FET-NDR Based Discrete Map. CoRR Md Sakib Hasan, Aysha S. Shanta, Partha Sarathi Paul, Maisha Sadia, Md. Badruddoja Majumder, Garrett S. Rose
2021	—	`ed.`	ICONS 2021: International Conference on Neuromorphic Systems 2021, Knoxville, TN, USA, July 27-29, 2021 ICONS Thomas E. Potok, Melika Payvand, Catherine D. Schuman, Prasanna Date, Mutsumi Kimura, Cory E. Merkel, Brad Aimone, Sonia M. Buckley, Yiran Chen, Gregory Cohen, Todd Hylton, Robert M. Patton, Robinson E. Pino, Garrett S. Rose
2021	J	`jnl`	Physically Unclonable and Reconfigurable Computing System (PURCS) for Hardware Security Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Aysha S. Shanta, Md. Badruddoja Majumder, Md Sakib Hasan, Garrett S. Rose
2021	—	`conf`	Scaling Constraints for Memristor-based Programmable Interconnect in Reconfigurable Computing Arrays. ISVLSI John J. Murray, Adam Z. Foshie, Mst Shamim Ara Shawkat, Garrett S. Rose
2020	J	`jnl`	A Chaos-Based Complex Micro-instruction Set for Mitigating Instruction Reverse Engineering. J. Hardw. Syst. Secur. Md Sakib Hasan, Md. Badruddoja Majumder, Aysha S. Shanta, Mesbah Uddin, Garrett S. Rose
2020	J	`jnl`	A Secure Back-up and Restore for Resource-Constrained IoT based on Nanotechnology. CoRR Mesbah Uddin, Md. Badruddoja Majumder, Md Sakib Hasan, Garrett S. Rose
2020	B	`conf`	Automated Design of Neuromorphic Networks for Scientific Applications at the Edge. IJCNN Catherine D. Schuman, J. Parker Mitchell, Maryam Parsa, James S. Plank, Samuel D. Brown, Garrett S. Rose, Robert M. Patton, Thomas E. Potok
2020	C	`conf`	Circuit Techniques for Efficient Implementation of Memristor Based Reservoir Computing. ISCAS Sagarvarma Sayyaparaju, Mst Shamim Ara Shawkat, Md Musabbir Adnan, Garrett S. Rose
2020	J	`jnl`	Device-aware Circuit Design for Robust Memristive Neuromorphic Systems with STDP-based Learning. ACM J. Emerg. Technol. Comput. Syst. Sagarvarma Sayyaparaju, Md Musabbir Adnan, Sherif Amer, Garrett S. Rose
2020	B	`conf`	GRANT: Ground-Roaming Autonomous Neuromorphic Targeter. IJCNN Jonathan D. Ambrose, Adam Z. Foshie, Mark E. Dean, James S. Plank, Garrett S. Rose, J. Parker Mitchell, Catherine D. Schuman, Grant Bruer
2020	B	`conf`	Scaled-up Neuromorphic Array Communications Controller (SNACC) for Large-scale Neural Networks. IJCNN Aaron R. Young, Adam Z. Foshie, Mark E. Dean, James S. Plank, Garrett S. Rose, J. Parker Mitchell, Catherine D. Schuman
2020	—	`conf`	Single Photon Avalanche Diode based Vision Sensor with On-Chip Memristive Spiking Neuromorphic Processing. MWSCAS Mst Shamim Ara Shawkat, Sagarvarma Sayyarparaju, Nicole McFarlane, Garrett S. Rose
2020	J	`jnl`	Towards Synaptic Behavior of Nanoscale ReRAM Devices for Neuromorphic Computing Applications. ACM J. Emerg. Technol. Comput. Syst. Karsten Beckmann, Wilkie Olin-Ammentorp, Gangotree Chakma, Sherif Amer, Garrett S. Rose, Chris Hobbs, Joseph Van Nostrand, Martin Rodgers, Nathaniel C. Cady
2019	—	`conf`	A Multi-Driver Write Scheme for Reliable and Energy Efficient 1S1R ReRAM Crossbar Arrays. ISQED Sherif Amer, Garrett S. Rose
2019	J	`jnl`	A Review of Spiking Neuromorphic Hardware Communication Systems. IEEE Access Aaron R. Young, Mark E. Dean, James S. Plank, Garrett S. Rose
2019	—	`conf`	A Scan Register Based Access Scheme for Multilevel Non-Volatile Memristor Memory. ICECS Md Musabbir Adnan, Sherif Amer, Sagarvarma Sayyaparaju, Md Sakib Hasan, Garrett S. Rose
2019	J	`jnl`	A Secure Integrity Checking System for Nanoelectronic Resistive RAM. IEEE Trans. Very Large Scale Integr. Syst. Md. Badruddoja Majumder, Md Sakib Hasan, Mesbah Uddin, Garrett S. Rose
2019	—	`conf`	Design Considerations for Insulator Metal Transition based Artificial Neurons. MWSCAS Sherif Amer, Md Sakib Hasan, Md Musabbir Adnan, Garrett S. Rose
2019	—	`conf`	Design for Eliminating Operation Specific Power Signatures from Digital Logic. ACM Great Lakes Symposium on VLSI Md. Badruddoja Majumder, Md Sakib Hasan, Aysha S. Shanta, Mesbah Uddin, Garrett S. Rose
2019	—	`conf`	Design of a Lightweight Reconfigurable PRNG Using Three Transistor Chaotic Map. MWSCAS Aysha S. Shanta, Md Sakib Hasan, Md. Badruddoja Majumder, Garrett S. Rose
2019	—	`conf`	Fabrication and Performance of Hybrid ReRAM-CMOS Circuit Elements for Dynamic Neural Networks. ICONS Maximilian Liehr, Jubin Hazra, Karsten Beckmann, Wilkie Olin-Ammentorp, Nathaniel C. Cady, Ryan Weiss, Sagarvarma Sayyaparaju, Garrett S. Rose, Joseph Van Nostrand
2019	C	`conf`	Memristor Crossbar PUF based Lightweight Hardware Security for IoT. ICCE Mesbah Uddin, Aysha S. Shanta, Md. Badruddoja Majumder, Md Sakib Hasan, Garrett S. Rose
2019	—	`conf`	On the Theoretical Analysis of Memristor based True Random Number Generator. ACM Great Lakes Symposium on VLSI Mesbah Uddin, Md Sakib Hasan, Garrett S. Rose
2019	—	`conf`	Stochasticity in Neuromorphic Computing: Evaluating Randomness for Improved Performance. ICECS Samuel D. Brown, Gangotree Chakma, Md Musabbir Adnan, Md Sakib Hasan, Garrett S. Rose
2018	—	`conf`	A Mixed-Mode Neuron with On-chip Tunability for Generic Use in Memristive Neuromorphic Systems. ISVLSI Sagarvarma Sayyaparaju, Ryan Weiss, Garrett S. Rose
2018	C	`conf`	A Novel Scan-In Scheme for CMOS/ReRAM Programmable Logic Circuits. ISCAS Md Musabbir Adnan, Sherif Amer, Garrett S. Rose
2018	—	`conf`	A Practical Sense Amplifier Design for Memristive Crossbar Circuits (PUF). SoCC Mesbah Uddin, Garrett S. Rose
2018	—	`conf`	A Soft-Matter Biomolecular Memristor Synapse for Neuromorphic Systems. BioCAS Ryan Weiss, Joseph S. Najem, Md Sakib Hasan, Catherine D. Schuman, Alex Belianinov, C. Patrick Collier, Stephen A. Sarles, Garrett S. Rose
2018	J	`jnl`	A Study of Complex Deep Learning Networks on High-Performance, Neuromorphic, and Quantum Computers. ACM J. Emerg. Technol. Comput. Syst. Thomas E. Potok, Catherine D. Schuman, Steven R. Young, Robert M. Patton, Federico M. Spedalieri, Jeremy Liu, Ke-Thia Yao, Garrett S. Rose, Gangotree Chakma
2018	—	`conf`	A Twin Memristor Synapse for Spike Timing Dependent Learning in Neuromorphic Systems. SoCC Md Musabbir Adnan, Sagarvarma Sayyaparaju, Garrett S. Rose, Catherine D. Schuman, Bon Woong Ku, Sung Kyu Lim
2018	—	`conf`	A bi-memristor synapse with spike-timing-dependent plasticity for on-chip learning in memristive neuromorphic systems. ISQED Sagarvarma Sayyaparaju, Sherif Amer, Garrett S. Rose
2018	J	`jnl`	Adiabatic Quantum Computation Applied to Deep Learning Networks. Entropy Jeremy Liu, Federico M. Spedalieri, Ke-Thia Yao, Thomas E. Potok, Catherine D. Schuman, Steven R. Young, Robert M. Patton, Garrett S. Rose, Gangotree Chakma
2018	—	`conf`	Chaos computing for mitigating side channel attack. HOST Md. Badruddoja Majumder, Md Sakib Hasan, Mesbah Uddin, Garrett S. Rose
2018	J	`jnl`	Design Considerations for Memristive Crossbar Physical Unclonable Functions. ACM J. Emerg. Technol. Comput. Syst. Mesbah Uddin, Md. Badruddoja Majumder, Karsten Beckmann, Harika Manem, Zahiruddin Alamgir, Nathaniel C. Cady, Garrett S. Rose
2018	—	`conf`	Design of a Reconfigurable Chaos Gate with Enhanced Functionality Space in 65nm CMOS. MWSCAS Aysha S. Shanta, Md. Badruddoja Majumder, Md Sakib Hasan, Mesbah Uddin, Garrett S. Rose
2018	—	`conf`	Energy and Area Efficiency in Neuromorphic Computing for Resource Constrained Devices. ACM Great Lakes Symposium on VLSI Gangotree Chakma, Nicholas D. Skuda, Catherine D. Schuman, James S. Plank, Mark E. Dean, Garrett S. Rose
2018	C	`conf`	High-Level Simulation for Spiking Neuromorphic Computing Systems. ISCAS Nicholas D. Skuda, Catherine D. Schuman, Gangotree Chakma, James S. Plank, Garrett S. Rose
2018	J	`jnl`	Memristive Mixed-Signal Neuromorphic Systems: Energy-Efficient Learning at the Circuit-Level. IEEE J. Emerg. Sel. Topics Circuits Syst. Gangotree Chakma, Md Musabbir Adnan, Austin Wyer, Ryan Weiss, Catherine D. Schuman, Garrett S. Rose
2018	J	`jnl`	Nanoelectronic Security Designs for Resource-Constrained Internet of Things Devices: Finding Security Solutions with Nanoelectronic Hardwares. IEEE Consumer Electron. Mag. Mesbah Uddin, Md. Badruddoja Majumder, Garrett S. Rose
2018	B	`conf`	Neuromorphic Array Communications Controller to Support Large-Scale Neural Networks. IJCNN Aaron R. Young, Mark E. Dean, James S. Plank, Garrett S. Rose, Catherine D. Schuman
2018	J	`jnl`	Practical realisation of a return map immune Lorenz-based chaotic stream cipher in circuitry. IET Comput. Digit. Tech. Daniel Brown, Ava Hedayatipour, Md. Badruddoja Majumder, Garrett S. Rose, Nicole McFarlane, Donatello Materassi
2017	J	`jnl`	A Study of Complex Deep Learning Networks on High Performance, Neuromorphic, and Quantum Computers. CoRR Thomas E. Potok, Catherine D. Schuman, Steven R. Young, Robert M. Patton, Federico M. Spedalieri, Jeremy Liu, Ke-Thia Yao, Garrett S. Rose, Gangotree Chakma
2017	J	`jnl`	A Survey of Neuromorphic Computing and Neural Networks in Hardware. CoRR Catherine D. Schuman, Thomas E. Potok, Robert M. Patton, J. Douglas Birdwell, Mark E. Dean, Garrett S. Rose, James S. Plank
2017	—	`conf`	A Unified Hardware/Software Co-Design Framework for Neuromorphic Computing Devices and Applications. ICRC James S. Plank, Garrett S. Rose, Mark E. Dean, Catherine D. Schuman, Nathaniel C. Cady
2017	—	`conf`	A mixed-signal approach to memristive neuromorphic system design. MWSCAS Gangotree Chakma, Sagarvarma Sayyaparaju, Ryan Weiss, Garrett S. Rose
2017	C	`conf`	A practical hafnium-oxide memristor model suitable for circuit design and simulation. ISCAS Sherif Amer, Sagarvarma Sayyaparaju, Garrett S. Rose, Karsten Beckmann, Nathaniel C. Cady
2017	—	`conf`	A programming framework for neuromorphic systems with emerging technologies. NANOCOM Catherine D. Schuman, James S. Plank, Garrett S. Rose, Gangotree Chakma, Austin Wyer, Grant Bruer, Nouamane Laanait
2017	—	`conf`	A synchronized axon hillock neuron for memristive neuromorphic systems. MWSCAS Ryan Weiss, Gangotree Chakma, Garrett S. Rose
2017	—	`conf`	Circuit Techniques for Online Learning of Memristive Synapses in CMOS-Memristor Neuromorphic Systems. ACM Great Lakes Symposium on VLSI Sagarvarma Sayyaparaju, Gangotree Chakma, Sherif Amer, Garrett S. Rose
2017	—	`conf`	Design techniques for in-field memristor forming circuits. MWSCAS Sherif Amer, Garrett S. Rose, Karsten Beckmann, Nathaniel C. Cady
2017	—	`conf`	Evaluating online-learning in memristive neuromorphic circuits. NCS Austin Wyer, Md Musabbir Adnan, Bon Woong Ku, Sung Kyu Lim, Catherine D. Schuman, Raphael C. Pooser, Garrett S. Rose
2017	—	`conf`	Exploiting Memristive Crossbar Memories as Dual-Use Security Primitives in IoT Devices. ISVLSI Garrett S. Rose, Md. Badruddoja Majumder, Mesbah Uddin
2017	—	`conf`	Neuromorphic computing for temporal scientific data classification. NCS Catherine D. Schuman, Thomas E. Potok, Steven R. Young, Robert M. Patton, Gabriel N. Perdue, Gangotree Chakma, Austin Wyer, Garrett S. Rose
2016	—	`conf`	A Designer's Rationale for Nanoelectronic Hardware Security Primitives. ISVLSI Garrett S. Rose, Mesbah Uddin, Md. Badruddoja Majumder
2016	—	`conf`	A Study of Complex Deep Learning Networks on High Performance, Neuromorphic, and Quantum Computers. MLHPC@SC Thomas E. Potok, Catherine D. Schuman, Steven R. Young, Robert M. Patton, Federico M. Spedalieri, Jeremy Liu, Ke-Thia Yao, Garrett S. Rose, Gangotree Chakma
2016	B	`conf`	An Application Development Platform for neuromorphic computing. IJCNN Mark E. Dean, Jason Chan, Christopher Daffron, Adam Disney, John Reynolds, Garrett S. Rose, James S. Plank, J. Douglas Birdwell, Catherine D. Schuman
2016	—	`conf`	Security Meets Nanoelectronics for Internet of Things Applications. ACM Great Lakes Symposium on VLSI Garrett S. Rose
2016	—	`conf`	Sneak path enabled authentication for memristive crossbar memories. AsianHOST Md. Badruddoja Majumder, Mesbah Uddin, Garrett S. Rose, Jeyavijayan Rajendran
2016	—	`conf`	Techniques for Improved Reliability in Memristive Crossbar PUF Circuits. ISVLSI Mesbah Uddin, Md. Badruddoja Majumder, Garrett S. Rose, Karsten Beckmann, Harika Manem, Zahiruddin Alamgir, Nathaniel C. Cady
2015	—	`conf`	A two-dimensional chaotic logic gate for improved computer security. MWSCAS James Bohl, Lok-Kwong Yan, Garrett S. Rose
2015	J	`jnl`	Fault Analysis-Based Logic Encryption. IEEE Trans. Computers Jeyavijayan Rajendran, Huan Zhang, Chi Zhang, Garrett S. Rose, Youngok K. Pino, Ozgur Sinanoglu, Ramesh Karri
2015	J	`jnl`	Improving Tolerance to Variations in Memristor-Based Applications Using Parallel Memristors. IEEE Trans. Computers Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose
2015	J	`jnl`	Nano Meets Security: Exploring Nanoelectronic Devices for Security Applications. Proc. IEEE Jeyavijayan Rajendran, Ramesh Karri, James B. Wendt, Miodrag Potkonjak, Nathan R. McDonald, Garrett S. Rose, Bryant T. Wysocki
2015	A*	`conf`	Performance analysis of a memristive crossbar PUF design. DAC Garrett S. Rose, Chauncey A. Meade
2014	—	`ch.`	Design of Neuromorphic Architectures with Memristors. Network Science and Cybersecurity Dhireesha Kudithipudi, Cory E. Merkel, Michael Soltiz, Garrett S. Rose, Robinson E. Pino
2014	—	`ch.`	Hardware-Based Computational Intelligence for Size, Weight, and Power Constrained Environments. Network Science and Cybersecurity Bryant T. Wysocki, Nathan R. McDonald, Clare Thiem, Garrett S. Rose, Mario Gomez II
2014	J	`jnl`	Memristor Crossbar-Based Neuromorphic Computing System: A Case Study. IEEE Trans. Neural Networks Learn. Syst. Miao Hu, Hai Li, Yiran Chen, Qing Wu, Garrett S. Rose, Richard W. Linderman
2014	—	`ch.`	Nanoelectronics and Hardware Security. Network Science and Cybersecurity Garrett S. Rose, Dhireesha Kudithipudi, Ganesh Khedkar, Nathan R. McDonald, Bryant T. Wysocki, Lok-Kwong Yan
2014	—	`conf`	On designing circuit primitives for cortical processors with memristive hardware. SoCC Dhireesha Kudithipudi, Cory E. Merkel, Yu Kee Ooi, Qutaiba Saleh, Garrett S. Rose
2013	A	`conf`	A write-time based memristive PUF for hardware security applications. ICCAD Garrett S. Rose, Nathan R. McDonald, Lok-Kwong Yan, Bryant T. Wysocki
2013	—	`conf`	BSB training scheme implementation on memristor-based circuit. CISDA Miao Hu, Hai Li, Yiran Chen, Qing Wu, Garrett S. Rose
2013	—	`conf`	Foundations of memristor based PUF architectures. NANOARCH Garrett S. Rose, Nathan R. McDonald, Lok-Kwong Yan, Bryant T. Wysocki, Karen Xu
2013	—	`conf`	Hardware security strategies exploiting nanoelectronic circuits. ASP-DAC Garrett S. Rose, Jeyavijayan Rajendran, Nathan R. McDonald, Ramesh Karri, Miodrag Potkonjak, Bryant T. Wysocki
2013	J	`jnl`	Memristor-Based Neural Logic Blocks for Nonlinearly Separable Functions. IEEE Trans. Computers Michael Soltiz, Dhireesha Kudithipudi, Cory E. Merkel, Garrett S. Rose, Robinson E. Pino
2012	J	`jnl`	An Energy-Efficient Memristive Threshold Logic Circuit. IEEE Trans. Computers Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose
2012	J	`jnl`	Design Considerations for Multilevel CMOS/Nano Memristive Memory. ACM J. Emerg. Technol. Comput. Syst. Harika Manem, Jeyavijayan Rajendran, Garrett S. Rose
2012	—	`conf`	Exploiting memristive device behavior for emerging digital logic and memory applications. SoCC Garrett S. Rose
2012	A*	`conf`	Hardware realization of BSB recall function using memristor crossbar arrays. DAC Miao Hu, Hai Li, Qing Wu, Garrett S. Rose
2012	J	`jnl`	Leveraging Memristive Systems in the Construction of Digital Logic Circuits. Proc. IEEE Garrett S. Rose, Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Robinson E. Pino
2012	B	`conf`	Memristor crossbar based hardware realization of BSB recall function. IJCNN Miao Hu, Hai Li, Qing Wu, Garrett S. Rose, Yiran Chen
2012	—	`conf`	Nano-PPUF: A Memristor-Based Security Primitive. ISVLSI Jeyavijayan Rajendran, Garrett S. Rose, Ramesh Karri, Miodrag Potkonjak
2012	J	`jnl`	Nanoelectronic Solutions for Hardware Security. IACR Cryptol. ePrint Arch. Jeyavijayan Rajendran, Ramesh Karri, James B. Wendt, Miodrag Potkonjak, Nathan R. McDonald, Garrett S. Rose, Bryant T. Wysocki
2012	—	`conf`	RRAM-based adaptive neural logic block for implementing non-linearly separable functions in a single layer. NANOARCH Michael Soltiz, Cory E. Merkel, Dhireesha Kudithipudi, Garrett S. Rose
2012	J	`jnl`	Stochastic Gradient Descent Inspired Training Technique for a CMOS/Nano Memristive Trainable Threshold Gate Array. IEEE Trans. Circuits Syst. I Regul. Pap. Harika Manem, Jeyavijayan Rajendran, Garrett S. Rose
2011	J	`jnl`	3D NOC for many-core processors. Microelectron. J. Aamir Zia, Sachhidh Kannan, H. Jonathan Chao, Garrett S. Rose
2011	C	`conf`	A hierarchical 3-D floorplanning algorithm for many-core CMP networks. ISCAS Sachhidh Kannan, Garrett S. Rose
2011	B	`conf`	A low-power memristive neuromorphic circuit utilizing a global/local training mechanism. IJCNN Garrett S. Rose, Robinson E. Pino, Qing Wu
2011	C	`conf`	A read-monitored write circuit for 1T1M multi-level memristor memories. ISCAS Harika Manem, Garrett S. Rose
2011	Misc	`conf`	An Approach to Tolerate Process Related Variations in Memristor-Based Applications. VLSI Design Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose
2011	C	`conf`	Exploiting memristance for low-energy neuromorphic computing hardware. ISCAS Garrett S. Rose, Robinson E. Pino, Qing Wu
2011	J	`jnl`	Introduction to Special Issue: Highlights of NANOARCH'09. ACM J. Emerg. Technol. Comput. Syst. Shamik Das, Garrett S. Rose
2011	C	`conf`	Parallel memristors: Improving variation tolerance in memristive digital circuits. ISCAS Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose
2010	—	`conf`	Design considerations for variation tolerant multilevel CMOS/Nano memristor memory. ACM Great Lakes Symposium on VLSI Harika Manem, Garrett S. Rose, Xiaoli He, Wei Wang
2010	—	`conf`	Memristor based programmable threshold logic array. NANOARCH Jeyavijayan Rajendran, Harika Manem, Ramesh Karri, Garrett S. Rose
2010	C	`conf`	Overview: Memristive devices, circuits and systems. ISCAS Garrett S. Rose
2009	—	`conf`	A dual-MOSFET equivalent resistor thermal sensor. ACM Great Lakes Symposium on VLSI Yongji Jiang, Garrett S. Rose
2009	J	`jnl`	Inversion schemes for sublithographic programmable logic arrays. IET Comput. Digit. Tech. Benjamin Gojman, Harika Manem, Garrett S. Rose, André DeHon
2009	—	`conf`	Non-overlapping transition encoding for global on-chip interconnect. SoCC Xiaofei Guo, Shunting Lin, Wael Refai, Garrett S. Rose
2009	—	`conf`	The effects of logic partitioning in a majority logic based CMOS-NANO FPGA. ACM Great Lakes Symposium on VLSI Harika Manem, Garrett S. Rose
2008	—	`conf`	A hybrid cmos/nano fpga architecture built fromprogrammable majority logic arrays. ACM Great Lakes Symposium on VLSI Harika Manem, Peter C. Paliwoda, Garrett S. Rose
2007	J	`jnl`	A Programmable Majority Logic Array Using Molecular Scale Electronics. IEEE Trans. Circuits Syst. I Regul. Pap. Garrett S. Rose, Mircea R. Stan
2007	J	`jnl`	Designing CMOS/molecular memories while considering device parameter variations. ACM J. Emerg. Technol. Comput. Syst. Garrett S. Rose, Yuxing Yao, James M. Tour, Adam C. Cabe, Nadine Gergel-Hackett, Nabanita Majumdar, John C. Bean, Lloyd R. Harriott, Mircea R. Stan
2007	J	`jnl`	Designs for Ultra-Tiny, Special-Purpose Nanoelectronic Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Shamik Das, Alexander J. Gates, Hassen A. Abdu, Garrett S. Rose, Carl A. Picconatto, James C. Ellenbogen
2007	—	`conf`	On-chip characterization of molecular electronic devices using CMOS: the design and simulation of a hybrid circuit based on experimental molecular electronic device results. ACM Great Lakes Symposium on VLSI Nadine Gergel-Hackett, Garrett S. Rose, Peter C. Paliwoda, Christina A. Hacker, Curt A. Richter
2006	—	`conf`	A Design Methodology for a Low-Power, Temperature-Aware SoC Developed for Medical Image Processors. SoCC Zhenyu Qi, Wei Huang, Adam C. Cabe, Wenqian Wu, Yan Zhang, Garrett S. Rose, Mircea R. Stan
2006	A	`conf`	A programmable majority logic array using molecular scale electronics. FPGA Garrett S. Rose, Mircea R. Stan
2006	—	`conf`	Design approaches for hybrid CMOS/molecular memory based on experimental device data. ACM Great Lakes Symposium on VLSI Garrett S. Rose, Adam C. Cabe, Nadine Gergel-Hackett, Nabanita Majumdar, Mircea R. Stan, John C. Bean, Lloyd R. Harriott, Yuxing Yao, James M. Tour
2006	Misc	`conf`	Hybrid CMOS/Molecular Electronic Circuits. VLSI Design Mircea R. Stan, Garrett S. Rose, Matthew M. Ziegler
2004	J	`jnl`	Large-signal two-terminal device model for nanoelectronic circuit analysis. IEEE Trans. Very Large Scale Integr. Syst. Garrett S. Rose, Matthew M. Ziegler, Mircea R. Stan