Ganesh S. Dasika

20 papers A* 3A 1B 4Misc 2Journal 5Unranked 4
YearRankTypeTitle / Venue / Authors
2021 — conf
A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning.
IISWC
Nishil Talati, Di Jin, Haojie Ye, Ajay Brahmakshatriya, Ganesh S. Dasika, Saman P. Amarasinghe, Trevor N. Mudge, Danai Koutra, Ronald G. Dreslinski
2017 A* conf
Scalpel: Customizing DNN Pruning to the Underlying Hardware Parallelism.
ISCA
Jiecao Yu, Andrew Lukefahr, David J. Palframan, Ganesh S. Dasika, Reetuparna Das, Scott A. Mahlke
2014 J jnl
A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shidhartha Das, Ganesh S. Dasika, Karthik Shivashankar, David M. Bull
2013 — conf
A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation.
CICC
Shidhartha Das, Ganesh S. Dasika, Karthik Shivashankar, David M. Bull
2013 B conf
APOGEE: Adaptive prefetching on GPUs for energy efficiency.
PACT
Ankit Sethia, Ganesh S. Dasika, Mehrzad Samadi, Scott A. Mahlke
2012 J jnl
A Customized Processor for Energy Efficient Scientific Computing.
IEEE Trans. Computers
Ankit Sethia, Ganesh S. Dasika, Trevor N. Mudge, Scott A. Mahlke
2011 J jnl
A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation.
IEEE J. Solid State Circuits
David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw
2011 J jnl
Correction to "A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation".
IEEE J. Solid State Circuits
David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw
2011 B conf
PEPSC: A Power-Efficient Processor for Scientific Computing.
PACT
Ganesh S. Dasika, Ankit Sethia, Trevor N. Mudge, Scott A. Mahlke
2011 — —
Power-Efficient Accelerators for High-Performance Applications.
Ganesh S. Dasika
2010 — conf
A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation.
ISSCC
David M. Bull, Shidhartha Das, Karthik Shivashankar, Ganesh S. Dasika, Krisztián Flautner, David T. Blaauw
2010 B conf
CoreGenesis: erasing core boundaries for robust and configurable performance.
PACT
Shantanu Gupta, Shuguang Feng, Amin Ansari, Ganesh S. Dasika, Scott A. Mahlke
2010 B conf
MEDICS: ultra-portable processing for medical image reconstruction.
PACT
Ganesh S. Dasika, Ankit Sethia, Vincentius Robby, Trevor N. Mudge, Scott A. Mahlke
2010 Misc conf
Mighty-morphing power-SIMD.
CASES
Ganesh S. Dasika, Mark Woh, Sangwon Seo, Nathan Clark, Trevor N. Mudge, Scott A. Mahlke
2009 A* conf
Bridging the computation gap between programmable processors and hardwired accelerators.
HPCA
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Scott A. Mahlke
2009 — conf
Power-efficient medical image processing using PUMA.
SASP
Ganesh S. Dasika, Kevin Fan, Scott A. Mahlke
2008 A* conf
DVFS in loop accelerators using BLADES.
DAC
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott A. Mahlke, David M. Bull
2005 A conf
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache.
CGO
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh S. Dasika, Eric D. Marsman, Robert M. Senger, Scott A. Mahlke, Richard B. Brown
2005 J jnl
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor.
IEEE Trans. Computers
Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown
2003 Misc conf
Increasing the number of effective registers in a low-power processor using a windowed register file.
CASES
Rajiv A. Ravindran, Robert M. Senger, Eric D. Marsman, Ganesh S. Dasika, Matthew R. Guthaus, Scott A. Mahlke, Richard B. Brown