Gabriel M. Silberman

40 papers A* 5A 5B 2Journal 23Unranked 4

Year	Rank	Type	Title / Venue / Authors
2012	—	`conf`	The 4x6 Tiered Architecture Method: An Approach to the Design of Enterprise Solutions. CAiSE Workshops Ethan Hadar, Irit Hadar, Gabriel M. Silberman, John J. Harrison Jr.
2008	—	`conf`	Agile architecture methodology: long term strategy interleaved with short term tactics. OOPSLA Companion Ethan Hadar, Gabriel M. Silberman
2003	J	`jnl`	Introduction. Inf. Syst. Frontiers Michael A. Bauer, Gene F. Hoffnagle, J. Howard Johnson, Gabriel M. Silberman
2002	J	`jnl`	Introduction. Inf. Syst. Frontiers Michael A. Bauer, Gene F. Hoffnagle, J. Howard Johnson, Gabriel M. Silberman
2001	A*	`conf`	New Software Engineering Faculty Symposium. ICSE Leon J. Osterweil, Gabriel M. Silberman, Kenny Wong
1997	J	`jnl`	Foreword to the special issues. Int. J. Parallel Program. Walid A. Najjar, Gabriel M. Silberman
1997	J	`jnl`	Overview: The Centre for Advanced Studies. IBM Syst. J. Stephen G. Perelgut, Gabriel M. Silberman, Kelly A. Lyons, Karen Bennet
1996	J	`jnl`	The Third International Conference on Parallel Computing Technologies (PaCT-95), Saint Petersburg, Russia. ACM SIGPLAN Notices Gabriel M. Silberman
1994	J	`jnl`	A backtracing-oriented procedure for the analysis of combinational gate-level designs. Integr. Gabriel M. Silberman, Ilan Y. Spillinger
1994	—	`ed.`	Parallel Architectures and Compilation Techniques, Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques, PACT'94, Montréal, Canada, 24-26 August, 1994 IFIP PACT Michel Cosnard, Guang R. Gao, Gabriel M. Silberman
1994	A*	`conf`	VLIW Compilation Techniques in a Superscalar Environment. PLDI Kemal Ebcioglu, Randy D. Groves, Ki-Chang Kim, Gabriel M. Silberman, Isaac Ziv
1993	J	`jnl`	An Architectural Framework for Supporting Heterogeneous Instruction-Set Architectures. Computer Gabriel M. Silberman, Kemal Ebcioglu
1993	J	`jnl`	Architectural Improvement for a Data-Driven VLSI Processing Array. J. Parallel Distributed Comput. Shlomit Weiss, Ilan Y. Spillinger, Gabriel M. Silberman
1992	A	`conf`	An architectural framework for migration from CISC to higher performance platforms. ICS Gabriel M. Silberman, Kemal Ebcioglu
1991	J	`jnl`	Functional Fault Simulation as a Guide for Biased-Random Test Pattern Generation. IEEE Trans. Computers Gabriel M. Silberman, Ilan Y. Spillinger
1991	J	`jnl`	RIDDLE: A Foundation for Test Generation on a High-Level Design Description. IEEE Trans. Computers Gabriel M. Silberman, Ilan Y. Spillinger
1990	J	`jnl`	Using functional fault simulation and the difference fault model to estimate implementation fault coverage. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gabriel M. Silberman, Ilan Y. Spillinger
1989	—	`conf`	Architectural Improvements for Data-Driven VLSI Processing Arrays. FPCA Shlomit Weiss, Ilan Y. Spillinger, Gabriel M. Silberman
1989	J	`jnl`	Whistle: A Workbench for Test Development of Library-Based Designs. Computer Raphael Renous, Gabriel M. Silberman, Ilan Y. Spillinger
1988	J	`jnl`	A Data-Driven VLSI Array for Arbitrary Algorithms. Computer Israel Koren, Bilha Mendelson, Irit Peled, Gabriel M. Silberman
1988	A	`conf`	G-RIDDLE : A Formal Analysis of Logic Designs Condiucive to the Acceleration of Backtracing. ITC Gabriel M. Silberman, Ilan Y. Spillinger
1988	J	`jnl`	Minimum-Diameter Cyclic Arrangements in Mapping Data-Flow Graphs onto VLSI Arrays. Math. Syst. Theory Paul Erdös, Israel Koren, Shlomo Moran, Gabriel M. Silberman, Shmuel Zaks
1988	—	`conf`	RIDDLE: a foundation for test generation on a high level design description. FTCS Gabriel M. Silberman, Ilan Y. Spillinger
1988	J	`jnl`	SLS-a fast switch-level simulator [for MOS]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman
1987	B	`conf`	An Improved Mapping of Data Flow Programs on a VLSI Array of Processors. ICPP Bilha Mendelson, Gabriel M. Silberman
1987	A*	`conf`	Mapping Data Flow Programs on a VLSI Array of Processors. ISCA Bilha Mendelson, Gabriel M. Silberman
1987	J	`jnl`	The Effect of Operation Scheduling on the Performance of a Data Flow Computer. IEEE Trans. Computers Michael Granski, Israel Koren, Gabriel M. Silberman
1986	A	`conf`	Efficient Fault Simulation of CMOS Circuits with Accurate Models. ITC Zeev Barzilai, J. Lawrence Carter, Vijay S. Iyengar, Indira Nair, Barry K. Rosen, Joe D. Rutledge, Gabriel M. Silberman
1986	J	`jnl`	Improving the Performance of a Switch-Level Simulator Targeted for a Logic Simulation Machine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ilan Y. Spillinger, Gabriel M. Silberman
1986	A*	`conf`	SLS - a fast switch level simulator for verification and fault coverage analysis. DAC Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Vijay S. Iyengar, Gabriel M. Silberman
1986	A	`conf`	The Difference Fault Model : Using Functional Fault Simulation to Obtain Implementation Fault Coverage. ITC Gabriel M. Silberman, Ilan Y. Spillinger
1985	A	`conf`	Accurate Fault Modeling and Efficient Simulation of Differential CVS Circuits. ITC Zeev Barzilai, Vijay S. Iyengar, Barry K. Rosen, Gabriel M. Silberman
1984	J	`jnl`	Embedding Tree Stuctures in VLlSI Hexagonal Arrays. IEEE Trans. Computers Dan Gordon, Israel Koren, Gabriel M. Silberman
1984	J	`jnl`	Fast Pass-Transistor Simulation for Custom MOS Circuits. IEEE Des. Test Zeev Barzilai, Leendert M. Huisman, Gabriel M. Silberman, Donald T. Tang, Lin S. Woo
1984	J	`jnl`	Using a Hardware Simulation Engine for Custom MOS Structured Designs. IBM J. Res. Dev. Zeev Barzilai, Daniel K. Beece, Leendert M. Huisman, Gabriel M. Silberman
1983	B	`conf`	A Direct Mapping of Algorithms onto VLSI Processing Arrays Based on the Data Flow Approach. ICPP Israel Koren, Gabriel M. Silberman
1983	J	`jnl`	Delayed-Staging Hierarchy Optimization. IEEE Trans. Computers Gabriel M. Silberman
1983	A*	`conf`	Simulating pass transistor circuits using logic simulation machines. DAC Zeev Barzilai, Leendert M. Huisman, Gabriel M. Silberman, Donald T. Tang, Lin S. Woo
1983	J	`jnl`	Stack Processing Techniques in Delayed-Staging Storage Hierarchies. Commun. ACM Gabriel M. Silberman
1982	J	`jnl`	Determining Fault Ratios in Multilevel Delayed-Staging Storage Hierarchies. IEEE Trans. Computers Gabriel M. Silberman