Gabriel L. Nazar

50 papers A* 2A 3B 4C 11Misc 2Journal 10Unranked 18

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	A variation-aware methodology for improved processor designs for the edge computing domain. Des. Autom. Embed. Syst. Rafael Billig Tonetto, Gabriel L. Nazar, Antonio Carlos Schneider Beck
2023	J	`jnl`	Constraint-Aware Multi-Technique Approximate High-Level Synthesis for FPGAs. ACM Trans. Reconfigurable Technol. Syst. Marcos T. Leipnitz, Gabriel L. Nazar
2023	—	`conf`	GRASP-based High-Level Synthesis Design Space Exploration for FPGAs. SBESC Níkolas P. Schuster, Gabriel L. Nazar
2022	C	`conf`	SNAP: Selective NTV Heterogeneous Architectures for Power-Efficient Edge Computing. DSD Rafael Billig Tonetto, Antonio Carlos Schneider Beck, Gabriel L. Nazar
2021	—	`conf`	Lightweight Dual Modular Redundancy through Approximate Computing. SBESC Gabriel L. Nazar, Pedro H. Kopper, Marcos T. Leipnitz, Ben H. H. Juurlink
2020	A*	`conf`	A Machine Learning Approach for Reliability-Aware Application Mapping for Heterogeneous Multicores. DAC Rafael Billig Tonetto, Hiago Mayk G. de A. Rocha, Gabriel L. Nazar, Antonio Carlos Schneider Beck
2020	C	`conf`	A Reliability-Oriented Machine Learning Strategy for Heterogeneous Multicore Application Mapping. ISCAS Rafael Billig Tonetto, Hiago Mayk G. de A. Rocha, Bruno Zatt, Antonio Carlos Schneider Beck, Gabriel L. Nazar
2020	J	`jnl`	A Survey on FPGA Support for the Feasible Execution of Virtualized Network Functions. IEEE Commun. Surv. Tutorials Gabriel S. Niemiec, Luis M. S. Batista, Alberto E. Schaeffer-Filho, Gabriel L. Nazar
2020	—	`conf`	ACQuA: A Parallel Accelerator Architecture for Pure Functional Programs. ISVLSI Ricardo Coelho, Felipe Tanus, Álvaro F. Moreira, Gabriel L. Nazar
2020	—	`conf`	Enhancing Real-Time Motion Estimation through Approximate High-Level Synthesis. ISVLSI Marcos T. Leipnitz, Murilo R. Perleberg, Marcelo Schiavon Porto, Gabriel L. Nazar
2020	—	`conf`	Firefly: An Open-source Rocket-based Intermittent Framework. SBCCI Hiago Rocha, Guilherme Korol, Michael G. Jordan, Arthur M. Krause, Ronaldo Silveira, Caio Vieira, Philippe O. A. Navaux, Gabriel L. Nazar, Luigi Carro, Antonio Carlos Schneider Beck
2020	—	`conf`	High-level synthesis of throughput-optimized and energy-efficient approximate designs. CF Marcos T. Leipnitz, Gabriel L. Nazar
2020	C	`conf`	Low-Power and Memory-Aware Approximate Hardware Architecture for Fractional Motion Estimation Interpolation on HEVC. ISCAS Wagner Penny, Guilherme Corrêa, Luciano Agostini, Daniel Palomino, Marcelo Schiavon Porto, Gabriel L. Nazar, Bruno Zatt
2020	C	`conf`	Throughput-Oriented Spatio-Temporal Optimization in Approximate High-Level Synthesis. ICCD Marcos T. Leipnitz, Gabriel L. Nazar
2019	C	`conf`	A Knapsack Methodology for Hardware-based DMR Protection against Soft Errors in Superscalar Out-of-Order Processors. VLSI-SoC Rafael Billig Tonetto, Douglas Maciel Cardoso, Marcelo Brandalero, Luciano Agostini, Gabriel L. Nazar, José Rodrigo Azambuja, Antonio Carlos Schneider Beck
2019	C	`conf`	Cost-effective Resilient FPGA-based LDPC Decoder Architecture. IOLTS Eduardo Nunes de Souza, Gabriel L. Nazar
2019	—	`conf`	Energy-Efficiency Exploration of Memory Hierarchy using NVMs for HEVC Motion Estimation. ICECS Wagner Penny, Jones Goebel, Douglas Corrêa, Anderson Martins, Gabriel L. Nazar, Luciano Agostini, Daniel Palomino, Marcelo Schiavon Porto, Bruno Zatt
2019	J	`jnl`	High-Level Synthesis of Approximate Designs under Real-Time Constraints. ACM Trans. Embed. Comput. Syst. Marcos T. Leipnitz, Gabriel L. Nazar
2019	A*	`conf`	High-Level Synthesis of Resource-oriented Approximate Designs for FPGAs. DAC Marcos T. Leipnitz, Gabriel L. Nazar
2019	—	`conf`	Improving Software-based Techniques for Soft Error Mitigation in OoO Superscalar Processors. ICECS Douglas Maciel Cardoso, Rafael Billig Tonetto, Marcelo Brandalero, Luciano Agostini, Gabriel L. Nazar, José Rodrigo Azambuja, Antonio Carlos Schneider Beck
2018	J	`jnl`	Fault Tolerance Mechanisms for FPGA-Based Regular Expression Matching. J. Electron. Test. Marcos T. Leipnitz, Gabriel L. Nazar
2018	A	`conf`	Precise evaluation of the fault sensitivity of OoO superscalar processors. DATE Rafael Billig Tonetto, Gabriel L. Nazar, Antonio Carlos Schneider Beck
2017	A	`conf`	An energy-efficient memory hierarchy for multi-issue processors. DATE Tiago T. Jost, Gabriel L. Nazar, Luigi Carro
2017	J	`jnl`	Exploring redundancy granularities to repair real-time FPGA-based systems. Microprocess. Microsystems Leonardo Pereira Santos, Gabriel L. Nazar, Luigi Carro
2016	—	`conf`	A fault injection platform for FPGA-based communication systems. LASCAS Marcos T. Leipnitz, L. H. Geferson, Gabriel L. Nazar
2016	—	`conf`	Improving performance in VLIW soft-core processors through software-controlled scratchpads. SAMOS Tiago T. Jost, Gabriel L. Nazar, Luigi Carro
2016	J	`jnl`	Live-Out Register Fencing: Interrupt-Triggered Soft Error Correction Based on the Elimination of Register-to-Register Communication. ACM Trans. Embed. Comput. Syst. Ronaldo Rodrigues Ferreira, Gabriel L. Nazar, Jean da Rolt, Álvaro F. Moreira, Luigi Carro
2016	—	`conf`	Low Cost Dynamic Scrubbing for Real-Time Systems. ARC Leonardo P. Santos, Gabriel L. Nazar, Luigi Carro
2016	—	`conf`	Low cost resilient regular expression matching on FPGAs. DFT Marcos T. Leipnitz, Eduardo Nunes de Souza, Gabriel L. Nazar
2016	J	`jnl`	SBESC 2015 guest editors' introduction. Des. Autom. Embed. Syst. Gabriel L. Nazar
2016	C	`conf`	Scalable memory architecture for soft-core processors. ICCD Tiago T. Jost, Gabriel L. Nazar, Luigi Carro
2016	B	`conf`	Searching with a Corrupted Heuristic. SOCS Levi H. S. Lelis, Richard Anthony Valenzano, Gabriel L. Nazar, Roni Stern
2015	J	`jnl`	Improving FPGA repair under real-time constraints. Microelectron. Reliab. Gabriel L. Nazar
2015	—	`conf`	Permanent fault detection and diagnosis in the lightweight dual modular redundancy architecture. LATS Ronaldo Rodrigues Ferreira, Ernesto Sánchez, Jean da Rolt, Gabriel L. Nazar, Álvaro F. Moreira, Luigi Carro, Matteo Sonza Reorda
2014	A	`conf`	Adaptive Low-Power Architecture for High-Performance and Reliable Embedded Computing. DSN Ronaldo Rodrigues Ferreira, Jean da Rolt, Gabriel L. Nazar, Álvaro Freitas Moreira, Luigi Carro
2014	J	`jnl`	Adaptive Parallelism Exploitation under Physical and Real-Time Constraints for Resilient Systems. ACM Trans. Reconfigurable Technol. Syst. Fábio P. Itturriet, Gabriel L. Nazar, Ronaldo Rodrigues Ferreira, Álvaro Freitas Moreira, Luigi Carro
2014	C	`conf`	Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity. VLSI-SoC Giovanni Bruni, Paolo Rech, Lucas A. Tambara, Gabriel L. Nazar, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Alessandro Paccagnella
2014	B	`conf`	Reducing embedded software radiation-induced failures through cache memories. ETS Thiago Santini, Paolo Rech, Gabriel L. Nazar, Luigi Carro, Flávio Rech Wagner
2014	C	`conf`	Reliable execution of statechart-generated correct embedded software under soft errors. DDECS Ronaldo Rodrigues Ferreira, Thomas Klotz, Thilo Vörtler, Jean da Rolt, Gabriel L. Nazar, Álvaro Freitas Moreira, Luigi Carro, Karsten Einwich
2013	B	`conf`	Accelerated FPGA repair through shifted scrubbing. FPL Gabriel L. Nazar, Leonardo P. Santos, Luigi Carro
2013	Misc	`conf`	Scrubbing unit repositioning for fast error repair in FPGAs. CASES Gabriel L. Nazar, Leonardo P. Santos, Luigi Carro
2012	—	`conf`	Adapting communication for adaptable processors: A multi-axis reconfiguration approach. ReConFig Paulo C. Santos, Gabriel L. Nazar, Luigi Carro, Fakhar Anjam, Stephan Wong
2012	—	`conf`	Adaptive parallelism exploitation under physical and real-time constraints for resilient systems. ReCoSoC Fábio P. Itturriet, Gabriel L. Nazar, Ronaldo Rodrigues Ferreira, Álvaro F. Moreira, Luigi Carro
2012	Misc	`conf`	Exploiting Modified Placement and Hardwired Resources to Provide High Reliability in FPGAs. FCCM Gabriel L. Nazar, Luigi Carro
2012	B	`conf`	Fast error detection through efficient use of hardwired resources in FPGAs. ETS Gabriel L. Nazar, Luigi Carro
2012	—	`conf`	Fast single-FPGA fault injection platform. DFT Gabriel L. Nazar, Luigi Carro
2012	C	`conf`	Resilient Adaptive Algebraic Architecture for Parallel Detection and Correction of Soft-Errors. DSD Fábio P. Itturriet, Ronaldo Rodrigues Ferreira, Gustavo Girão, Gabriel L. Nazar, Álvaro F. Moreira, Luigi Carro
2012	—	`conf`	Simultaneous reconfiguration of issue-width and instruction cache for a VLIW processor. ICSAMOS Fakhar Anjam, Stephan Wong, Luigi Carro, Gabriel L. Nazar, Mateus B. Rutzig
2011	—	`conf`	An Area Effective Parity-Based Fault Detection Technique for FPGAs. DFT Gabriel L. Nazar, Luigi Carro
2011	C	`conf`	Energy efficient pseudo-cache architecture through fine-grained reconfigurability. ISCAS Gabriel L. Nazar, Luigi Carro