G. Edward Suh - RankMe

167 papers A* 63A 11B 3C 4Misc 1Journal 61Unranked 22

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Architecting Secure AI Agents: Perspectives on System-Level Defenses Against Indirect Prompt Injection Attacks. CoRR Chong Xiang, Drew Zagieboylo, Shaona Ghosh, Sanjay Kariyappa, Kai Greshake, Hanshen Xiao, Chaowei Xiao, G. Edward Suh
2026	A*	`conf`	Leveraging ASIC AI Chips for Homomorphic Encryption. HPCA Jianming Tong, Tianhao Huang, Jingtian Dang, Leo de Castro, Anirudh Itagi, Anupam Golder, Asra Ali, Jeremy Kun, Jevin Jiang, Arvind, G. Edward Suh, Tushar Krishna
2026	J	`jnl`	Leveraging ASIC AI Chips for Homomorphic Encryption. IACR Cryptol. ePrint Arch. Jianming Tong, Tianhao Huang, Jingtian Dang, Leo de Castro, Anirudh Itagi, Anupam Golder, Asra Ali, Jeremy Kun, Jevin Jiang, Arvind Mithal, G. Edward Suh, Tushar Krishna
2026	J	`jnl`	Prior Aware Memorization: An Efficient Metric for Distinguishing Memorization from Generalization in Large Language Models. CoRR Trishita Tiwari, Ari Trachtenberg, G. Edward Suh
2026	J	`jnl`	Privasis: Synthesizing the Largest "Public" Private Dataset from Scratch. CoRR Hyunwoo Kim, Niloofar Mireshghallah, Michael Duan, Rui Xin, Shuyue Stella Li, Jaehun Jung, David Acuna, Qi Pang, Hanshen Xiao, G. Edward Suh, Sewoong Oh, Yulia Tsvetkov, Pang Wei Koh, Yejin Choi
2026	J	`jnl`	ReasAlign: Reasoning Enhanced Safety Alignment against Prompt Injection Attack. CoRR Hao Li, Yankai Yang, G. Edward Suh, Ning Zhang, Chaowei Xiao
2026	J	`jnl`	ReasoningBomb: A Stealthy Denial-of-Service Attack by Inducing Pathologically Long Reasoning in Large Reasoning Models. CoRR Xiaogeng Liu, Xinyan Wang, Yechao Zhang, Sanjay Kariyappa, Chong Xiang, Muhao Chen, G. Edward Suh, Chaowei Xiao
2026	—	`conf`	Sequential Specifications for Precise Hardware Exceptions. ASPLOS (1) Yulun Yao, Drew Zagieboylo, Andrew C. Myers, G. Edward Suh
2026	J	`jnl`	SideQuest: Model-Driven KV Cache Management for Long-Horizon Agentic Reasoning. CoRR Sanjay Kariyappa, G. Edward Suh
2025	J	`jnl`	Accelerating Confidential Recommendation Model Inference With Near-Memory Processing. IEEE Trans. Dependable Secur. Comput. Wenjie Xiong, Liu Ke, Maxim Ostapenko, Yongmin Tai, Yeongon Cho, Joon-Ho Song, Jinin So, Kyungsoo Kim, Yongsuk Kwon, Jin Jung, Jieun Lee, Byeongho Kim, Shinhaeng Kang, Sukhan Lee, Jeonghyeon Cho, Kyomin Sohn, Xuan Zhang, Hsien-Hsin S. Lee, G. Edward Suh
2025	A*	`conf`	AutoDAN-Turbo: A Lifelong Agent for Strategy Self-Exploration to Jailbreak LLMs. ICLR Xiaogeng Liu, Peiran Li, G. Edward Suh, Yevgeniy Vorobeychik, Zhuoqing Mao, Somesh Jha, Patrick McDaniel, Huan Sun, Bo Li, Chaowei Xiao
2025	J	`jnl`	EcoServe: Designing Carbon-Aware AI Inference Systems. CoRR Yueying Li, Zhanqiu Hu, Esha Choukse, Rodrigo Fonseca, G. Edward Suh, Udit Gupta
2025	A*	`conf`	Efficient Memory Side-Channel Protection for Embedding Generation in Machine Learning. HPCA Muhammad Umar, Akhilesh Parag Marathe, Monami Dutta Gupta, Shubham Jogprakash Ghosh, G. Edward Suh, Wenjie Xiong
2025	A*	`conf`	Hermes: Algorithm-System Co-design for Efficient Retrieval-Augmented Generation At-Scale. ISCA Michael Shen, Muhammad Umar, Kiwan Maeng, G. Edward Suh, Udit Gupta
2025	J	`jnl`	How much do language models memorize? CoRR John X. Morris, Chawin Sitawarin, Chuan Guo, Narine Kokhlikyan, G. Edward Suh, Alexander M. Rush, Kamalika Chaudhuri, Saeed Mahloujifar
2025	J	`jnl`	Leveraging ASIC AI Chips for Homomorphic Encryption. CoRR Jianming Tong, Tianhao Huang, Leo de Castro, Anirudh Itagi, Jingtian Dang, Anupam Golder, Asra Ali, Jevin Jiang, Arvind, G. Edward Suh, Tushar Krishna
2025	A*	`conf`	Machine Learning with Privacy for Protected Attributes. SP Saeed Mahloujifar, Chuan Guo, G. Edward Suh, Kamalika Chaudhuri
2025	J	`jnl`	Machine Learning with Privacy for Protected Attributes. CoRR Saeed Mahloujifar, Chuan Guo, G. Edward Suh, Kamalika Chaudhuri
2025	J	`jnl`	Mitigating Indirect Prompt Injection via Instruction-Following Intent Analysis. CoRR Mintong Kang, Chong Xiang, Sanjay Kariyappa, Chaowei Xiao, Bo Li, G. Edward Suh
2025	—	`conf`	Pangenome-Informed Language Models for Synthetic Genome Sequence Generation. BIBM Pengzhi Huang, François Charton, Jan-Niklas M. Schmelzle, Shelby S. Darnell, Pjotr Prins, Erik Garrison, G. Edward Suh
2025	—	`conf`	Practical Federated Recommendation Model Learning Using ORAM with Controlled Privacy. ASPLOS (2) Jinyu Liu, Wenjie Xiong, G. Edward Suh, Kiwan Maeng
2025	J	`jnl`	Remote Power Side- Channel Attacks on FPGAs. IEEE Des. Test Mark Zhao, G. Edward Suh
2025	J	`jnl`	Stronger Enforcement of Instruction Hierarchy via Augmented Intermediate Representations. CoRR Sanjay Kariyappa, G. Edward Suh
2025	J	`jnl`	Towards Reinforcement Learning for Exploration of Speculative Execution Vulnerabilities. CoRR Evan Lai, Wenjie Xiong, G. Edward Suh, Mohit Tiwari, Mulong Luo
2025	A*	`conf`	Trustworthy Machine Learning through Data-Specific Indistinguishability. ICML Hanshen Xiao, Zhen Yang, G. Edward Suh
2025	J	`jnl`	Unlocking Visual Secrets: Inverting Features with Diffusion Priors for Image Reconstruction. Trans. Mach. Learn. Res. Sai Qian Zhang, Ziyun Li, Chuan Guo, Saeed Mahloujifar, Deeksha Dangwal, G. Edward Suh, Barbara De Salvo, Chiao Liu
2024	—	`conf`	Accelerating ReLU for MPC-Based Private Inference with a Communication-Efficient Sign Estimation. MLSys Kiwan Maeng, G. Edward Suh
2024	J	`jnl`	AutoDAN-Turbo: A Lifelong Agent for Strategy Self-Exploration to Jailbreak LLMs. CoRR Xiaogeng Liu, Peiran Li, G. Edward Suh, Yevgeniy Vorobeychik, Zhuoqing Mao, Somesh Jha, Patrick McDaniel, Huan Sun, Bo Li, Chaowei Xiao
2024	J	`jnl`	Efficient Privacy-Preserving Machine Learning with Lightweight Trusted Hardware. Proc. Priv. Enhancing Technol. Pengzhi Huang, Thang Hoang, Yueying Li, Elaine Shi, G. Edward Suh
2024	J	`jnl`	FATH: Authentication-based Test-time Defense against Indirect Prompt Injection Attacks. CoRR Jiongxiao Wang, Fangzhou Wu, Wendi Li, Jinsheng Pan, G. Edward Suh, Z. Morley Mao, Muhao Chen, Chaowei Xiao
2024	A*	`conf`	Formal Privacy Proof of Data Encoding: The Possibility and Impossibility of Learnable Encryption. CCS Hanshen Xiao, G. Edward Suh, Srinivas Devadas
2024	—	`conf`	GPU-based Private Information Retrieval for On-Device Machine Learning Inference. ASPLOS (1) Maximilian Lam, Jeff Johnson, Wenjie Xiong, Kiwan Maeng, Udit Gupta, Yang Li, Liangzhen Lai, Ilias Leontiadis, Minsoo Rhu, Hsien-Hsin S. Lee, Vijay Janapa Reddi, Gu-Yeon Wei, David Brooks, G. Edward Suh
2024	A*	`conf`	Information Flow Control in Machine Learning through Modular Model Architecture. USENIX Security Symposium Trishita Tiwari, Suchin Gururangan, Chuan Guo, Weizhe Hua, Sanjay Kariyappa, Udit Gupta, Wenjie Xiong, Kiwan Maeng, Hsien-Hsin S. Lee, G. Edward Suh
2024	—	`conf`	LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models. ASPLOS (2) Juntaek Lim, Youngeun Kwon, Ranggi Hwang, Kiwan Maeng, G. Edward Suh, Minsoo Rhu
2024	J	`jnl`	LazyDP: Co-Designing Algorithm-Software for Scalable Training of Differentially Private Recommendation Models. CoRR Juntaek Lim, Youngeun Kwon, Ranggi Hwang, Kiwan Maeng, G. Edward Suh, Minsoo Rhu
2024	A*	`conf`	LibPreemptible: Enabling Fast, Adaptive, and Hardware-Assisted User-Space Scheduling. HPCA Yueying Li, Nikita Lazarev, David Koufaty, Tenny Yin, Andy Anderson, Zhiru Zhang, G. Edward Suh, Kostis Kaffes, Christina Delimitrou
2024	J	`jnl`	Sequence-Level Analysis of Leakage Risk of Training Data in Large Language Models. CoRR Trishita Tiwari, G. Edward Suh
2024	J	`jnl`	Strong Asymptotic Composition Theorems for Mutual Information Measures. IEEE Trans. Inf. Theory Benjamin Wu, Aaron B. Wagner, Ibrahim Issa, G. Edward Suh
2024	J	`jnl`	Towards Understanding Systems Trade-offs in Retrieval-Augmented Generation Model Inference. CoRR Michael Shen, Muhammad Umar, Kiwan Maeng, G. Edward Suh, Udit Gupta
2024	J	`jnl`	Unlocking Visual Secrets: Inverting Features with Diffusion Priors for Image Reconstruction. CoRR Sai Qian Zhang, Ziyun Li, Chuan Guo, Saeed Mahloujifar, Deeksha Dangwal, G. Edward Suh, Barbara De Salvo, Chiao Liu
2023	J	`jnl`	Approximating ReLU on a Reduced Ring for Efficient MPC-based Private Inference. CoRR Kiwan Maeng, G. Edward Suh
2023	A*	`conf`	AutoCAT: Reinforcement Learning for Automated Exploration of Cache-Timing Attacks. HPCA Mulong Luo, Wenjie Xiong, Geunbae Lee, Yueying Li, Xiaomeng Yang, Amy Zhang, Yuandong Tian, Hsien-Hsin S. Lee, G. Edward Suh
2023	A*	`conf`	Bounding the Invertibility of Privacy-preserving Instance Encoding using Fisher Information. NeurIPS Kiwan Maeng, Chuan Guo, Sanjay Kariyappa, G. Edward Suh
2023	J	`jnl`	Bounding the Invertibility of Privacy-preserving Instance Encoding using Fisher Information. CoRR Kiwan Maeng, Chuan Guo, Sanjay Kariyappa, G. Edward Suh
2023	A*	`conf`	Cocktail Party Attack: Breaking Aggregation-Based Privacy in Federated Learning Using Independent Component Analysis. ICML Sanjay Kariyappa, Chuan Guo, Kiwan Maeng, Wenjie Xiong, G. Edward Suh, Moinuddin K. Qureshi, Hsien-Hsin S. Lee
2023	J	`jnl`	GPU-based Private Information Retrieval for On-Device Machine Learning Inference. CoRR Maximilian Lam, Jeff Johnson, Wenjie Xiong, Kiwan Maeng, Udit Gupta, Yang Li, Liangzhen Lai, Ilias Leontiadis, Minsoo Rhu, Hsien-Hsin S. Lee, Vijay Janapa Reddi, Gu-Yeon Wei, David Brooks, G. Edward Suh
2023	J	`jnl`	Information Flow Control in Machine Learning through Modular Model Architecture. CoRR Trishita Tiwari, Suchin Gururangan, Chuan Guo, Weizhe Hua, Sanjay Kariyappa, Udit Gupta, Wenjie Xiong, Kiwan Maeng, Hsien-Hsin S. Lee, G. Edward Suh
2023	A*	`conf`	MACTA: A Multi-agent Reinforcement Learning Approach for Cache Timing Attacks and Detection. ICLR Jiaxun Cui, Xiaomeng Yang, Mulong Luo, Geunbae Lee, Peter Stone, Hsien-Hsin S. Lee, Benjamin Lee, G. Edward Suh, Wenjie Xiong, Yuandong Tian
2023	—	`conf`	Mitigating Metastable Failures in Distributed Systems with Offline Reinforcement Learning. Tiny Papers @ ICLR Yueying Li, Daochen Zha, Tianjun Zhang, G. Edward Suh, Christina Delimitrou, Francis Y. Yan
2023	A*	`conf`	SpecVerilog: Adapting Information Flow Control for Secure Speculation. CCS Drew Zagieboylo, Charles Sherk, Andrew C. Myers, G. Edward Suh
2023	J	`jnl`	Towards Fast, Adaptive, and Hardware-Assisted User-Space Scheduling. CoRR Yueying Li, Nikita Lazarev, David Koufaty, Yijun Yin, Andy Anderson, Zhiru Zhang, G. Edward Suh, Kostis Kaffes, Christina Delimitrou
2022	J	`jnl`	Accelerating Path Planning for Autonomous Driving with Hardware-Assisted Memoization. CoRR Mulong Luo, G. Edward Suh
2022	—	`conf`	Accelerating Path Planning for Autonomous Driving with Hardware-Assisted Memorization. ASAP Mulong Luo, G. Edward Suh
2022	J	`jnl`	AutoCAT: Reinforcement Learning for Automated Exploration of Cache Timing-Channel Attacks. CoRR Mulong Luo, Wenjie Xiong, Geunbae Lee, Yueying Li, Xiaomeng Yang, Amy Zhang, Yuandong Tian, Hsien-Hsin S. Lee, G. Edward Suh
2022	B	`conf`	Characterization of MPC-based Private Inference for Transformer-based Models. ISPASS Yongqin Wang, G. Edward Suh, Wenjie Xiong, Benjamin Lefaudeux, Brian Knott, Murali Annavaram, Hsien-Hsin S. Lee
2022	J	`jnl`	Cocktail Party Attack: Breaking Aggregation-Based Privacy in Federated Learning using Independent Component Analysis. CoRR Sanjay Kariyappa, Chuan Guo, Kiwan Maeng, Wenjie Xiong, G. Edward Suh, Moinuddin K. Qureshi, Hsien-Hsin S. Lee
2022	J	`jnl`	Data Leakage via Access Patterns of Sparse Features in Deep Learning-based Recommendation Systems. CoRR Hanieh Hashemi, Wenjie Xiong, Liu Ke, Kiwan Maeng, Murali Annavaram, G. Edward Suh, Hsien-Hsin S. Lee
2022	J	`jnl`	DisaggRec: Architecting Disaggregated Systems for Large-Scale Personalized Recommendation. CoRR Liu Ke, Xuan Zhang, Benjamin Lee, G. Edward Suh, Hsien-Hsin S. Lee
2022	A*	`conf`	GuardNN: secure accelerator architecture for privacy-preserving deep learning. DAC Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
2022	A*	`conf`	MGX: near-zero overhead memory protection for data-intensive accelerators. ISCA Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
2022	J	`jnl`	Measuring and Controlling Split Layer Privacy Leakage Using Fisher Information. CoRR Kiwan Maeng, Chuan Guo, Sanjay Kariyappa, G. Edward Suh
2022	J	`jnl`	Reverse-Engineering CNN Models Using Side-Channel Attacks. IEEE Des. Test Weizhe Hua, Zhiru Zhang, G. Edward Suh
2022	J	`jnl`	STAMP: Lightweight TEE-Assisted MPC for Efficient Privacy-Preserving Machine Learning. CoRR Pengzhi Huang, Thang Hoang, Yueying Li, Elaine Shi, G. Edward Suh
2022	A*	`conf`	SecNDP: Secure Near-Data Processing with Untrusted Memory. HPCA Wenjie Xiong, Liu Ke, Dimitrije Jankov, Michael Kounavis, Xiaochen Wang, Eric Northup, Jie Amy Yang, Bilge Acun, Carole-Jean Wu, Ping Tak Peter Tang, G. Edward Suh, Xuan Zhang, Hsien-Hsin S. Lee
2022	A*	`conf`	SoftVN: efficient memory protection via software-provided version numbers. ISCA Muhammad Umar, Weizhe Hua, Zhiru Zhang, G. Edward Suh
2022	J	`jnl`	Structured Pruning is All You Need for Pruning CNNs at Initialization. CoRR Yaohui Cai, Weizhe Hua, Hongzheng Chen, G. Edward Suh, Christopher De Sa, Zhiru Zhang
2022	J	`jnl`	Verifiable Access Control for Augmented Reality Localization and Mapping. CoRR Shaowei Zhu, Hyo Jin Kim, Maurizio Monge, G. Edward Suh, Armin Alaghi, Brandon Reagen, Vincent T. Lee
2021	A*	`conf`	BCD deduplication: effective memory compression using partial cache-line deduplication. ASPLOS Sungbo Park, Ingab Kang, Yaebin Moon, Jung Ho Ahn, G. Edward Suh
2021	A*	`conf`	BulletTrain: Accelerating Robust Neural Network Training via Boundary Example Mining. NeurIPS Weizhe Hua, Yichi Zhang, Chuan Guo, Zhiru Zhang, G. Edward Suh
2021	J	`jnl`	BulletTrain: Accelerating Robust Neural Network Training via Boundary Example Mining. CoRR Weizhe Hua, Yichi Zhang, Chuan Guo, Zhiru Zhang, G. Edward Suh
2021	J	`jnl`	Guessing Outputs of Dynamically Pruned CNNs Using Memory Access Patterns. IEEE Comput. Archit. Lett. Benjamin Wu, Trishita Tiwari, G. Edward Suh, Aaron B. Wagner
2021	J	`jnl`	SecNDP: Secure Near-Data Processing with Untrusted Memory. IACR Cryptol. ePrint Arch. Wenjie Xiong, Liu Ke, Dimitrije Jankov, Michael Kounavis, Xiaochen Wang, Eric Northup, Jie Amy Yang, Bilge Acun, Carole-Jean Wu, Ping Tak Peter Tang, G. Edward Suh, Xuan Zhang, Hsien-Hsin S. Lee
2021	J	`jnl`	Sinan: Data Driven Resource Management for Cloud Microservices. CoRR Yanqi Zhang, Weizhe Hua, Zhuangzhuang Zhou, G. Edward Suh, Christina Delimitrou
2021	J	`jnl`	Sinan: Data-Driven, QoS-Aware Cluster Management for Microservices. CoRR Yanqi Zhang, Weizhe Hua, Zhuangzhuang Zhou, G. Edward Suh, Christina Delimitrou
2021	A*	`conf`	Sinan: ML-based and QoS-aware resource management for cloud microservices. ASPLOS Yanqi Zhang, Weizhe Hua, Zhuangzhuang Zhou, G. Edward Suh, Christina Delimitrou
2021	A*	`conf`	Wireless Charging Power Side-Channel Attacks. CCS Alexander S. La Cour, Khurram K. Afridi, G. Edward Suh
2021	J	`jnl`	Wireless Charging Power Side-Channel Attacks. CoRR Alexander S. La Cour, Khurram K. Afridi, G. Edward Suh
2020	J	`jnl`	A Case for Maximal Leakage as a Side Channel Leakage Metric. CoRR Benjamin Wu, Aaron B. Wagner, G. Edward Suh
2020	A	`conf`	Efficient nursery sizing for managed languages on multi-core processors with shared caches. CGO Mohamed Ismail, G. Edward Suh
2020	J	`jnl`	GuardNN: Secure DNN Accelerator for Privacy-Preserving Deep Learning. CoRR Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
2020	J	`jnl`	MgX: Near-Zero Overhead Memory Protection with an Application to Secure DNN Acceleration. CoRR Weizhe Hua, Muhammad Umar, Zhiru Zhang, G. Edward Suh
2020	—	`conf`	Optimal Mechanisms Under Maximal Leakage. CNS Benjamin Wu, Aaron B. Wagner, G. Edward Suh
2020	J	`jnl`	Path Planning Under Malicious Injections and Removals of Perceived Obstacles: A Probabilistic Programming Approach. IEEE Robotics Autom. Lett. Jacopo Banfi, Yizhou Zhang, G. Edward Suh, Andrew C. Myers, Mark E. Campbell
2020	A*	`conf`	Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. ICLR Yichi Zhang, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang
2020	J	`jnl`	Precision Gating: Improving Neural Network Efficiency with Dynamic Dual-Precision Activations. CoRR Yichi Zhang, Ritchie Zhao, Weizhe Hua, Nayun Xu, G. Edward Suh, Zhiru Zhang
2020	A*	`conf`	Stealthy Tracking of Autonomous Vehicles with Cache Side Channels. USENIX Security Symposium Mulong Luo, Andrew C. Myers, G. Edward Suh
2020	B	`conf`	Strong Asymptotic Composition Theorems for Sibson Mutual Information. ISIT Benjamin Wu, Aaron B. Wagner, G. Edward Suh, Ibrahim Issa
2020	J	`jnl`	Strong Asymptotic Composition Theorems for Sibson Mutual Information. CoRR Benjamin Wu, Aaron B. Wagner, G. Edward Suh, Ibrahim Issa
2020	J	`jnl`	The Cost of Software-Based Memory Management Without Virtual Memory. CoRR Drew Zagieboylo, G. Edward Suh, Andrew C. Myers
2019	A*	`conf`	Boosting the Performance of CNN Accelerators with Dynamic Fine-Grained Channel Gating. MICRO Weizhe Hua, Yuan Zhou, Christopher De Sa, Zhiru Zhang, G. Edward Suh
2019	A*	`conf`	Channel Gating Neural Networks. NeurIPS Weizhe Hua, Yuan Zhou, Christopher De Sa, Zhiru Zhang, G. Edward Suh
2019	A*	`conf`	Designing Secure Cryptographic Accelerators with Information Flow Enforcement: A Case Study on AES. DAC Zhenghong Jiang, Hanchen Jin, G. Edward Suh, Zhiru Zhang
2019	A*	`conf`	TWiCe: preventing row-hammering by exploiting time window counters. ISCA Eojin Lee, Ingab Kang, Sukhan Lee, G. Edward Suh, Jung Ho Ahn
2019	A	`conf`	Using Information Flow to Design an ISA that Controls Timing Channels. CSF Drew Zagieboylo, G. Edward Suh, Andrew C. Myers
2018	A*	`conf`	An Architectural Framework for Accelerating Dynamic Parallel Algorithms on Reconfigurable Hardware. MICRO Tao Chen, Shreesha Srinath, Christopher Batten, G. Edward Suh
2018	J	`jnl`	Channel Gating Neural Networks. CoRR Weizhe Hua, Christopher De Sa, Zhiru Zhang, G. Edward Suh
2018	A*	`conf`	FPGA-Based Remote Power Side-Channel Attacks. IEEE Symposium on Security and Privacy Mark Zhao, G. Edward Suh
2018	C	`conf`	Hardware-software co-optimization of memory management in dynamic languages. ISMM Mohamed Ismail, G. Edward Suh
2018	A	`conf`	High-level synthesis with timing-sensitive information flow enforcement. ICCAD Zhenghong Jiang, Steve Dai, G. Edward Suh, Zhiru Zhang
2018	A*	`conf`	HyperFlow: A Processor Architecture for Nonmalleable, Timing-Safe Information Flow Security. CCS Andrew Ferraiuolo, Mark Zhao, Andrew C. Myers, G. Edward Suh
2018	—	`conf`	Quantitative Overhead Analysis for Python. IISWC Mohamed Ismail, G. Edward Suh
2018	A*	`conf`	Reverse engineering convolutional neural networks through side-channel information leaks. DAC Weizhe Hua, Zhiru Zhang, G. Edward Suh
2018	—	`conf`	Secure Autonomous Cyber-Physical Systems Through Verifiable Information Flow Control. CPS-SPC@CCS Jed Liu, Joe Corbett-Davies, Andrew Ferraiuolo, Alexander Ivanov, Mulong Luo, G. Edward Suh, Andrew C. Myers, Mark E. Campbell
2018	J	`jnl`	TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering. IEEE Comput. Archit. Lett. Eojin Lee, Sukhan Lee, G. Edward Suh, Jung Ho Ahn
2017	A*	`conf`	Secure Dynamic Memory Scheduling Against Timing Channel Attacks. HPCA Yao Wang, Benjamin Wu, G. Edward Suh
2017	A*	`conf`	Secure Information Flow Verification with Mutable Dependent Types. DAC Andrew Ferraiuolo, Weizhe Hua, Andrew C. Myers, G. Edward Suh
2017	A*	`conf`	Verification of a Practical Hardware Security Architecture Through Static Information Flow Analysis. ASPLOS Andrew Ferraiuolo, Rui Xu, Danfeng Zhang, Andrew C. Myers, G. Edward Suh
2016	A*	`conf`	Efficient data supply for hardware accelerators with prefetching and access/execute decoupling. MICRO Tao Chen, G. Edward Suh
2016	A*	`conf`	Lattice priority scheduling: Low-overhead timing-channel protection for a shared memory controller. HPCA Andrew Ferraiuolo, Yao Wang, Danfeng Zhang, Andrew C. Myers, G. Edward Suh
2016	A	`conf`	Prediction-Guided Performance-Energy Trade-off with Continuous Run-Time Adaptation. ISLPED Taejoon Song, Daniel Lo, G. Edward Suh
2016	A*	`conf`	SecDCP: secure dynamic cache partitioning for efficient timing channel protection. DAC Yao Wang, Andrew Ferraiuolo, Danfeng Zhang, Andrew C. Myers, G. Edward Suh
2015	A*	`conf`	A Hardware Design Language for Timing-Sensitive Information-Flow Security. ASPLOS Danfeng Zhang, Yao Wang, G. Edward Suh, Andrew C. Myers
2015	A*	`conf`	Execution time prediction for energy-efficient hardware accelerators. MICRO Tao Chen, Alexander Rucker, G. Edward Suh
2015	A*	`conf`	Improving worst-case cache performance through selective bypassing and register-indexed cache. DAC Mohamed Ismail, Daniel Lo, G. Edward Suh
2015	A*	`conf`	Prediction-guided performance-energy trade-off for interactive applications. MICRO Daniel Lo, Taejoon Song, G. Edward Suh
2015	A*	`conf`	Run-time monitoring with adjustable overhead using dataflow-guided filtering. HPCA Daniel Lo, Tao Chen, Mohamed Ismail, G. Edward Suh
2014	—	`conf`	Author retrospective AEGIS: architecture for tamper-evident and tamper-resistant processing. ICS 25th Anniversary G. Edward Suh, Christopher W. Fletcher, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
2014	—	`conf`	Author retrospective for analytical cache models with applications to cache partitioning. ICS 25th Anniversary G. Edward Suh, George Kurian, Srinivas Devadas, Larry Rudolph
2014	A*	`conf`	Low-overhead and high coverage run-time race detection through selective meta-data management. HPCA Ruirui C. Huang, Erik Halberg, Andrew Ferraiuolo, G. Edward Suh
2014	A	`conf`	Slack-aware opportunistic monitoring for real-time systems. RTAS Daniel Lo, Mohamed Ismail, Tao Chen, G. Edward Suh
2014	A*	`conf`	Timing channel protection for a shared memory controller. HPCA Yao Wang, Andrew Ferraiuolo, G. Edward Suh
2013	A*	`conf`	Hiding Information in Flash Memory. IEEE Symposium on Security and Privacy YingLei Wang, Wing-Kei S. Yu, Sarah Q. Xu, Edwin Kan, G. Edward Suh
2013	A*	`conf`	Non-race concurrency bug detection through order-sensitive critical sections. ISCA Ruirui C. Huang, Erik Halberg, G. Edward Suh
2013	J	`jnl`	Optimal and Heuristic Application-Aware Oblivious Routing. IEEE Trans. Computers Michel A. Kinsy, Myong Hyon Cho, Keun Sup Shim, Mieszko Lis, G. Edward Suh, Srinivas Devadas
2013	—	`conf`	Quadrisection-based task mapping on many-core processors for energy-efficient on-chip communication. NOCS Nithin Michael, Yao Wang, G. Edward Suh, Ao Tang
2012	—	`conf`	Efficient Timing Channel Protection for On-Chip Networks. NOCS Yao Wang, G. Edward Suh
2012	C	`conf`	Fast development of hardware-based run-time monitors through architecture framework and high-level synthesis. ICCD Mohamed Ismail, G. Edward Suh
2012	A*	`conf`	Flash Memory for Ubiquitous Hardware Security Functions: True Random Number Generation and Device Fingerprints. IEEE Symposium on Security and Privacy YingLei Wang, Wing-Kei S. Yu, Shuo Wu, Greg Malysa, G. Edward Suh, Edwin Kan
2012	A*	`conf`	Hardware enhanced security. CCS Ruby B. Lee, Simha Sethumadhavan, G. Edward Suh
2012	A	`conf`	High-performance parallel accelerator for flexible and efficient run-time monitoring. DSN Daniel Y. Deng, G. Edward Suh
2012	Misc	`conf`	On the performance of averaged optimal routing. CISS Nithin Michael, Ao Tang, G. Edward Suh
2012	A*	`conf`	Worst-case execution time analysis for parallel run-time monitoring. DAC Daniel Lo, G. Edward Suh
2011	—	`conf`	A non-volatile microcontroller with integrated floating-gate transistors. DSN Workshops Wing-Kei S. Yu, Shantanu Rajwade, Sung-En Wang, Bob Lian, G. Edward Suh, Edwin Kan
2011	—	`conf`	Analysis of application-aware on-chip routing under traffic uncertainty. NOCS Nithin Michael, Milen Nikolov, Ao Tang, G. Edward Suh, Christopher Batten
2011	—	`conf`	Extracting Device Fingerprints from Flash Memory by Exploiting Physical Variations. TRUST Pravin Prabhu, Ameen Akel, Laura M. Grupp, Wing-Kei S. Yu, G. Edward Suh, Edwin Kan, Steven Swanson
2011	B	`conf`	FlexCache: Field Extensible Cache Controller Architecture Using On-chip Reconfigurable Fabric. FPL Daniel Lo, Greg Malysa, G. Edward Suh
2011	C	`conf`	Precise exception support for decoupled run-time monitoring architectures. ICCD Daniel Y. Deng, G. Edward Suh
2011	A*	`conf`	SRAM-DRAM hybrid memory with applications to efficient register files in fine-grained multi-threading. ISCA Wing-Kei S. Yu, Ruirui C. Huang, Sarah Q. Xu, Sung-En Wang, Edwin Kan, G. Edward Suh
2011	—	`conf`	Systematic Security Assessment at an Early Processor Design Stage. TRUST Ruirui C. Huang, David Grawrock, David C. Doughty, G. Edward Suh
2010	—	`ch.`	Authentication of Processor Hardware Leveraging Performance Limits in Detailed Simulations and Emulations. Towards Hardware-Intrinsic Security Daniel Y. Deng, Andrew H. Chan, G. Edward Suh
2010	A*	`conf`	Flexible and Efficient Instruction-Grained Run-Time Monitoring Using On-Chip Reconfigurable Fabric. MICRO Daniel Y. Deng, Daniel Lo, Greg Malysa, Skyler Schneider, G. Edward Suh
2010	A*	`conf`	IVEC: off-chip memory integrity protection for both security and reliability. ISCA Ruirui C. Huang, G. Edward Suh
2010	A	`conf`	Implementing dynamic information flow tracking on microprocessors with integrated FPGA fabric (abstract only). FPGA Skyler Schneider, Daniel Y. Deng, Daniel Lo, Greg Malysa, G. Edward Suh
2010	—	`conf`	Low power nonvolatile SRAM circuit with integrated low voltage nanocrystal PMOS Flash. SoCC Shantanu Rajwade, Wing-Kei S. Yu, Sarah Q. Xu, Tuo-Hung Hou, G. Edward Suh, Edwin Kan
2010	A*	`conf`	Orthrus: efficient software integrity protection on multi-cores. ASPLOS Ruirui C. Huang, Daniel Y. Deng, G. Edward Suh
2009	A*	`conf`	Application-aware deadlock-free oblivious routing. ISCA Michel A. Kinsy, Myong Hyon Cho, Tina Wen, G. Edward Suh, Marten van Dijk, Srinivas Devadas
2009	A*	`conf`	Hardware authentication leveraging performance limits in detailed simulations and emulations. DAC Daniel Y. Deng, Andrew H. Chan, G. Edward Suh
2009	—	`conf`	Static virtual channel allocation in oblivious routing. NOCS Keun Sup Shim, Myong Hyon Cho, Michel A. Kinsy, Tina Wen, Mieszko Lis, G. Edward Suh, Srinivas Devadas
2008	A	`conf`	Diastolic arrays: throughput-driven reconfigurable computing. ICCAD Myong Hyon Cho, Chih-Chi Cheng, Michel A. Kinsy, G. Edward Suh, Srinivas Devadas
2007	J	`jnl`	Aegis: A Single-Chip Secure Processor. IEEE Des. Test Comput. G. Edward Suh, Charles W. O'Donnell, Srinivas Devadas
2007	A*	`conf`	Physical Unclonable Functions for Device Authentication and Secret Key Generation. DAC G. Edward Suh, Srinivas Devadas
2006	J	`jnl`	Speeding up Exponentiation using an Untrusted Computational Resource. Des. Codes Cryptogr. Marten van Dijk, Dwaine E. Clarke, Blaise Gassend, G. Edward Suh, Srinivas Devadas
2005	J	`jnl`	AEGIS: A single-chip secure processor. Inf. Secur. Tech. Rep. G. Edward Suh, Charles W. O'Donnell, Srinivas Devadas
2005	—	`—`	AEGIS: a single-chip secure processor. G. Edward Suh
2005	A*	`conf`	Design and Implementation of the AEGIS Single-Chip Secure Processor Using Physical Random Functions. ISCA G. Edward Suh, Charles W. O'Donnell, Ishan Sachdev, Srinivas Devadas
2005	J	`jnl`	Extracting secret keys from integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. Daihyun Lim, Jae W. Lee, Blaise Gassend, G. Edward Suh, Marten van Dijk, Srinivas Devadas
2005	—	`conf`	Towards Constant Bandwidth Overhead Integrity Checking of Untrusted Data. S&P Dwaine E. Clarke, G. Edward Suh, Blaise Gassend, Ajay Sudan, Marten van Dijk, Srinivas Devadas
2004	J	`jnl`	Dynamic Partitioning of Shared Cache Memory. J. Supercomput. G. Edward Suh, Larry Rudolph, Srinivas Devadas
2004	A*	`conf`	Secure program execution via dynamic information flow tracking. ASPLOS G. Edward Suh, Jae W. Lee, David Zhang, Srinivas Devadas
2003	A	`conf`	AEGIS: architecture for tamper-evident and tamper-resistant processing. ICS G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
2003	A*	`conf`	Caches and Hash Trees for Efficient Memory Integrity Verification. HPCA Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, Marten van Dijk, Srinivas Devadas
2003	A*	`conf`	Efficient Memory Integrity Verification and Encryption for Secure Processors. MICRO G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas
2003	A*	`conf`	Embedded intelligent SRAM. DAC Prabhat Jain, G. Edward Suh, Srinivas Devadas
2003	A	`conf`	Incremental Multiset Hash Functions and Their Application to Memory Integrity Checking. ASIACRYPT Dwaine E. Clarke, Srinivas Devadas, Marten van Dijk, Blaise Gassend, G. Edward Suh
2002	A*	`conf`	A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning. HPCA G. Edward Suh, Srinivas Devadas, Larry Rudolph
2001	A	`conf`	Analytical cache models with applications to cache partitioning. ICS G. Edward Suh, Srinivas Devadas, Larry Rudolph
2001	C	`conf`	Effects of Memory Performance on Parallel Job Scheduling. JSSPP G. Edward Suh, Larry Rudolph, Srinivas Devadas