Félix Moreno

20 papers C 6Journal 11Unranked 3
YearRankTypeTitle / Venue / Authors
2019 J jnl
Design space exploration of heterogeneous MPSoCs with variable number of hardware accelerators.
Microprocess. Microsystems
Siyuan Xu, Shuangnan Liu, Yidi Liu, Anushree Mahapatra, Monica Villaverde, Félix Moreno, Benjamin Carrión Schäfer
2019 J jnl
On the adaptability of ensemble methods for distributed classification systems: A comparative analysis.
Int. J. Distributed Sens. Networks
Monica Villaverde, David Aledo, David Perez, Félix Moreno
2019 J jnl
VHDL vs. SystemC: Design of Highly Parameterizable Artificial Neural Networks.
IEICE Trans. Inf. Syst.
David Aledo, Benjamin Carrión Schäfer, Félix Moreno
2017 C conf
Application Specific Behavioral Synthesis Design Space Exploration: Artificial Neural Networks. A Case Study.
DSD
Benjamin Carrión Schäfer, David Aledo, Félix Moreno
2017 — conf
Characterization and optimization of behavioral hardware accelerators in heterogeneous MPSoCs.
ReCoSoC
Yidi Liu, Monica Villaverde, Félix Moreno, Benjamin Carrión Schäfer
2015 J jnl
Evolutionary Computing and Particle Filtering: A Hardware-Based Motion Estimation System.
IEEE Trans. Computers
Alfonso Rodríguez, Félix Moreno
2015 J jnl
Multiple feature points representation in target localization of wireless visual sensor networks.
J. Netw. Comput. Appl.
Wei Li, Jorge Portilla, Félix Moreno, Guixuan Liang, Teresa Riesgo
2015 J jnl
Self-Learning Embedded System for Object Identification in Intelligent Infrastructure Sensors.
Sensors
Monica Villaverde, David Perez, Félix Moreno
2014 C conf
Cooperative learning model based on multi-agent architecture for embedded intelligent systems.
IECON
Monica Villaverde, David Perez, Félix Moreno
2014 C conf
Low-cost radar-based target identification prototype using an expert system.
INDIN
David Perez, Monica Villaverde, Félix Moreno, Noemi Nogar, Felix Ezcurra, Ekaitz Aznar
2012 J jnl
Accelerating FPGA-based evolution of wavelet transform filters by optimized task scheduling.
Microprocess. Microsystems
Rubén Salvador, Alberto Vidal, Félix Moreno, Teresa Riesgo, Lukás Sekanina
2012 C conf
The DLMT hardware implementation. A comparative study with the DCT and the DWT.
IECON
Félix Moreno, David Aledo
2011 J jnl
Evolutionary Approach to Improve Wavelet Transforms for Image Compression in Embedded Systems.
EURASIP J. Adv. Signal Process.
Rubén Salvador, Félix Moreno, Teresa Riesgo, Lukás Sekanina
2010 C conf
A Design Process for Hardware/Software System Co-design and its Application to Designing a Reconfigurable FPGA.
DSD
Félix Moreno, Ignacio López, Ricardo Sanz
2010 — conf
Evolutionary design and optimization of Wavelet Transforms for image compression in embedded systems.
AHS
Rubén Salvador, Félix Moreno, Teresa Riesgo, Lukás Sekanina
2010 C conf
High Level Validation of an Optimization Algorithm for the Implementation of Adaptive Wavelet Transforms in FPGAs.
DSD
Rubén Salvador, Félix Moreno, Teresa Riesgo, Lukás Sekanina
2009 J jnl
Reconfigurable Hardware Architecture of a Shape Recognition System Based on Specialized Tiny Neural Networks With Online Training.
IEEE Trans. Ind. Electron.
Félix Moreno, Jaime Alarcón, Rubén Salvador, Teresa Riesgo
1997 J jnl
An approach to the design of RISC core processors for VLSI embedded systems.
J. Syst. Archit.
José M. Fernández, Félix Moreno, Juan M. Meneses
1996 J jnl
A High-Performance Architecture with a Macroblock-Level-Pipeline for MPEG-2 Coding.
Real Time Imaging
José M. Fernández, Félix Moreno, Juan M. Meneses
1994 — conf
A new knowledge-based design manager assistant for CAD frameworks.
EURO-DAC
Félix Moreno, Juan M. Meneses