Frédéric Bancel

11 papers A 3B 1C 3Misc 1Journal 1Unranked 2
YearRankTypeTitle / Venue / Authors
2007 C conf
Robustness of circuits under delay-induced faults : test of AES with the PAFI tool.
IOLTS
Olivier Faurax, Assia Tria, Laurent Freund, Frédéric Bancel
2007 J jnl
Securing Scan Control in Crypto Chips.
J. Electron. Test.
David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre
2006 A conf
A secure scan design methodology.
DATE
David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre
2006 — conf
Scan Pattern Watermarking.
LATW
David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre
2006 C conf
Secure Scan Techniques: A Comparison.
IOLTS
David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre
2006 A conf
Securing embedded programmable gate arrays in secure circuits.
IPDPS
Nicolas Valette, Lionel Torres, Gilles Sassatelli, Frédéric Bancel
2005 — conf
Integration of Reconfigurable Logic on Secure Circuits.
ReCoSoC
Nicolas Valette, Lionel Torres, Frédéric Bancel, Nicolas Bérard
2005 B conf
Test control for secure scan designs.
ETS
David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre
2004 C conf
Scan Design and Secure Chip.
IOLTS
David Hély, Marie-Lise Flottes, Frédéric Bancel, Bruno Rouzeyre, Nicolas Bérard, Michel Renovell
1993 Misc conf
A DFT Technique to Improve ATPG Efficiency for Sequential Circuits.
VLSI Design
Yves Bertrand, Frédéric Bancel, Michel Renovell
1993 A conf
Multiconfiguration Technique to Reduce Test Duration for Sequential Circuits.
ITC
Yves Bertrand, Frédéric Bancel, Michel Renovell