Fredrik Dahlgren

41 papers A* 10A 4B 2C 2Journal 13Unranked 9

Year	Rank	Type	Title / Venue / Authors
2025	C	`conf`	On Low-Complexity DFT-Spread Orthogonal Frequency Division Multiplexing. ISNCC Mojtaba Mahdavi, Tanishq Reddy Gouni, Muris Sarajlic, Alexander Hunt, Rickard Ljung, Fredrik Dahlgren, Hans-Jürgen Zepernick
2015	A*	`conf`	HyComp: a hybrid cache compression method for selection of data-type-specific compression methods. MICRO Angelos Arelakis, Fredrik Dahlgren, Per Stenström
2007	—	`—`	Effective Distribution Theory. Fredrik Dahlgren
2007	J	`jnl`	Partial Continuous Functions and Admissible Domain Representations. J. Log. Comput. Fredrik Dahlgren
2006	C	`conf`	Partial Continuous Functions and Admissible Domain Representations. CiE Fredrik Dahlgren
2004	J	`jnl`	Computability and continuity in metric partial algebras equipped with computability structures. Math. Log. Q. Fredrik Dahlgren
2002	A	`conf`	TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors. ISLPED Magnus Ekman, Per Stenström, Fredrik Dahlgren
2001	B	`conf`	Future Mobile Phones - Complex Design Challenges from an Embedded Systems Perspective. ICECCS Fredrik Dahlgren
2001	—	`conf`	Topic 08+13: Instruction-Level Parallelism and Computer Architecture. Euro-Par Eduard Ayguadé, Fredrik Dahlgren, Christine Eisenbeis, Roger Espasa, Guang R. Gao, Henk L. Muller, Rizos Sakellariou, André Seznec
2000	A*	`conf`	A Prefetching Technique for Irregular Accesses to Linked Data Structures. HPCA Magnus Karlsson, Fredrik Dahlgren, Per Stenström
2000	A	`conf`	Exploration of the Spatial Locality on Emerging Applications and the Consequences for Cache Performance. IPDPS Martin Kämpe, Fredrik Dahlgren
2000	A*	`conf`	Recency-based TLB preloading. ISCA Ashley Saulsbury, Fredrik Dahlgren, Per Stenström
2000	A	`conf`	Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors. IPDPS Jim Nilsson, Fredrik Dahlgren
1999	J	`jnl`	Cache-Only Memory Architectures. Computer Fredrik Dahlgren, Josep Torrellas
1999	A	`conf`	Efficient management of memory hierarchies in embedded DRAM systems. International Conference on Supercomputing Ashley Saulsbury, Su-Jaen Huang, Fredrik Dahlgren
1999	J	`jnl`	Evaluation of Compiler-Controlled Updating to Reduce Coherence-Miss Penalties in Shared-Memory Multiprocessors. J. Parallel Distributed Comput. Jonas Skeppstedt, Fredrik Dahlgren, Per Stenström
1999	B	`conf`	Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors. ICPP Jim Nilsson, Fredrik Dahlgren
1999	J	`jnl`	Techniques for Improving Performance of Hybrid Snooping Cache Protocols. J. Parallel Distributed Comput. Fredrik Dahlgren
1998	—	`conf`	A holistic approach to computer system design education based on system simulation techniques. WCAE@ISCA Per Stenström, Fredrik Dahlgren
1998	J	`jnl`	An evaluation of hardware-based and compiler-controlled optimizations of snooping cache protocols. Future Gener. Comput. Syst. Fredrik Dahlgren, Jonas Skeppstedt, Per Stenström
1998	J	`jnl`	Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors. IEEE Trans. Computers Fredrik Dahlgren, Michel Dubois, Per Stenström
1998	—	`conf`	SimICS/Sun4m: A Virtual Workstation. USENIX ATC Peter S. Magnusson, Fredrik Larsson, Andreas Moestedt, Bengt Werner, Jim Nilsson, Per Stenström, Fredrik Lundholm, Magnus Karlsson, Fredrik Dahlgren, Håkan Grahn
1998	A*	`conf`	The Sensitivity of Communication Mechanisms to Bandwidth and Latency. HPCA Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal
1997	J	`jnl`	Boosting the Performance of Shared Memory Multiprocessors. Computer Per Stenström, Mats Brorsson, Fredrik Dahlgren, Håkan Grahn, Michel Dubois
1997	J	`jnl`	Reducing the Read-Miss Penalty for Flat COMA Protocols. Comput. J. Fredrik Dahlgren, Per Stenström, Mårten Björkman
1997	A*	`conf`	Reducing the Replacement Overhead in Bus-Based COMA Multiprocessors. HPCA Fredrik Dahlgren, Anders Landin
1996	J	`jnl`	Applications for Shared Memory Multiprocessors (Guest Editors' Introduction). Computer Per Stenström, Fredrik Dahlgren
1996	A*	`conf`	Bus-Based COMA - Reducing Traffic in Shared-Bus Multiprocessors. HPCA Anders Landin, Fredrik Dahlgren
1996	J	`jnl`	Evaluation of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors. IEEE Trans. Parallel Distributed Syst. Fredrik Dahlgren, Per Stenström
1995	A*	`conf`	Boosting the Performance of Hybrid Snooping Cache Protocols. ISCA Fredrik Dahlgren
1995	A*	`conf`	Effectiveness of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors. HPCA Fredrik Dahlgren, Per Stenström
1995	J	`jnl`	Sequential Hardware Prefetching in Shared-Memory Multiprocessors. IEEE Trans. Parallel Distributed Syst. Fredrik Dahlgren, Michel Dubois, Per Stenström
1995	J	`jnl`	Using Write Caches to Improve Performance of Cache Coherence Protocols in Shared-Memory Multiprocessors. J. Parallel Distributed Comput. Fredrik Dahlgren, Per Stenström
1995	—	`conf`	Using hints to reduce the read miss penalty for flat COMA protocols. HICSS (1) Mårten Björkman, Fredrik Dahlgren, Per Stenström
1994	A*	`conf`	Combined Performance Gains of Simple Cache Protocol Extensions. ISCA Fredrik Dahlgren, Michel Dubois, Per Stenström
1994	—	`conf`	Reducing the Write Traffic for a Hybrid Cache Protocol. ICPP (1) Fredrik Dahlgren, Per Stenström
1993	—	`conf`	Fixed and Adaptive Sequential Prefetching in Shared Memory Multiprocessors. ICPP (1) Fredrik Dahlgren, Michel Dubois, Per Stenström
1993	—	`conf`	The Cachemire Test Bench A Flexible And Effective Approach For Simulation Of Multiprocessors. Annual Simulation Symposium Mats Brorsson, Fredrik Dahlgren, Håkan Nilsson, Per Stenström
1991	—	`conf`	A Lockup-Free Multiprocessor Cache Design. ICPP (1) Per Stenström, Fredrik Dahlgren, Lars Lundberg
1991	—	`conf`	A program-driven simulation model of an MIMD multiprocessor. Annual Simulation Symposium Fredrik Dahlgren
1991	A*	`conf`	On Reconfigurable On-Chip Data Caches. MICRO Fredrik Dahlgren, Per Stenström