Franz Kuttner - RankMe

13 papers A 1C 1Journal 3Unranked 8

Year	Rank	Type	Title / Venue / Authors
2017	—	`conf`	13.2 A digital multimode polar transmitter supporting 40MHz LTE Carrier Aggregation in 28nm CMOS. ISSCC Michael Fulde, Alexander Belitzer, Zdravko Boos, Michael Bruennert, Jonas Fritzin, Hans Geltinger, Marcus Groinig, Daniel Gruber, Simon Gruenberger, Thomas Hartig, Vahur Kampus, Boris Kapfelsperger, Franz Kuttner, Stephan Leuschner, Thomas Maletz, Andreas Menkhoff, José Moreira, Alan Paussa, Davide Ponton, Harald Pretl, Daniel Sira, Ulrich Steinacker, Nenad Stevanovic
2011	—	`conf`	A digitally controlled DC-DC converter for SoC in 28nm CMOS. ISSCC Franz Kuttner, Harun Habibovic, Thomas Hartig, Michael Fulde, Gernot Babin, Andreas Santner, Peter Bogner, Claus Kropf, Harald Riesslegger, Uwe Hodel
2011	—	`conf`	A fully digital multimode polar transmitter employing 17b RF DAC in 3G mode. ISSCC Zdravko Boos, Andreas Menkhoff, Franz Kuttner, Markus Schimper, José Moreira, Hans Geltinger, Timo Gossmann, Peter Pfann, Alexander Belitzer, Thomas Bauernfeind
2010	C	`conf`	A mixer-filter combination of a direct conversion receiver for DVB-H applications in 65nm CMOS. DDECS Heimo Uhrmann, Lukas Dörrer, Franz Kuttner, Kurt Schweiger, Horst Zimmermann
2008	—	`conf`	A Continuous Time ΔΣ ADC for Voice Coding with 92dB DR in 45nm CMOS. ISSCC Lukas Dörrer, Franz Kuttner, Andreas Santner, Claus Kropf, Thomas Puaschitz, Thomas Hartig, Manfred Punzenberger
2007	J	`jnl`	A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS CoRR Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner
2006	—	`conf`	A 14b 100MS/s digitally self-calibrated pipelined ADC in 0.13µm CMOS. ISSCC Peter Bogner, Franz Kuttner, Claus Kropf, Thomas Hartig, Markus Burian, Hermann Eul
2005	J	`jnl`	A 3-mW 74-dB SNR 2-MHz continuous-time delta-sigma ADC with a tracking ADC quantizer in 0.13-μm CMOS. IEEE J. Solid State Circuits Lukas Dörrer, Franz Kuttner, Patrizia Greco, Patrick Torta, Thomas Hartig
2005	J	`jnl`	A 6-bit 1.2-GS/s low-power flash-ADC in 0.13-μm digital CMOS. IEEE J. Solid State Circuits Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner
2004	A	`conf`	A 6bit, 1.2GSps Low-Power Flash-ADC in 0.13µm Digital CMOS. DATE Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner
2004	—	`conf`	A 6bit, 1.2GSps low-power flash-ADC in 0.13μm digital CMOS. ESSCIRC Christoph Sandner, Martin Clara, Andreas Santner, Thomas Hartig, Franz Kuttner
2003	—	`conf`	10-bit, 3 mW continuous-time sigma-delta ADC for UMTS in a 0.12 μm CMOS process. ESSCIRC Lukas Dörrer, Franz Kuttner, Andreas Wiesbauer, Antonio Di Giandomenico, Thomas Hartig
2002	—	`conf`	A 1.8 V fully embedded 10 b 160 MS/s two-step ADC in 0.18 μm CMOS. CICC Martin Clara, Andreas Wiesbauer, Franz Kuttner