Frank Vahid - RankMe

215 papers A* 12A 46B 3C 7Misc 17Journal 62Unranked 63

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Code Replacement Detection as a Cheating Detection Approach in Programming Classes. J. Comput. Sci. Coll. Ashley Pang, Lizbeth Areizaga, Benjamin Denzler, Mariam Salloum, Frank Vahid
2025	—	`conf`	Midterm Exam Outliers Efficiently Highlight Potential Cheaters on Programming Assignments. SIGCSE (1) Shirin Haji Amin Shirazi, Ashley Pang, Allan Knight, Mariam Salloum, Frank Vahid
2024	J	`jnl`	AI in CS Education: Opportunities, Challenges, and Pitfalls to Avoid. Inroads Frank Vahid
2024	—	`conf`	CS1 Instructors: Flexibility in Content Approaches is Justified, and Can Enable More Cross-University Cooperation. SIGCSE (1) Frank Vahid
2024	—	`conf`	ChatGPT and Cheat Detection in CS1 Using a Program Autograding System. ITiCSE (1) Ashley Pang, Frank Vahid
2024	—	`conf`	Experiences Teaching a CS1 Common Course across 7 Institutions. SIGCSE (1) Frank Vahid, Ashley Pang
2024	—	`conf`	Microteaching: Binary Heaps, Side-Channel Attacks, Equitable Grading, Java Classes, Loops, and 3D Java. SIGCSE (2) Colleen M. Lewis, Cynthia Bailey Lee, Adam Blank, Maria Camarena, Manuel Hernández, Frank Vahid
2024	—	`conf`	Performance Analysis and Interviews of Non-CS-Major Students Sanctioned for Cheating in CS1. ITiCSE (1) Ashley Pang, Frank Vahid
2024	—	`conf`	Style Anomalies Can Suggest Cheating in CS1 Programs. ITiCSE (1) Benjamin Denzler, Frank Vahid, Ashley Pang, Mariam Salloum
2024	—	`conf`	Style Anomalies Can Suggest Cheating in CS1 Programs. SIGCSE (2) Benjamin Denzler, Frank Vahid, Ashley Pang
2024	—	`conf`	Towards Comprehensive Metrics for Programming Cheat Detection. SIGCSE (1) Frank Vahid, Ashley Pang, Benjamin Denzler
2023	—	`conf`	Experiences Teaching Coral Before C++ in CS1. SIGCSE (1) Frank Vahid, Kelly Downey, Lizbeth Areizaga, Ashley Pang
2023	—	`conf`	Impact of Several Low-Effort Cheating-Reduction Methods in a CS1 Class. SIGCSE (1) Frank Vahid, Kelly Downey, Ashley Pang, Chelsea Gordon
2023	—	`conf`	Impact of Student Time Spent on Performance in a CS1 Class, Including Prior Experience Effect. ITiCSE (2) Frank Vahid, Ashley Pang, Kelly Downey
2023	J	`jnl`	Less Is More: Students Skim Lengthy Online Textbooks. IEEE Trans. Educ. Chelsea Gordon, Roman Lysecky, Frank Vahid
2023	—	`conf`	Significant Trends in CS Educational Material: Current and Future. SIGCSE (2) Peter Brusilovsky, Barbara J. Ericson, Cay S. Horstmann, Christian Servin, Frank Vahid, Craig B. Zilles
2023	—	`conf`	Towards Grading for Equity in a Large CS1 Class: An Experience with Flexible Deadlines and Resubmissions. ITiCSE (2) Frank Vahid, Ashley Pang, Kelly Downey
2023	—	`conf`	Ultra-Lightweight Early Prediction of At-Risk Students in CS1. SIGCSE (1) Chelsea Gordon, Stanley Zhao, Frank Vahid
2023	—	`conf`	Variability-Inducing Requirements for Programs: Increasing Solution Variability for Similarity Checking. ITiCSE (1) Ashley Pang, Frank Vahid
2022	J	`jnl`	Member spotlight. ACM SIGCSE Bull. Jeffrey Miller, Charles Wallace, Frank Vahid
2021	J	`jnl`	An analysis of using coral many small programs in CS1. J. Comput. Sci. Coll. Joe Michael Allen, Frank Vahid
2021	A	`conf`	Concise Graphical Representations of Student Effort on Weekly Many Small Programs. SIGCSE Joe Michael Allen, Frank Vahid
2021	J	`jnl`	Progression highlighting for programming courses. J. Comput. Sci. Coll. Nabeel Alzahrani, Frank Vahid
2021	C	`conf`	The shift from static college textbooks to customizable content: A case study at zyBooks. FIE Chelsea Gordon, Roman Lysecky, Frank Vahid
2019	A	`conf`	An Analysis of Using Many Small Programs in CS1. SIGCSE Joe Michael Allen, Frank Vahid, Alex D. Edgcomb, Kelly Downey, Kris Miller
2019	A	`conf`	Auto-Graded Programming Labs: Dos and Don'ts for Less-Stressed Higher-Performing Students, Reduced Grading Time, and Happier Teachers, . SIGCSE Frank Vahid, Roman Lysecky
2019	C	`conf`	New web-based learning content for core programming concepts using Coral. FIE Frank Vahid, Alex D. Edgcomb, Roman Lysecky, Yamuna Rajasekhar
2019	J	`jnl`	Switching Predictive Control Using Reconfigurable State-Based Model. ACM Trans. Design Autom. Electr. Syst. Maral Amir, Frank Vahid, Tony Givargis
2018	A	`conf`	Interactive, Language-neutral Flowcharts and Pseudocode for Teaching Core CS0/1 Programming Concepts: (Abstract Only). SIGCSE Alex D. Edgcomb, Frank Vahid
2018	A	`conf`	Python Versus C++: An Analysis of Student Struggle on Small Coding Exercises in Introductory Programming Courses. SIGCSE Nabeel Alzahrani, Frank Vahid, Alex D. Edgcomb, Kevin Nguyen, Roman Lysecky
2018	A	`conf`	Teaching Students a Systematic Approach to Debugging: (Abstract Only). SIGCSE Roman Lysecky, Frank Vahid
2017	A	`conf`	Getting Students to Earnestly Do Reading, Studying, and Homework in an Introductory Programming Class. SIGCSE Alex D. Edgcomb, Frank Vahid, Roman Lysecky, Susan Lysecky
2015	J	`jnl`	Graph-Based Approaches to Placement of Processing Element Networks on FPGAs for Physical Model Simulation. ACM Trans. Reconfigurable Technol. Syst. Bailey Miller, Frank Vahid, Tony Givargis, Philip Brisk
2015	C	`conf`	How many points should be awarded for interactive textbook reading assignments? FIE Alex D. Edgcomb, Frank Vahid
2015	A	`conf`	Interactive Ebooks and Course Materials: A BOF for Authors and Instructors (Abstract Only). SIGCSE Cay S. Horstmann, Smita Bakshi, Amruth Kumar, Frank Vahid
2015	C	`conf`	Students learn more with less text that covers the same core topics. FIE Alex D. Edgcomb, Frank Vahid, Roman L. Lysecky
2014	J	`jnl`	A Survey on Concepts, Applications, and Challenges in Cyber-Physical Systems. KSII Trans. Internet Inf. Syst. Volkan Gunes, Steffen Peter, Tony Givargis, Frank Vahid
2013	J	`jnl`	Accurate and Efficient Algorithms that Adapt to Privacy-Enhanced Video for Improved Assistive Monitoring. ACM Trans. Manag. Inf. Syst. Alex D. Edgcomb, Frank Vahid
2013	—	`conf`	An efficient compression scheme for checkpointing of FPGA-based digital mockups. ASP-DAC Ting-Shuo Chou, Tony Givargis, Chen Huang, Bailey Miller, Frank Vahid
2013	C	`conf`	An online revolution in learning and teaching. FIE Diane T. Rover, Yacob Astatke, Smita Bakshi, Frank Vahid
2013	—	`conf`	Automated In-Home Assistive Monitoring with Privacy-Enhanced Video. ICHI Alex D. Edgcomb, Frank Vahid
2013	J	`jnl`	Automatic synthesis of physical system differential equation models to a custom network of general processing elements on FPGAs. ACM Trans. Embed. Comput. Syst. Chen Huang, Frank Vahid, Tony Givargis
2013	A	`conf`	Embedding-based placement of processing element networks on FPGAs for physical model simulation. FPGA Bailey Miller, Frank Vahid, Tony Givargis
2013	—	`conf`	Estimating Daily Energy Expenditure from Video for Assistive Monitoring. ICHI Alex D. Edgcomb, Frank Vahid
2013	A*	`conf`	Exploration with upgradeable models using statistical methods for physical model emulation. DAC Bailey Miller, Frank Vahid, Tony Givargis
2013	J	`jnl`	Synthesis of networks of custom processing elements for real-time physical system emulation. ACM Trans. Design Autom. Electr. Syst. Chen Huang, Bailey Miller, Frank Vahid, Tony Givargis
2012	—	`conf`	Automated fall detection on privacy-enhanced video. EMBC Alex D. Edgcomb, Frank Vahid
2012	J	`jnl`	Combining code reordering and cache configuration. ACM Trans. Embed. Comput. Syst. Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2012	—	`conf`	Digital mockups for the testing of a medical ventilator. IHI Bailey Miller, Frank Vahid, Tony Givargis
2012	A	`conf`	MEDS: Mockup Electronic Data Sheets for automated testing of cyber-physical systems using digital mockups. DATE Bailey Miller, Frank Vahid, Tony Givargis
2012	—	`conf`	MNFL: the monitoring and notification flow language for assistive monitoring. IHI Alex D. Edgcomb, Frank Vahid
2012	J	`jnl`	Privacy perception and fall detection accuracy for in-home video assistive monitoring with privacy enhancements. SIGHIT Rec. Alex D. Edgcomb, Frank Vahid
2012	—	`conf`	RIOS: a lightweight task scheduler for embedded systems. WESE Bailey Miller, Frank Vahid, Tony Givargis
2012	Misc	`conf`	Synthesis of custom networks of heterogeneous processing elements for complex physical system emulation. CODES+ISSS Chen Huang, Bailey Miller, Frank Vahid, Tony Givargis
2011	J	`jnl`	A Custom FPGA Processor for Physical Model Ordinary Differential Equation Solving. IEEE Embed. Syst. Lett. Chen Huang, Frank Vahid, Tony Givargis
2011	—	`conf`	Feature extractors for integration of cameras and sensors during end-user programming of assistive monitoring systems. Wireless Health Alex D. Edgcomb, Frank Vahid
2011	—	`conf`	Scalable object detection accelerators on FPGAs using custom design space exploration. SASP Chen Huang, Frank Vahid
2011	J	`jnl`	Thread Warping: Dynamic and Transparent Synthesis of Thread Accelerators. ACM Trans. Design Autom. Electr. Syst. Greg Stitt, Frank Vahid
2010	A*	`conf`	Online SystemC emulation acceleration. DAC Scott Sirowy, Chen Huang, Frank Vahid
2010	A	`conf`	Server-side coprocessor updating for mobile devices with FPGAs. FPGA Chen Huang, Frank Vahid
2009	J	`jnl`	Design and implementation of a MicroBlaze-based warp processor. ACM Trans. Embed. Comput. Syst. Roman L. Lysecky, Frank Vahid
2009	J	`jnl`	Dynamic acceleration management for SystemC emulation. SIGBED Rev. Scott Sirowy, Chen Huang, Frank Vahid
2009	J	`jnl`	Enabling nonexpert construction of basic sensor-based systems. ACM Trans. Comput. Hum. Interact. Susan Lysecky, Frank Vahid
2009	J	`jnl`	Fast Configurable-Cache Tuning With a Unified Second-Level Cache. IEEE Trans. Very Large Scale Integr. Syst. Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2009	A	`conf`	Making good points: application-specific pareto-point generation for design space exploration using statistical methods. FPGA David Sheldon, Frank Vahid
2009	Misc	`conf`	Portable SystemC-on-a-chip. CODES+ISSS Scott Sirowy, Bailey Miller, Frank Vahid
2009	A*	`conf`	Transmuting coprocessors: dynamic loading of FPGA coprocessors. DAC Chen Huang, Frank Vahid
2009	J	`jnl`	Virtual microcontrollers. SIGBED Rev. Scott Sirowy, David Sheldon, Tony Givargis, Frank Vahid
2008	A	`conf`	A pipelined binary tree as a case study on designing efficient circuits for an FPGA in a bram aware design. FPGA David Sheldon, Frank Vahid
2008	—	`conf`	A table-based method for single-pass cache optimization. ACM Great Lakes Symposium on VLSI Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank Vahid
2008	A	`conf`	C is for circuits: capturing FPGA circuits as sequential code for portability. FPGA Scott Sirowy, Greg Stitt, Frank Vahid
2008	Misc	`conf`	Don't forget memories: a case study redesigning a pattern counting ASIC circuit for FPGAs. CODES+ISSS David Sheldon, Frank Vahid
2008	Misc	`conf`	Dynamic coprocessor management for FPGA-enhanced compute platforms. CASES Chen Huang, Frank Vahid
2008	Misc	`conf`	Dynamic tuning of configurable architectures: the AWW online algorithm. CODES+ISSS Chen Huang, David Sheldon, Frank Vahid
2008	Misc	`conf`	Highly-cited ideas in system codesign and synthesis. CODES+ISSS Frank Vahid, Tony Givargis
2008	J	`jnl`	Warp Processing: Dynamic Translation of Binaries to FPGA Circuits. Computer Frank Vahid, Greg Stitt, Roman L. Lysecky
2007	J	`jnl`	A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms CoRR Greg Stitt, Frank Vahid
2007	A*	`conf`	A Self-Tuning Configurable Cache. DAC Ann Gordon-Ross, Frank Vahid
2007	J	`jnl`	A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning CoRR Roman L. Lysecky, Frank Vahid
2007	A	`conf`	A one-shot configurable-cache tuner for improved energy and performance. DATE Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros
2007	J	`jnl`	Binary synthesis. ACM Trans. Design Autom. Electr. Syst. Greg Stitt, Frank Vahid
2007	A	`conf`	Clock-frequency assignment for multiple clock domain systems-on-a-chip. DATE Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank Vahid
2007	B	`conf`	Dynamic Partial FPGA Reconfiguration in a Prototype Microprocessor System. FPL Kai Schleupen, Scott Lekuch, Ryan Mannion, Zhi Guo, Walid A. Najjar, Frank Vahid
2007	—	`conf`	Integrated Coupling and Clock Frequency Assignment of Accelerators During Hardware/Software Partitioning. IESS Scott Sirowy, Frank Vahid
2007	A	`conf`	Interactive presentation: Soft-core processor customization using the design of experiments paradigm. DATE David Sheldon, Frank Vahid, Stefano Lonardi
2007	J	`jnl`	It's Time to Stop Calling Circuits "Hardware". Computer Frank Vahid
2007	J	`jnl`	System Synthesis for Networks of Programmable Blocks CoRR Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid
2007	Misc	`conf`	Thread warping: a framework for dynamic synthesis of thread accelerators. CODES+ISSS Greg Stitt, Frank Vahid
2007	A	`conf`	Two-level microprocessor-accelerator partitioning. DATE Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank Vahid
2006	A	`conf`	A code refinement methodology for performance-improved synthesis from C. ICCAD Greg Stitt, Frank Vahid, Walid A. Najjar
2006	A	`conf`	Application-specific customization of parameterized FPGA soft-core processors. ICCAD David Sheldon, Rakesh Kumar, Roman L. Lysecky, Frank Vahid, Dean M. Tullsen
2006	Misc	`conf`	Automated Application-Specific Tuning of Parameterized Sensor-Based Embedded System Building Blocks. UbiComp Susan Lysecky, Frank Vahid
2006	Misc	`conf`	Automated Generation of Basic Custom Sensor-Based Embedded Computing Systems Guided by End-User Optimization Criteria. UbiComp Susan Lysecky, Frank Vahid
2006	A*	`conf`	Configurable cache subsetting for fast cache tuning. DAC Pablo Viana, Ann Gordon-Ross, Eamonn J. Keogh, Edna Barros, Frank Vahid
2006	A	`conf`	Conjoining soft-core FPGA processors. ICCAD David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. Tullsen, Roman L. Lysecky
2006	J	`jnl`	Warp Processors. ACM Trans. Design Autom. Electr. Syst. Roman L. Lysecky, Greg Stitt, Frank Vahid
2005	A	`conf`	A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms. DATE Greg Stitt, Frank Vahid
2005	Misc	`conf`	A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation. FCCM Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
2005	A	`conf`	A Study of the Speedups and Competitiveness of FPGA Soft Processor Cores using Dynamic Hardware/Software Partitioning. DATE Roman L. Lysecky, Frank Vahid
2005	—	`conf`	A first look at the interplay of code reordering and configurable caches. ACM Great Lakes Symposium on VLSI Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2005	J	`jnl`	A highly configurable cache for low energy embedded systems. ACM Trans. Embed. Comput. Syst. Chuanjun Zhang, Frank Vahid, Walid A. Najjar
2005	—	`conf`	A logic block enabling logic configuration by non-experts in sensor networks. CHI Extended Abstracts Susan Cotterell, Frank Vahid
2005	J	`jnl`	A way-halting cache for low-energy high-performance systems. ACM Trans. Archit. Code Optim. Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar
2005	A	`conf`	Fast configurable-cache tuning with a unified second-level cache. ISLPED Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2005	A	`conf`	Firm-core Virtual FPGA for Just-in-Time FPGA Compilation (abstract only). FPGA Roman L. Lysecky, Kris Miller, Frank Vahid, Kees A. Vissers
2005	J	`jnl`	Frequent Loop Detection Using Efficient Nonintrusive On-Chip Hardware. IEEE Trans. Computers Ann Gordon-Ross, Frank Vahid
2005	Misc	`conf`	Hardware/software partitioning of software binaries: a case study of H.264 decode. CODES+ISSS Greg Stitt, Frank Vahid, Gordon McGregor, Brian Einloth
2005	A	`conf`	New decompilation techniques for binary-level co-processor generation. ICCAD Greg Stiff, Frank Vahid
2005	A	`conf`	System Synthesis for Networks of Programmable Blocks. DATE Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid
2005	A	`conf`	Techniques for synthesizing binaries to an advanced register/memory structure. FPGA Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid
2005	—	`conf`	eBlocks - an enabling technology for basic sensor based systems. IPSN Susan Cotterell, Ryan Mannion, Frank Vahid, Harry Hsieh
2004	A	`conf`	A Configurable Logic Architecture for Dynamic Hardware/Software Partitioning. DATE Roman L. Lysecky, Frank Vahid
2004	A	`conf`	A Self-Tuning Cache Architecture for Embedded Systems. DATE Chuanjun Zhang, Frank Vahid, Roman L. Lysecky
2004	J	`jnl`	A fast on-chip profiler memory using a pipelined binary tree. IEEE Trans. Very Large Scale Integr. Syst. Roman L. Lysecky, Susan Cotterell, Frank Vahid
2004	A	`conf`	A quantitative analysis of the speedup factors of FPGAs over processors. FPGA Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers
2004	J	`jnl`	A self-tuning cache architecture for embedded systems. ACM Trans. Embed. Comput. Syst. Chuanjun Zhang, Frank Vahid, Roman L. Lysecky
2004	A	`conf`	A way-halting cache for low-energy high-performance systems. ISLPED Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar
2004	B	`conf`	Applications and experiments with eBlocks - electronic blocks for basic sensor-based systems. SECON Susan Cotterell, Kelly Downey, Frank Vahid
2004	A	`conf`	Automatic Tuning of Two-Level Caches to Embedded Applications. DATE Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt
2004	A*	`conf`	Dynamic FPGA routing for just-in-time FPGA compilation. DAC Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
2004	J	`jnl`	Energy savings and speedups from partitioning critical software loops to hardware in embedded systems. ACM Trans. Embed. Comput. Syst. Greg Stitt, Frank Vahid, Shawn Nematbakhsh
2004	A	`conf`	Low Static-Power Frequent-Value Data Caches. DATE Chuanjun Zhang, Jun Yang, Frank Vahid
2004	—	`ch.`	Tuning Caches to Applications for Low-Energy Embedded Systems. Ultra Low-Power Electronics and Design Ann Gordon-Ross, Chuanjun Zhang, Frank Vahid, Nikil D. Dutt
2004	A	`conf`	Using a Victim Buffer in an Application-Specific Memory Hierarchy. DATE Chuanjun Zhang, Frank Vahid
2003	A*	`conf`	A Highly-Configurable Cache Architecture for Embedded Systems. ISCA Chuanjun Zhang, Frank Vahid, Walid A. Najjar
2003	J	`jnl`	A Way-Halting Cache for Low-Energy High-Performance Systems. IEEE Comput. Archit. Lett. Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar
2003	Misc	`conf`	A codesigned on-chip logic minimizer. CODES+ISSS Roman L. Lysecky, Frank Vahid
2003	C	`conf`	Cache Configuration Exploration on Prototyping Platforms. IEEE International Workshop on Rapid System Prototyping Chuanjun Zhang, Frank Vahid
2003	A*	`conf`	Dynamic hardware/software partitioning: a first approach. DAC Greg Stitt, Roman L. Lysecky, Frank Vahid
2003	—	`conf`	Embedded System Design: UCR's Undergraduate Three-Course Sequence. MSE Frank Vahid
2003	—	`conf`	Energy Benefits of a Configurable Line Size Cache for Embedded Systems. ISVLSI Chuanjun Zhang, Frank Vahid, Walid A. Najjar
2003	Misc	`conf`	First results with eBlocks: embedded systems building blocks. CODES+ISSS Susan Cotterell, Frank Vahid, Walid A. Najjar, Harry Hsieh
2003	Misc	`conf`	Frequent loop detection using efficient non-intrusive on-chip hardware. CASES Ann Gordon-Ross, Frank Vahid
2003	J	`jnl`	Highly configurable platforms for embedded computing systems. Microelectron. J. Frank Vahid, Roman L. Lysecky, Chuanjun Zhang, Greg Stitt
2003	J	`jnl`	Making the Best of Those Extra Transistors. IEEE Des. Test Comput. Frank Vahid
2003	A*	`conf`	On-chip logic minimization. DAC Roman L. Lysecky, Frank Vahid
2003	B	`conf`	Profiling tools for hardware/software partitioning of embedded applications. LCTES Dinesh C. Suresh, Walid A. Najjar, Frank Vahid, Jason R. Villarreal, Greg Stitt
2003	J	`jnl`	The Softening of Hardware. Computer Frank Vahid
2003	J	`jnl`	Tiny instruction caches for low power embedded systems. ACM Trans. Embed. Comput. Syst. Ann Gordon-Ross, Susan Cotterell, Frank Vahid
2002	A*	`conf`	A fast on-chip profiler memory. DAC Roman L. Lysecky, Susan Cotterell, Frank Vahid
2002	—	`conf`	A power-configurable bus for embedded systems. ISCAS (5) Chuanjun Zhang, Frank Vahid
2002	—	`conf`	Codesign-extended applications. CODES Brian Grattan, Greg Stitt, Frank Vahid
2002	C	`conf`	Dynamic Loop Caching Meets Preloaded Loop Caching - A Hybrid Approach. ICCD Ann Gordon-Ross, Frank Vahid
2002	—	`book`	Embedded system design - a unified hardware / software introduction. Frank Vahid, Tony Givargis
2002	J	`jnl`	Energy Advantages of Microprocessor Platforms with On-Chip Configurable Logic. IEEE Des. Test Comput. Greg Stitt, Frank Vahid
2002	J	`jnl`	Exploiting Fixed Programs in Embedded Systems: A Loop Cache Example. IEEE Comput. Archit. Lett. Ann Gordon-Ross, Susan Cotterell, Frank Vahid
2002	A	`conf`	Hardware/software partitioning of software binaries. ICCAD Greg Stitt, Frank Vahid
2002	J	`jnl`	Improving Software Performance with Configurable Logic. Des. Autom. Embed. Syst. Jason R. Villarreal, Dinesh C. Suresh, Greg Stitt, Frank Vahid, Walid A. Najjar
2002	J	`jnl`	Instruction-based system-level power evaluation of system-on-a-chip peripheral cores. IEEE Trans. Very Large Scale Integr. Syst. Tony Givargis, Frank Vahid, Jörg Henkel
2002	J	`jnl`	Partitioning sequential programs for CAD using a three-step approach. ACM Trans. Design Autom. Electr. Syst. Frank Vahid
2002	J	`jnl`	Platune: a tuning framework for system-on-a-chip platforms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Tony Givargis, Frank Vahid
2002	J	`jnl`	Power Estimator Development for Embedded System Memory Tuning. J. Circuits Syst. Comput. Frank Vahid, Tony Givargis, Susan Cotterell
2002	J	`jnl`	Prefetching for improved bus wrapper performance in cores. ACM Trans. Design Autom. Electr. Syst. Roman L. Lysecky, Frank Vahid
2002	A	`conf`	Synthesis of customized loop caches for core-based embedded systems. ICCAD Susan Cotterell, Frank Vahid
2002	J	`jnl`	System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chip. IEEE Trans. Very Large Scale Integr. Syst. Tony Givargis, Frank Vahid, Jörg Henkel
2002	J	`jnl`	Tuning of Cache Ways and Voltage for Low-Energy Embedded System Platforms. Des. Autom. Embed. Syst. Tony Givargis, Frank Vahid
2002	—	`conf`	Tuning of Loop Cache Architectures to Programs in Embedded System Design. ISSS Frank Vahid, Susan Cotterell
2002	Misc	`conf`	Using On-Chip Configurable Logic to Reduce Embedded System Software Energy. FCCM Greg Stitt, Brian Grattan, Jason R. Villarreal, Frank Vahid
2001	A	`conf`	A self-optimizing embedded microprocessor using a loop table for low power. ISLPED Frank Vahid, Ann Gordon-Ross
2001	J	`jnl`	Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designs. IEEE Trans. Very Large Scale Integr. Syst. Tony Givargis, Frank Vahid, Jörg Henkel
2001	J	`jnl`	Platform Tuning for Embedded Systems Design. Computer Frank Vahid, Tony Givargis
2001	J	`jnl`	Propagating constants past software to hardware peripherals in fixed-application embedded systems. SIGARCH Comput. Archit. News Frank Vahid, Rilesh Patel, Greg Stitt
2001	A	`conf`	System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip. ICCAD Tony Givargis, Frank Vahid, Jörg Henkel
2001	—	`conf`	Trace-driven system-level power evaluation of system-on-a-chip peripheral cores. ASP-DAC Tony Givargis, Frank Vahid, Jörg Henkel
2000	Misc	`conf`	A first-step towards an architecture tuning methodology for low power. CASES Greg Stitt, Frank Vahid, Tony Givargis, Roman L. Lysecky
2000	—	`conf`	A hybrid approach for core-based system-level power modeling. ASP-DAC Tony Givargis, Frank Vahid, Jörg Henkel
2000	—	`conf`	Experiments with the Peripheral Virtual Component Interface. ISSS Roman L. Lysecky, Frank Vahid, Tony Givargis
2000	A	`conf`	Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip Design. DATE Jörg Henkel, Tony Givargis, Frank Vahid
2000	—	`conf`	Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores. ISSS Tony Givargis, Frank Vahid, Jörg Henkel
2000	—	`conf`	Parameterized system design. CODES Tony Givargis, Frank Vahid
2000	—	`ed.`	Proceedings of the Eighth International Workshop on Hardware/Software Codesign, CODES 2000, San Diego, California, USA, 2000 CODES Frank Vahid, Jan Madsen
2000	A	`conf`	Techniques for Reducing Read Latency of Core Bus Wrappers. DATE Roman L. Lysecky, Frank Vahid, Tony Givargis
1999	A	`conf`	FSMD Functional Partitioning for Low Power. DATE Enoch Hwang, Frank Vahid, Yu-Chin Hsu
1999	A	`conf`	Interface and cache power exploration for core-based embedded system design. ICCAD Tony Givargis, Jörg Henkel, Frank Vahid
1999	—	`conf`	Pre-Fetching for Improved Core Interfacing. ISSS Roman L. Lysecky, Frank Vahid, Rilesh Patel, Tony Givargis
1999	J	`jnl`	Procedure cloning: a transformation for improved system-level functional partitioning. ACM Trans. Design Autom. Electr. Syst. Frank Vahid
1999	—	`ed.`	Proceedings of the Seventh International Workshop on Hardware/Software Codesign, CODES 1999, Rome, Italy, 1999 CODES Ahmed Amine Jerraya, Luciano Lavagno, Frank Vahid
1999	J	`jnl`	Techniques for minimizing and balancing I/O during functional partitioning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Frank Vahid
1999	—	`conf`	The case for a configure-and-execute paradigm. CODES Frank Vahid, Tony Givargis
1998	—	`conf`	A Three-Step Approach to the Functional Partitioning of Large Behavioral Processes. ISSS Frank Vahid
1998	J	`jnl`	Functional partitioning improvements over structural partitioning for packaging constraints and synthesis: tool performance. ACM Trans. Design Autom. Electr. Syst. Frank Vahid, Thuy Dm Le, Yu-Chin Hsu
1998	—	`conf`	Incorporating Cores into System-Level Specification. ISSS Frank Vahid, Tony Givargis
1998	—	`conf`	Interface Exploration for Reduced Power in Core-Based Systems. ISSS Tony Givargis, Frank Vahid
1998	J	`jnl`	SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design. IEEE Trans. Very Large Scale Integr. Syst. Daniel D. Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong
1998	A*	`conf`	System-level exploration with SpecSyn. DAC Daniel Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong
1997	—	`conf`	An Object-Oriented Communication Library for Hardware-Software CoDesign. CODES Frank Vahid, Linus Tauro
1997	J	`jnl`	Extending the Kernighan/Lin Heuristic for Hardware and Software Functional Partitioning. Des. Autom. Embed. Syst. Frank Vahid, Thuy Dm Le
1997	A	`conf`	I/O and Performance Tradeoffs with the FunctionBus During Multi-FPGA Partitioning. FPGA Frank Vahid
1997	—	`conf`	Modifying Min-Cut for Hardware and Software Functional Partitioning. CODES Frank Vahid
1997	—	`conf`	Port Calling: A Transformation for Reducing I/O during Multi-Package Functional Partitioning. ISSS Frank Vahid
1997	—	`conf`	Procedure cloning: a transformation for improved system-level functional partitioning. ED&TC Frank Vahid
1997	—	`ed.`	Proceedings of the 10th International Symposium on System Synthesis, ISSS '97, Antwerp, Belgium, September 17-19, 1997. ISSS Frank Vahid, Francky Catthoor
1996	—	`conf`	A Comparison of Functional and Structural Partitioning. ISSS Frank Vahid, Thuy Dm Le, Yu-Chin Hsu
1996	J	`jnl`	System design methodologies: aiming at the 100 h design cycle. IEEE Trans. Very Large Scale Integr. Syst. Daniel D. Gajski, Sanjiv Narayan, Loganath Ramachandran, Frank Vahid, Peter Fung
1996	—	`conf`	Towards a Model for Hardware and Software Functional Partitioning. CODES Frank Vahid, Thuy Dm Le
1995	—	`conf`	Closeness metrics for system-level functional partitioning. EURO-DAC Frank Vahid, Daniel D. Gajski
1995	—	`conf`	Clustering for improved system-level functional partitioning. ISSS Frank Vahid, Daniel D. Gajski
1995	J	`jnl`	Incremental hardware estimation during hardware/software functional partitioning. IEEE Trans. Very Large Scale Integr. Syst. Frank Vahid, Daniel D. Gajski
1995	—	`conf`	Procedure exlining: a new system-level specification transformation. EURO-DAC Frank Vahid
1995	—	`conf`	Procedure exlining: a transformation for improved system and behavioral synthesis. ISSS Frank Vahid
1995	—	`conf`	SLIF: a specification-level intermediate format for system design. ED&TC Frank Vahid, Daniel D. Gajski
1995	J	`jnl`	SpecCharts: a VHDL front-end for embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Frank Vahid, Sanjiv Narayan, Daniel D. Gajski
1995	J	`jnl`	Specification and Design of Embedded Hardware-Software Systems. IEEE Des. Test Comput. Daniel D. Gajski, Frank Vahid
1994	—	`conf`	100-hour design cycle: a test case. EURO-DAC Loganath Ramachandran, Daniel D. Gajski, Sanjiv Narayan, Frank Vahid, Peter Fung
1994	—	`conf`	A System-Design Methodology: Executable-Specification Refinement. EDAC-ETC-EUROASIC Daniel Gajski, Frank Vahid, Sanjiv Narayan
1994	—	`conf`	A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning. EURO-DAC Frank Vahid, Daniel D. Gajski, Jie Gong
1994	—	`conf`	A transformation for integrating VHDL behavioral specification with synthesis and software generation. EURO-DAC Frank Vahid, Daniel D. Gajski, Sanjiv Narayan
1993	—	`conf`	Synthesis of functions and procedures in behavioral VHDL. EURO-DAC Loganath Ramachandran, Sanjiv Narayan, Frank Vahid, Daniel D. Gajski
1992	—	`conf`	Semantics and synthesis of signals in behavioral VHDL. EURO-DAC Loganath Ramachandran, Frank Vahid, Sanjiv Narayan, Daniel D. Gajski
1992	A*	`conf`	Specification Partitioning for System Design. DAC Frank Vahid, Daniel Gajski
1992	Misc	`conf`	System Level Specification and Synthesis. VLSI Design Sanjiv Narayan, Frank Vahid, Daniel D. Gajski
1992	J	`jnl`	System Specification with the SpecCharts Language. IEEE Des. Test Comput. Sanjiv Narayan, Frank Vahid, Daniel D. Gajski
1991	A	`conf`	Obtaining Functionally Equivalent Simulations using VHDL and a Time-Shift Transformation. ICCAD Frank Vahid, Daniel Gajski
1991	A	`conf`	System Specification and Synthesis with the SpecCharts Language. ICCAD Sanjiv Narayan, Frank Vahid, Daniel Gajski
1991	—	`conf`	Translating system specifications to VHDL. EURO-DAC Sanjiv Narayan, Frank Vahid, Daniel D. Gajski