Frank O'Mahony

45 papers A* 1Journal 12Unranked 32

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Design of 224Gb/s DSP-Based Transceiver in CMOS Technology: Signal Integrity, Architecture, Circuits, and Packaging. CICC Jihwan Kim, Ariel Cohen, Mike Peng Li, Ajay Balankutty, Sandipan Kundu, Ahmad Khairi, Yoel Krupnik, Yoav Segal, Marco Cusmai, Dror Lazar, Ari Gordon, Noam Familia, Kai Yu, Yutao Liu, Matthew Beach, Priya Wali, Hsinho Wu, Masashi Shimanouchi, Jenny Xiaohong Jiang, Zhiguo Qian, Kemal Aygun, Itamar Levin, Frank O'Mahony
2023	J	`jnl`	A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels. IEEE J. Solid State Circuits Ahmad Khairi, Yoel Krupnik, Amir Laufer, Yoav Segal, Marco Cusmai, Itamar Levin, Ari Gordon, Yaniv Sabag, Vitali Rahinski, Idan Lotan, Gadi Ori, Noam Familia, Stas Litski, Tali Warshavsky Grafi, Udi Virobnik, Dror Lazar, Yeshayahu Horwitz, Ajay Balankutty, Shiva Kiran, Samuel Palermo, Peng Mike Li, Frank O'Mahony, Ariel Cohen
2022	J	`jnl`	A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET. IEEE J. Solid State Circuits Jihwan Kim, Sandipan Kundu, Ajay Balankutty, Matthew Beach, Bong Chan Kim, Stephen T. Kim, Yutao Liu, Savyasaachi Keshava Murthy, Priya Wali, Kai Yu, Hyung Seok Kim, Chuanchang Liu, Dongseok Shin, Ariel Cohen, Yoav Segal, Yongping Fan, Peng Li, Frank O'Mahony
2022	—	`conf`	Ponte Vecchio: A Multi-Tile 3D Stacked Processor for Exascale Computing. ISSCC Wilfred Gomes, Altug Koker, Patrick N. Stover, Doug B. Ingerly, Scott Siers, Srikrishnan Venkataraman, Chris Pelto, Tejas Shah, Amreesh Rao, Frank O'Mahony, Eric Karl, Lance Cheney, Iqbal Rajwani, Hemant Jain, Ryan Cortez, Arun Chandrasekhar, Basavaraj Kanthi, Raja Koduri
2021	—	`conf`	8.1 A 224Gb/s DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS. ISSCC Jihwan Kim, Sandipan Kundu, Ajay Balankutty, Matthew Beach, Bong Chan Kim, Stephen Kim, Yutao Liu, Savyassachi Keshava Murthy, Priya Wali, Kai Yu, Hyung Seok Kim, Chuanchang Liu, Dongseok Shin, Ariel Cohen, Yongping Fan, Frank O'Mahony
2021	—	`conf`	A 56GHz Receiver Analog Front End for 224Gb/s PAM-4 SerDes in 10nm CMOS. VLSI Circuits Shiva Kiran, Ajay Balankutty, Yutao Liu, Rajeev Dokania, Hariprasath Venkataraman, Priya Wali, Stephen Kim, Yoel Krupnik, Ariel Cohen, Frank O'Mahony
2020	—	`conf`	8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm ISSCC Wilfred Gomes, Sanjeev Khushu, Doug B. Ingerly, Patrick N. Stover, Nasirul I. Chowdhury, Frank O'Mahony, Ajay Balankutty, Noam Dolev, Martin G. Dixon, Lei Jiang, Surya Prekke, Biswajit Patra, Pavel V. Rott, Rajesh Kumar
2019	J	`jnl`	A 112 Gb/s PAM-4 56 Gb/s NRZ Reconfigurable Transmitter With Three-Tap FFE in 10-nm FinFET. IEEE J. Solid State Circuits Jihwan Kim, Ajay Balankutty, Rajeev K. Dokania, Amr Elshazly, Hyung Seok Kim, Sandipan Kundu, Dan Shi, Skyler Weaver, Kai Yu, Frank O'Mahony
2018	—	`conf`	A 112Gb/s PAM-4 transmitter with 3-Tap FFE in 10nm CMOS. ISSCC Jihwan Kim, Ajay Balankutty, Rajeev K. Dokania, Amr Elshazly, Hyung Seok Kim, Sandipan Kundu, Skyler Weaver, Kai Yu, Frank O'Mahony
2018	—	`conf`	Session 16 overview: Advanced optical and wireline techniques: Wireline subcommittee. ISSCC Azita Emami, Andrew K. Joy, Frank O'Mahony
2018	—	`conf`	Session 25 overview: Clock generation for high-speed links: Wireline subcommittee. ISSCC Roberto Nonis, Pavan Kumar Hanumolu, Frank O'Mahony
2018	—	`conf`	Session 6 overview: Ultra-high-speed wireline: Wireline subcommittee. ISSCC Mounir Meghelli, Hyeon-Min Bae, Frank O'Mahony
2017	—	`conf`	Session 29 overview: Optical- and electrical-link innovations. ISSCC Samuel Palermo, Hideyuki Nosaka, Frank O'Mahony
2017	—	`conf`	Session 6 overview: Ultra-high-speed wireline. ISSCC Simone Erba, Takayuki Shibasaki, Frank O'Mahony
2016	J	`jnl`	Dual-Calibration Technique for Improving Static Linearity of Thermometer DACs for I/O. IEEE Trans. Very Large Scale Integr. Syst. Ishita Mukhopadhyay, Mustansir Yunus Mukadam, Rajendran Narayanan, Frank O'Mahony, Alyssa B. Apsel
2016	—	`conf`	Session 23 overview: Electrical and optical link innovations. ISSCC Frank O'Mahony, Simone Erba
2015	—	`conf`	10.5 A 5.9pJ/b 10Gb/s serial link with unequalized MM-CDR in 14nm tri-gate CMOS. ISSCC Rajeev K. Dokania, Alexandra M. Kern, Mike He, Adam C. Faust, Richard Tseng, Skyler Weaver, Kai Yu, Christiaan Bil, Tao Liang, Frank O'Mahony
2015	—	`conf`	3.5 A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode transmitter in 14nm CMOS. ISSCC Jihwan Kim, Ajay Balankutty, Amr Elshazly, Yan-Yu Huang, Hang Song, Kai Yu, Frank O'Mahony
2015	J	`jnl`	An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements. IEEE J. Solid State Circuits Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2015	—	`conf`	EP3: Innovating on the tapeout treadmill. ISSCC Jack Kenney, Frank O'Mahony
2015	—	`conf`	F6: I/O design at 25Gb/s and beyond: Enabling the future communication infrastructure for big data. ISSCC Ken Chang, Frank O'Mahony, Elad Alon, Hyeon-Min Bae, Nicola Da Dalt, Eric Fluhr
2014	—	`conf`	A 2GHz-to-7.5GHz quadrature clock-generator using digital delay locked loops for multi-standard I/Os in 14nm CMOS. VLSIC Amr Elshazly, Ajay Balankutty, Yan-Yu Huang, Kai Yu, Frank O'Mahony
2014	—	`conf`	An on-die all-digital power supply noise analyzer with enhanced spectrum measurements. ESSCIRC Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2014	—	`conf`	F6: Energy-efficient I/O design for next-generation systems. ISSCC Frank O'Mahony, Nicola Da Dalt, Ken Chang, Hisakatsu Yamaguchi, Chulwoo Kim, Elad Alon
2013	J	`jnl`	A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS. IEEE J. Solid State Circuits Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013	—	`conf`	A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS. ISSCC Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013	—	`conf`	Design considerations for low-power receiver front-end in high-speed data links. CICC Sudip Shekhar, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2012	—	`conf`	An on-die all-digital delay measurement circuit with 250fs accuracy. VLSIC Mozhgan Mansuri, Bryan Casper, Frank O'Mahony
2010	J	`jnl`	A 0.6 mW/Gb/s, 6.4-7.2 Gb/s Serial Link Receiver Using Local Injection-Locked Ring Oscillators in 90 nm CMOS. IEEE J. Solid State Circuits Kangmin Hu, Tao Jiang, Jingguang Wang, Frank O'Mahony, Patrick Yin Chiang
2010	J	`jnl`	A 47 , ˟, 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS. IEEE J. Solid State Circuits Frank O'Mahony, James E. Jaussi, Joseph T. Kennedy, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010	—	`conf`	A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS. ISSCC Frank O'Mahony, Joseph T. Kennedy, James E. Jaussi, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010	—	`conf`	A 5-to-25Gb/s 1.6-to-3.8mW/(Gb/s) reconfigurable transceiver in 45nm CMOS. ISSCC Ganesh Balamurugan, Frank O'Mahony, Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Bryan Casper
2010	—	`conf`	Varactor-based signal restoration for near-speed-of-light surfing global interconnect. CICC Suwen Yang, Robert J. Drost, Mark R. Greenstreet, Shahriar Mirabbasi, Frank O'Mahony
2009	—	`conf`	A 1-mW 12-Gb/s continuous-time adaptive passive equalizer in 90-nm CMOS. CICC Dong Hun Shin, Ji-Eun Jang, Frank O'Mahony, C. Patrick Yue
2009	J	`jnl`	Clocking Analysis, Implementation and Measurement Techniques for High-Speed Data Links - A Tutorial. IEEE Trans. Circuits Syst. I Regul. Pap. Bryan Casper, Frank O'Mahony
2009	J	`jnl`	Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. Sudip Shekhar, Ganesh Balamurugan, David J. Allstot, Mozhgan Mansuri, James E. Jaussi, Randy Mooney, Joseph T. Kennedy, Bryan Casper, Frank O'Mahony
2008	—	`conf`	A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS. ISSCC Frank O'Mahony, Sudip Shekhar, Mozhgan Mansuri, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Bryan Casper, David J. Allstot, Randy Mooney
2008	J	`jnl`	A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS. IEEE J. Solid State Circuits Ganesh Balamurugan, Joseph T. Kennedy, Gaurab Banerjee, James E. Jaussi, Mozhgan Mansuri, Frank O'Mahony, Bryan Casper, Randy Mooney
2008	—	`conf`	Strong injection locking of low-Q LC oscillators. CICC Mozhgan Mansuri, Frank O'Mahony, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Sudip Shekhar, Randy Mooney, Bryan Casper
2006	—	`conf`	A 20Gb/s Embedded Clock Transceiver in 90nm CMOS. ISSCC Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joe Kennedy, Randy Mooney
2006	—	`conf`	A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B. ISSCC Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joseph T. Kennedy, E. Yeung, Randy Mooney
2005	—	`conf`	A low-power, 20-Gb/s continuous-time adaptive passive equalizer. ISCAS (2) Ruifeng Sun, Jaejin Park, Frank O'Mahony, C. Patrick Yue
2003	J	`jnl`	A 10-GHz global clock distribution using coupled standing-wave oscillators. IEEE J. Solid State Circuits Frank O'Mahony, C. Patrick Yue, Mark A. Horowitz, S. Simon Wong
2003	A*	`conf`	Design of a 10GHz clock distribution network using coupled standing-wave oscillators. DAC Frank O'Mahony, C. Patrick Yue, Mark Horowitz, S. Simon Wong
2003	—	`conf`	On-Chip Interconnect Inductance - Friend or Foe (Invited). ISQED S. Simon Wong, C. Patrick Yue, Richard Chang, So-Young Kim, Bendik Kleveland, Frank O'Mahony