Frank Lee

16 papers A 8B 1Journal 1Unranked 6
YearRankTypeTitle / Venue / Authors
2025 A conf
A Novel Omnidirectional 3D Test Access Architecture for Advanced System-on-Wafer (SoW) Applications.
ITC
Hiroyuki Iwata, Sandeep Kumar Goel, Ankita Patidar, Fumiaki Takashima, Frank Lee
2025 A conf
Leveraging UCIe Interface for Silicon Health & Reliabiilty of Chiplets in a 3D Stack.
ITC
Sandeep Kumar Goel, Ankita Patidar, Stanley John, Frank Lee, Min-Jer Wang, Daniel F. J. Yang, Yervant Zorian, Manish Arora, Firooz Massoudi, Shaan Awasthi, Stelios Balalis, Velmurugan Pathervellaichamy, Bharath Shankaranarayanan, Narasimhalu Raju, Gurgen Harutyunyan, Grigor Tshagharyan, Vahagn Hovakimyan, Arman Karagyozyan, Alvina Manucharyan
2025 A conf
Scan Chain Diagnosis in Advanced Process Nodes: The Art of Balancing Resolution, Repairability, and Cost.
ITC
Sandeep Kumar Goel, Ankita Patidar, Yue Tian, Frank Lee
2025 — conf
TSMC in the Silicon Photonics Era - an Electrical Perspective.
OFC
Mikael Sahrling, Shenggao Li, Frank Lee, Stefan Rusu
2024 — conf
A 0.296pJ/bit 17.9Tb/s/mm
VLSI Technology and Circuits
Mu-Shan Lin, Chien-Chun Tsai, Shenggao Li, Tze-Chiang Huang, Wen-Hung Huang, Kate Huang, Yu-Chi Chen, Alex Liu, Yu-Jie Huang, Jimmy Wang, Shu-Chun Yang, Nai-Chen Cheng, Chao-Chieh Li, Hsin-Hung Kuo, Wei-Chih Chen, Chin-Hua Wen, Kevin Lin, Po-Yi Huang, Kenny Cheng-Hsiang Hsieh, Frank Lee
2024 — conf
An On-Chip Current-Sink-Free Adaptive-Timing Power Impedance Measurement (PIM) Unit for 3D-IC in 5nm FinFET Technology.
VLSI Technology and Circuits
Tsung-Che Lu, Chin-Ming Fu, Wei-Hsiang Wang, Fred Kuo, Chih-Hsien Chang, Kenny Hsieh, King-Ho Tam, Tze-Chiang Huang, Tom Chen, Mei Wong, Wei-pin Changchien, Frank Lee
2024 A conf
Handling Die-to-Die I/O Pads for 3DIC Interconnect Tests.
ITC
Sandeep Kumar Goel, Moiz Khan, Ankita Patidar, Frank Lee, Vuong Nguyen, Bharath Shankaranarayanan, Doo Kim, Manish Arora
2024 A conf
Physical-Aware Interconnect Test for Multi-Die Systems Using 3Dblox Open Standard.
ITC
Sandeep Kumar Goel, Ankita Patidar, Moiz Khan, Frank Lee, Anshuman Chandra, Martin Keim, Naim Lemar, Jonathan Gaudet, Quoc Phan, Vidya Neerkundar
2024 B conf
Scan Design Using Unsupervised Machine Learning to Reduce Functional Timing and Area Impact.
ETS
Sandeep Kumar Goel, Ankita Patidar, Frank Lee
2020 J jnl
A 7-nm 4-GHz Arm¹-Core-Based CoWoS¹ Chiplet Design for High-Performance Computing.
IEEE J. Solid State Circuits
Mu-Shan Lin, Tze-Chiang Huang, Chien-Chun Tsai, King-Ho Tam, Kenny Cheng-Hsiang Hsieh, Ching-Fang Chen, Wen-Hung Huang, Chi-Wei Hu, Yu-Chi Chen, Sandeep Kumar Goel, Chin-Ming Fu, Stefan Rusu, Chao-Chieh Li, Sheng-Yao Yang, Mei Wong, Shu-Chun Yang, Frank Lee
2019 — conf
A 7nm 4GHz Arm
VLSI Circuits
Mu-Shan Lin, Tze-Chiang Huang, Chien-Chun Tsai, King-Ho Tam, Kenny Cheng-Hsiang Hsieh, Tom Chen, Wen-Hung Huang, Jack Hu, Yu-Chi Chen, Sandeep Kumar Goel, Chin-Ming Fu, Stefan Rusu, Chao-Chieh Li, Sheng-Yao Yang, Mei Wong, Shu-Chun Yang, Frank Lee
2015 A conf
Efficient observation-point insertion for diagnosability enhancement in digital circuits.
ITC
Zipeng Li, Sandeep Kumar Goel, Frank Lee, Krishnendu Chakrabarty
2014 — conf
Design-for-diagnosis: Your safety net in catching design errors in known good dies in CoWoS
VLSI-DAT
Sandeep Kumar Goel, Min-Jer Wang, Saman Adham, Ashok Mehta, Frank Lee
2013 — conf
3DIC from concept to reality.
ASP-DAC
Frank Lee, Bill Shen, Willy Chen, Suk Lee
2013 A conf
Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study.
ITC
Sandeep Kumar Goel, Saman Adham, Min-Jer Wang, Ji-Jan Chen, Tze-Chiang Huang, Ashok Mehta, Frank Lee, Vivek Chickermane, Brion L. Keller, Thomas Valind, Subhasish Mukherjee, Navdeep Sood, Jeongho Cho, Hayden Hyungdong Lee, Jungi Choi, Sangdoo Kim
2012 A conf
DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks.
ITC
Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen